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[CodeGen][NFC] Refactor MachineInstr::print
* Handle more cases where the MI is not attached yet * Add similar asserts like in MIRPrinter::print llvm-svn: 322848
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@ -74,6 +74,29 @@
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using namespace llvm;
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static const MachineFunction *getMFIfAvailable(const MachineInstr &MI) {
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if (const MachineBasicBlock *MBB = MI.getParent())
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if (const MachineFunction *MF = MBB->getParent())
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return MF;
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return nullptr;
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}
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// Try to crawl up to the machine function and get TRI and IntrinsicInfo from
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// it.
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static void tryToGetTargetInfo(const MachineInstr &MI,
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const TargetRegisterInfo *&TRI,
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const MachineRegisterInfo *&MRI,
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const TargetIntrinsicInfo *&IntrinsicInfo,
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const TargetInstrInfo *&TII) {
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if (const MachineFunction *MF = getMFIfAvailable(MI)) {
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TRI = MF->getSubtarget().getRegisterInfo();
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MRI = &MF->getRegInfo();
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IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
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TII = MF->getSubtarget().getInstrInfo();
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}
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}
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void MachineInstr::addImplicitDefUseOperands(MachineFunction &MF) {
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if (MCID->ImplicitDefs)
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for (const MCPhysReg *ImpDefs = MCID->getImplicitDefs(); *ImpDefs;
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@ -1209,11 +1232,15 @@ LLVM_DUMP_METHOD void MachineInstr::dump() const {
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void MachineInstr::print(raw_ostream &OS, bool SkipOpers, bool SkipDebugLoc,
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const TargetInstrInfo *TII) const {
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const Module *M = nullptr;
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if (const MachineBasicBlock *MBB = getParent())
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if (const MachineFunction *MF = MBB->getParent())
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M = MF->getFunction().getParent();
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const Function *F = nullptr;
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if (const MachineFunction *MF = getMFIfAvailable(*this)) {
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F = &MF->getFunction();
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M = F->getParent();
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}
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ModuleSlotTracker MST(M);
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if (F)
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MST.incorporateFunction(*F);
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print(OS, MST, SkipOpers, SkipDebugLoc, TII);
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}
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@ -1225,18 +1252,10 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
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const TargetRegisterInfo *TRI = nullptr;
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const MachineRegisterInfo *MRI = nullptr;
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const TargetIntrinsicInfo *IntrinsicInfo = nullptr;
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tryToGetTargetInfo(*this, TRI, MRI, IntrinsicInfo, TII);
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if (const MachineBasicBlock *MBB = getParent()) {
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MF = MBB->getParent();
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if (MF) {
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MRI = &MF->getRegInfo();
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TRI = MF->getSubtarget().getRegisterInfo();
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if (!TII)
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TII = MF->getSubtarget().getInstrInfo();
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IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
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}
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}
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if (isCFIInstruction())
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assert(getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
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SmallBitVector PrintedTypes(8);
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bool ShouldPrintRegisterTies = hasComplexRegisterTies();
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@ -1248,18 +1267,23 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
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return findTiedOperandIdx(OpIdx);
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return 0U;
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};
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unsigned StartOp = 0;
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unsigned e = getNumOperands();
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// Print explicitly defined operands on the left of an assignment syntax.
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unsigned StartOp = 0, e = getNumOperands();
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for (; StartOp < e && getOperand(StartOp).isReg() &&
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getOperand(StartOp).isDef() && !getOperand(StartOp).isImplicit();
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++StartOp) {
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while (StartOp < e) {
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const MachineOperand &MO = getOperand(StartOp);
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if (!MO.isReg() || !MO.isDef() || MO.isImplicit())
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break;
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if (StartOp != 0)
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OS << ", ";
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LLT TypeToPrint = MRI ? getTypeToPrint(StartOp, PrintedTypes, *MRI) : LLT{};
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unsigned TiedOperandIdx = getTiedOperandIdx(StartOp);
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getOperand(StartOp).print(OS, MST, TypeToPrint, /*PrintDef=*/false,
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ShouldPrintRegisterTies, TiedOperandIdx, TRI,
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IntrinsicInfo);
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MO.print(OS, MST, TypeToPrint, /*PrintDef=*/false, ShouldPrintRegisterTies,
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TiedOperandIdx, TRI, IntrinsicInfo);
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++StartOp;
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}
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if (StartOp != 0)
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