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[RISCV] Split usage of VPseudoUnaryNoMask with GPR destination

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These instructions don't have a passthrough operand or any of the policy behaviors, while are the other ones do. Split them out into their own class to make this separation clear, and rename the mask variant to match. (We'd already done the same for the mask variant.)

Differential Revision: https://reviews.llvm.org/D153596
This commit is contained in:
Philip Reames 2023-06-26 07:42:08 -07:00 committed by Philip Reames
parent f27afedc6c
commit 5b8259158a
1 changed files with 16 additions and 8 deletions
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24
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
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@ -1027,7 +1027,6 @@ class VPseudoNullaryPseudoM<string BaseInst>
let BaseInstr = !cast<Instruction>(BaseInst);
}
// RetClass could be GPR or VReg.
class VPseudoUnaryNoMask<DAGOperand RetClass, DAGOperand OpClass,
string Constraint = ""> :
Pseudo<(outs RetClass:$rd),
@ -1041,7 +1040,6 @@ class VPseudoUnaryNoMask<DAGOperand RetClass, DAGOperand OpClass,
let HasSEWOp = 1;
}
// RetClass could be GPR or VReg.
class VPseudoUnaryNoMaskTU<DAGOperand RetClass, DAGOperand OpClass,
string Constraint = ""> :
Pseudo<(outs RetClass:$rd),
@ -1114,8 +1112,18 @@ class VPseudoUnaryMaskTA_FRM<VReg RetClass, VReg OpClass, string Constraint = ""
let usesCustomInserter = 1;
}
// mask unary operation without maskedoff
class VPseudoMaskUnarySOutMask:
class VPseudoUnaryNoMaskGPROut :
Pseudo<(outs GPR:$rd),
(ins VR:$rs2, AVL:$vl, ixlenimm:$sew), []>,
RISCVVPseudo {
let mayLoad = 0;
let mayStore = 0;
let hasSideEffects = 0;
let HasVLOp = 1;
let HasSEWOp = 1;
}
class VPseudoUnaryMaskGPROut:
Pseudo<(outs GPR:$rd),
(ins VR:$rs1, VMaskOp:$vm, AVL:$vl, ixlenimm:$sew), []>,
RISCVVPseudo {
@ -1884,9 +1892,9 @@ multiclass VPseudoVPOP_M {
defvar WriteVMPopV_MX = !cast<SchedWrite>("WriteVMPopV_" # mx);
defvar ReadVMPopV_MX = !cast<SchedRead>("ReadVMPopV_" # mx);
let VLMul = mti.LMul.value in {
def "_M_" # mti.BX : VPseudoUnaryNoMask<GPR, VR>,
def "_M_" # mti.BX : VPseudoUnaryNoMaskGPROut,
Sched<[WriteVMPopV_MX, ReadVMPopV_MX, ReadVMPopV_MX]>;
def "_M_" # mti.BX # "_MASK" : VPseudoMaskUnarySOutMask,
def "_M_" # mti.BX # "_MASK" : VPseudoUnaryMaskGPROut,
Sched<[WriteVMPopV_MX, ReadVMPopV_MX, ReadVMPopV_MX]>;
}
}
@ -1899,9 +1907,9 @@ multiclass VPseudoV1ST_M {
defvar WriteVMFFSV_MX = !cast<SchedWrite>("WriteVMFFSV_" # mx);
defvar ReadVMFFSV_MX = !cast<SchedRead>("ReadVMFFSV_" # mx);
let VLMul = mti.LMul.value in {
def "_M_" # mti.BX : VPseudoUnaryNoMask<GPR, VR>,
def "_M_" # mti.BX : VPseudoUnaryNoMaskGPROut,
Sched<[WriteVMFFSV_MX, ReadVMFFSV_MX, ReadVMFFSV_MX]>;
def "_M_" # mti.BX # "_MASK" : VPseudoMaskUnarySOutMask,
def "_M_" # mti.BX # "_MASK" : VPseudoUnaryMaskGPROut,
Sched<[WriteVMFFSV_MX, ReadVMFFSV_MX, ReadVMFFSV_MX]>;
}
}