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[GlobalISel]: Add KnownBits for G_XOR

Browse Source 
https://reviews.llvm.org/D66119

llvm-svn: 368648
This commit is contained in:
Aditya Nandakumar 2019-08-13 04:32:33 +00:00
parent 8b996dc16e
commit 70fdfed45f
2 changed files with 29 additions and 0 deletions
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13
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
View File

@ -131,6 +131,19 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
Known.Zero.setLowBits(KnownZeroLow);
break;
}
case TargetOpcode::G_XOR: {
computeKnownBitsImpl(MI.getOperand(2).getReg(), Known, DemandedElts,
Depth + 1);
computeKnownBitsImpl(MI.getOperand(1).getReg(), Known2, DemandedElts,
Depth + 1);
// Output known-0 bits are known if clear or set in both the LHS & RHS.
APInt KnownZeroOut = (Known.Zero & Known2.Zero) | (Known.One & Known2.One);
// Output known-1 are known to be set if set in only one of the LHS, RHS.
Known.One = (Known.Zero & Known2.One) | (Known.One & Known2.Zero);
Known.Zero = KnownZeroOut;
break;
}
// G_GEP is like G_ADD. FIXME: Is this true for all targets?
case TargetOpcode::G_GEP:
case TargetOpcode::G_ADD: {

16
llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
View File

@ -40,6 +40,22 @@ TEST_F(GISelMITest, TestKnownBitsPtrToIntViceVersa) {
EXPECT_EQ(256u, Res.One.getZExtValue());
EXPECT_EQ(0xfffffeffu, Res.Zero.getZExtValue());
}
TEST_F(GISelMITest, TestKnownBitsXOR) {
StringRef MIRString = " %3:_(s8) = G_CONSTANT i8 4\n"
" %4:_(s8) = G_CONSTANT i8 7\n"
" %5:_(s8) = G_XOR %3, %4\n"
" %6:_(s8) = COPY %5\n";
setUp(MIRString);
if (!TM)
return;
unsigned CopyReg = Copies[Copies.size() - 1];
MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
unsigned SrcReg = FinalCopy->getOperand(1).getReg();
GISelKnownBits Info(*MF);
KnownBits Res = Info.getKnownBits(SrcReg);
EXPECT_EQ(3u, Res.One.getZExtValue());
EXPECT_EQ(252u, Res.Zero.getZExtValue());
}
TEST_F(GISelMITest, TestKnownBits) {