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[PowerPC] Allow spilling GPR to VSR on AIX

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This patch enables spilling GPR to VSRs instead of stack under AIX ABI.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D97367
This commit is contained in:
Qiu Chaofan 2021-03-03 13:32:39 +08:00
parent 543b901e58
commit 72d4a41ba6
2 changed files with 3 additions and 1 deletions
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2
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
View File

@ -452,7 +452,7 @@ PPCRegisterInfo::getLargestLegalSuperClass(const TargetRegisterClass *RC,
// For Power9 we allow the user to enable GPR to vector spills.
// FIXME: Currently limited to spilling GP8RC. A follow on patch will add
// support to spill GPRC.
if (TM.isELFv2ABI()) {
if (TM.isELFv2ABI() || Subtarget.isAIXABI()) {
if (Subtarget.hasP9Vector() && EnableGPRToVecSpills &&
RC == &PPC::G8RCRegClass) {
InflateGP8RC++;

2
llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll
View File

@ -1,4 +1,6 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu -ppc-enable-gpr-to-vsr-spills < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-ibm-aix-xcoff -ppc-enable-gpr-to-vsr-spills -vec-extabi < %s | FileCheck %s
define signext i32 @foo(i32 signext %a, i32 signext %b) {
entry:
%cmp = icmp slt i32 %a, %b