AMDGPU: Use clang intrinsics for workitem builtins

v2: split into 2 patches
    use clang builtins for other intrinsics as well

v3: Fix warnings
    Switch r600 to use implictarg.ptr

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 276442
This commit is contained in:
Jan Vesely 2016-07-22 17:24:20 +00:00
parent 3c89bb09d5
commit 74f02db922
14 changed files with 71 additions and 136 deletions

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@ -1,4 +1,5 @@
math/ldexp.cl
synchronization/barrier_impl.ll
workitem/get_group_id.ll
workitem/get_local_id.ll
workitem/get_group_id.cl
workitem/get_local_id.cl
workitem/get_work_dim.cl

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@ -0,0 +1,11 @@
#include <clc/clc.h>
_CLC_DEF uint get_group_id(uint dim)
{
switch(dim) {
case 0: return __builtin_amdgcn_workgroup_id_x();
case 1: return __builtin_amdgcn_workgroup_id_y();
case 2: return __builtin_amdgcn_workgroup_id_z();
default: return 1;
}
}

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@ -1,29 +0,0 @@
declare i32 @llvm.amdgcn.workgroup.id.x() #0
declare i32 @llvm.amdgcn.workgroup.id.y() #0
declare i32 @llvm.amdgcn.workgroup.id.z() #0
define i32 @get_group_id(i32 %dim) #1 {
switch i32 %dim, label %default [
i32 0, label %x_dim
i32 1, label %y_dim
i32 2, label %z_dim
]
x_dim:
%x = tail call i32 @llvm.amdgcn.workgroup.id.x()
ret i32 %x
y_dim:
%y = tail call i32 @llvm.amdgcn.workgroup.id.y()
ret i32 %y
z_dim:
%z = tail call i32 @llvm.amdgcn.workgroup.id.z()
ret i32 %z
default:
ret i32 0
}
attributes #0 = { nounwind readnone }
attributes #1 = { alwaysinline norecurse nounwind readnone }

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@ -0,0 +1,11 @@
#include <clc/clc.h>
_CLC_DEF uint get_local_id(uint dim)
{
switch(dim) {
case 0: return __builtin_amdgcn_workitem_id_x();
case 1: return __builtin_amdgcn_workitem_id_y();
case 2: return __builtin_amdgcn_workitem_id_z();
default: return 1;
}
}

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@ -1,31 +0,0 @@
declare i32 @llvm.amdgcn.workitem.id.x() #0
declare i32 @llvm.amdgcn.workitem.id.y() #0
declare i32 @llvm.amdgcn.workitem.id.z() #0
define i32 @get_local_id(i32 %dim) #1 {
switch i32 %dim, label %default [
i32 0, label %x_dim
i32 1, label %y_dim
i32 2, label %z_dim
]
x_dim:
%x = tail call i32 @llvm.amdgcn.workitem.id.x(), !range !0
ret i32 %x
y_dim:
%y = tail call i32 @llvm.amdgcn.workitem.id.y(), !range !0
ret i32 %y
z_dim:
%z = tail call i32 @llvm.amdgcn.workitem.id.z(), !range !0
ret i32 %z
default:
ret i32 0
}
attributes #0 = { nounwind readnone }
attributes #1 = { alwaysinline norecurse nounwind readnone }
!0 = !{ i32 0, i32 2048 }

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@ -0,0 +1,9 @@
#include <clc/clc.h>
_CLC_DEF uint get_work_dim()
{
__attribute__((address_space(2))) uint * ptr =
(__attribute__((address_space(2))) uint *)
__builtin_amdgcn_implicitarg_ptr();
return ptr[0];
}

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@ -1,10 +1,6 @@
atomic/atomic.cl
math/nextafter.cl
math/sqrt.cl
workitem/get_num_groups.ll
workitem/get_local_size.ll
workitem/get_global_size.ll
workitem/get_work_dim.ll
synchronization/barrier.cl
image/get_image_width.cl
image/get_image_height.cl
@ -20,3 +16,6 @@ image/write_imagef.cl
image/write_imagei.cl
image/write_imageui.cl
image/write_image_impl.ll
workitem/get_num_groups.ll
workitem/get_local_size.ll
workitem/get_global_size.ll

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@ -1,8 +0,0 @@
declare i32 @llvm.AMDGPU.read.workdim() nounwind readnone
define i32 @get_work_dim() nounwind readnone alwaysinline {
%x = call i32 @llvm.AMDGPU.read.workdim() nounwind readnone , !range !0
ret i32 %x
}
!0 = !{ i32 1, i32 4 }

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@ -1,3 +1,4 @@
synchronization/barrier_impl.ll
workitem/get_group_id.ll
workitem/get_local_id.ll
workitem/get_group_id.cl
workitem/get_local_id.cl
workitem/get_work_dim.cl

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@ -0,0 +1,11 @@
#include <clc/clc.h>
_CLC_DEF uint get_group_id(uint dim)
{
switch(dim) {
case 0: return __builtin_r600_read_tgid_x();
case 1: return __builtin_r600_read_tgid_y();
case 2: return __builtin_r600_read_tgid_z();
default: return 1;
}
}

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@ -1,29 +0,0 @@
declare i32 @llvm.r600.read.tgid.x() #0
declare i32 @llvm.r600.read.tgid.y() #0
declare i32 @llvm.r600.read.tgid.z() #0
define i32 @get_group_id(i32 %dim) #1 {
switch i32 %dim, label %default [
i32 0, label %x_dim
i32 1, label %y_dim
i32 2, label %z_dim
]
x_dim:
%x = tail call i32 @llvm.r600.read.tgid.x()
ret i32 %x
y_dim:
%y = tail call i32 @llvm.r600.read.tgid.y()
ret i32 %y
z_dim:
%z = tail call i32 @llvm.r600.read.tgid.z()
ret i32 %z
default:
ret i32 0
}
attributes #0 = { nounwind readnone }
attributes #1 = { alwaysinline norecurse nounwind readnone }

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@ -0,0 +1,11 @@
#include <clc/clc.h>
_CLC_DEF uint get_local_id(uint dim)
{
switch(dim) {
case 0: return __builtin_r600_read_tidig_x();
case 1: return __builtin_r600_read_tidig_y();
case 2: return __builtin_r600_read_tidig_z();
default: return 1;
}
}

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@ -1,31 +0,0 @@
declare i32 @llvm.r600.read.tidig.x() #0
declare i32 @llvm.r600.read.tidig.y() #0
declare i32 @llvm.r600.read.tidig.z() #0
define i32 @get_local_id(i32 %dim) #1 {
switch i32 %dim, label %default [
i32 0, label %x_dim
i32 1, label %y_dim
i32 2, label %z_dim
]
x_dim:
%x = tail call i32 @llvm.r600.read.tidig.x(), !range !0
ret i32 %x
y_dim:
%y = tail call i32 @llvm.r600.read.tidig.y(), !range !0
ret i32 %y
z_dim:
%z = tail call i32 @llvm.r600.read.tidig.z(), !range !0
ret i32 %z
default:
ret i32 0
}
attributes #0 = { nounwind readnone }
attributes #1 = { alwaysinline norecurse nounwind readnone }
!0 = !{ i32 0, i32 2048 }

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@ -0,0 +1,9 @@
#include <clc/clc.h>
_CLC_DEF uint get_work_dim()
{
__attribute__((address_space(7))) uint * ptr =
(__attribute__((address_space(7))) uint *)
__builtin_r600_implicitarg_ptr();
return ptr[0];
}