diff --git a/llvm/test/Analysis/ScalarEvolution/pr18606-min-zeros.ll b/llvm/test/Analysis/ScalarEvolution/pr18606-min-zeros.ll
index f4fdf9d3932d..35a622345c03 100644
--- a/llvm/test/Analysis/ScalarEvolution/pr18606-min-zeros.ll
+++ b/llvm/test/Analysis/ScalarEvolution/pr18606-min-zeros.ll
@@ -2,7 +2,7 @@
 
 ; CHECK: @test
 ; CHECK: %5 = add i32 %local_6_, %local_0_
-; CEHCK: %37 = mul i32 %36, %36
+; CHECK: %37 = mul i32 %36, %36
 
 define i32 @test(i32, i32) {
 bci_0:
diff --git a/llvm/test/Analysis/ScalarEvolution/pr18606.ll b/llvm/test/Analysis/ScalarEvolution/pr18606.ll
index 6154a0f7d424..9402304aff9a 100644
--- a/llvm/test/Analysis/ScalarEvolution/pr18606.ll
+++ b/llvm/test/Analysis/ScalarEvolution/pr18606.ll
@@ -2,7 +2,7 @@
 
 ; CHECK: @main
 ; CHECK: %mul.lcssa5 = phi i32 [ %a.promoted4, %entry ], [ %mul.30, %for.body3 ]
-; CEHCK: %mul = mul nsw i32 %mul.lcssa5, %mul.lcssa5
+; CHECK: %mul = mul nsw i32 %mul.lcssa5, %mul.lcssa5
 ; CHECK: %mul.30 = mul nsw i32 %mul.29, %mul.29
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/AArch64/sponentry.ll b/llvm/test/CodeGen/AArch64/sponentry.ll
index 8bd995f22fc0..7e14cf4ac079 100644
--- a/llvm/test/CodeGen/AArch64/sponentry.ll
+++ b/llvm/test/CodeGen/AArch64/sponentry.ll
@@ -17,7 +17,7 @@ define dso_local void @bar() {
 ; CHECK: bar:
 ; CHECK: mov     x29, sp
 ; CHECK: add     x1, x29, #16
-; CEHCK: bl      _setjmpex
+; CHECK: bl      _setjmpex
 
 ; NOFP: str     x30, [sp, #-16]!
 ; NOFP: add     x1, sp, #16
@@ -40,7 +40,7 @@ define dso_local void @foo([24 x i64]*) {
 ; CHECK: sub     sp, sp, #448
 ; CHECK: add     x29, sp, #432
 ; CHECK: add     x1, x29, #16
-; CEHCK: bl      _setjmpex
+; CHECK: bl      _setjmpex
 
 ; NOFP: sub     sp, sp, #432
 ; NOFP: add     x1, sp, #432
@@ -70,7 +70,7 @@ define dso_local void @var_args(i8*, ...) {
 ; CHECK: sub     sp, sp, #96
 ; CHECK: add     x29, sp, #16
 ; CHECK: add     x1, x29, #80
-; CEHCK: bl      _setjmpex
+; CHECK: bl      _setjmpex
 
 ; NOFP: sub     sp, sp, #96
 ; NOFP: add     x1, sp, #96
diff --git a/llvm/test/CodeGen/ARM/macho-embedded-float.ll b/llvm/test/CodeGen/ARM/macho-embedded-float.ll
index c66324c08c27..39745f9851da 100644
--- a/llvm/test/CodeGen/ARM/macho-embedded-float.ll
+++ b/llvm/test/CodeGen/ARM/macho-embedded-float.ll
@@ -12,7 +12,7 @@ define float @test_default_cc(float %a, float %b) {
 ; CHECK-SOFT-DAG: vmov [[A:s[0-9]+]], r0
 ; CHECK-SOFT-DAG: vmov [[B:s[0-9]+]], r1
 ; CHECK-SOFT: vadd.f32 [[RES:s[0-9]+]], [[A]], [[B]]
-; CEHCK-SOFT: vmov r0, [[RES]]
+; CHECK-SOFT: vmov r0, [[RES]]
 
   %res = fadd float %a, %b
   ret float %res
diff --git a/llvm/test/CodeGen/ARM/pr32578.ll b/llvm/test/CodeGen/ARM/pr32578.ll
index 541ba35e5be5..08ce8f813ee6 100644
--- a/llvm/test/CodeGen/ARM/pr32578.ll
+++ b/llvm/test/CodeGen/ARM/pr32578.ll
@@ -4,7 +4,7 @@ target triple = "armv7"
 ; CHECK-LABEL: func:
 ; CHECK: push {r11, lr}
 ; CHECK: vpush {d8}
-; CEHCK: b .LBB0_2
+; CHECK: b .LBB0_2
 define arm_aapcscc double @func() {
   br label %tailrecurse
 
diff --git a/llvm/test/CodeGen/X86/taildup-crash.ll b/llvm/test/CodeGen/X86/taildup-crash.ll
index aeee114adb5b..9a52600f031d 100644
--- a/llvm/test/CodeGen/X86/taildup-crash.ll
+++ b/llvm/test/CodeGen/X86/taildup-crash.ll
@@ -5,7 +5,7 @@ target triple = "x86_64--"
 ; block.
 ; CHECK-LABEL: func:
 ; CHECK: testb
-; CEHCK: je
+; CHECK: je
 ; CHECK: retq
 ; CHECK: jmp
 define hidden void @func() {
diff --git a/llvm/test/MC/ARM/bkpt.s b/llvm/test/MC/ARM/bkpt.s
index fcd4040b186f..14c0385fa063 100644
--- a/llvm/test/MC/ARM/bkpt.s
+++ b/llvm/test/MC/ARM/bkpt.s
@@ -27,6 +27,6 @@ normal_bkpt:
 arm_default_bkpt:
 	bkpt
 
-@ CEHCK-LABEL: arm_default_bkpt
+@ CHECK-LABEL: arm_default_bkpt
 @ CHECK: bkpt #0
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt b/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
index eb531aad8829..62ca34dff1c1 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
@@ -148,8 +148,8 @@
 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x12 0x28 0x00 0x00 # CHECK: mflo $5
-0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra
-0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra
+0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
+0x2d 0x78 0xe0 0x03 # CHECK: move $15, $ra
 0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
 0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
index 9e5260ff8b9d..e7e81d2c64ed 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
@@ -166,8 +166,8 @@
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
 0x12 0x28 0x00 0x00 # CHECK: mflo $5
-0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra
-0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra
+0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
+0x2d 0x78 0xe0 0x03 # CHECK: move $15, $ra
 0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
 0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
index 91b5d8994fb3..6abcdf503997 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
@@ -166,8 +166,8 @@
 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
 0x12 0x28 0x00 0x00 # CHECK: mflo $5
-0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra
-0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra
+0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
+0x2d 0x78 0xe0 0x03 # CHECK: move $15, $ra
 0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
 0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7