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[DebugInfo][X86] Teach Optimize LEAs pass to handle debug values
This patch fixes an issue in the Optimize LEAs pass where redundant LEAs were not removed because they were being used by debug values. The debug values are now ignored when determining whether LEAs are redundant. For now the debug values for the redundant LEAs are marked as undefined, effectively lost. The intention is for a follow up patch which will attempt to preserve the debug values where possible. Patch by Andrew Ng. Differential Revision: https://reviews.llvm.org/D30835 llvm-svn: 298360
This commit is contained in:
Andrea Di Biagio
parent
4cc6130f52
commit
7937be7dd3
@ -389,9 +389,6 @@ bool OptimizeLEAPass::isReplaceable(const MachineInstr &First,
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assert(isLEA(First) && isLEA(Last) &&
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"The function works only with LEA instructions");
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// Get new address displacement.
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AddrDispShift = getAddrDispShift(Last, 1, First, 1);
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// Make sure that LEA def registers belong to the same class. There may be
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// instructions (like MOV8mr_NOREX) which allow a limited set of registers to
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// be used as their operands, so we must be sure that replacing one LEA
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@ -400,10 +397,13 @@ bool OptimizeLEAPass::isReplaceable(const MachineInstr &First,
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MRI->getRegClass(Last.getOperand(0).getReg()))
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return false;
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// Get new address displacement.
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AddrDispShift = getAddrDispShift(Last, 1, First, 1);
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// Loop over all uses of the Last LEA to check that its def register is
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// used only as address base for memory accesses. If so, it can be
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// replaced, otherwise - no.
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for (auto &MO : MRI->use_operands(Last.getOperand(0).getReg())) {
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for (auto &MO : MRI->use_nodbg_operands(Last.getOperand(0).getReg())) {
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MachineInstr &MI = *MO.getParent();
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// Get the number of the first memory operand.
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@ -563,8 +563,9 @@ bool OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) {
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// Loop over all uses of the Last LEA and update their operands. Note
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// that the correctness of this has already been checked in the
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// isReplaceable function.
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for (auto UI = MRI->use_begin(Last.getOperand(0).getReg()),
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UE = MRI->use_end();
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unsigned LastVReg = Last.getOperand(0).getReg();
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for (auto UI = MRI->use_nodbg_begin(LastVReg),
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UE = MRI->use_nodbg_end();
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UI != UE;) {
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MachineOperand &MO = *UI++;
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MachineInstr &MI = *MO.getParent();
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@ -586,6 +587,9 @@ bool OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) {
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Op.setOffset(Op.getOffset() + AddrDispShift);
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}
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// Mark debug values referring to Last LEA as undefined.
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MRI->markUsesInDebugValueAsUndef(LastVReg);
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// Since we can possibly extend register lifetime, clear kill flags.
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MRI->clearKillFlags(First.getOperand(0).getReg());
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@ -594,7 +598,7 @@ bool OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) {
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// By this moment, all of the Last LEA's uses must be replaced. So we
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// can freely remove it.
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assert(MRI->use_empty(Last.getOperand(0).getReg()) &&
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assert(MRI->use_empty(LastVReg) &&
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"The LEA's def register must have no uses");
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Last.eraseFromParent();
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122
llvm/test/CodeGen/X86/lea-opt-with-debug.mir
Normal file
122
llvm/test/CodeGen/X86/lea-opt-with-debug.mir
Normal file
@ -0,0 +1,122 @@
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# RUN: llc -mtriple=x86_64-unknown-unknown -start-after peephole-opt -stop-before detect-dead-lanes -o - %s | FileCheck %s
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# Test that pass optimize LEA can remove a redundant LEA even when it is also
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# used by a DBG_VALUE.
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--- |
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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%struct.A = type { i32, i32, i32 }
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@c = common local_unnamed_addr global %struct.A* null, align 8
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@a = common local_unnamed_addr global i32 0, align 4
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@d = common local_unnamed_addr global i32 0, align 4
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@b = common local_unnamed_addr global i32 0, align 4
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define i32 @fn1() local_unnamed_addr !dbg !8 {
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%1 = load %struct.A*, %struct.A** @c, align 8, !dbg !13
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%2 = load i32, i32* @a, align 4, !dbg !13
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%3 = sext i32 %2 to i64, !dbg !13
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%4 = getelementptr inbounds %struct.A, %struct.A* %1, i64 %3, !dbg !13
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%5 = ptrtoint %struct.A* %4 to i64, !dbg !13
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%6 = trunc i64 %5 to i32, !dbg !13
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store i32 %6, i32* @d, align 4, !dbg !13
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%7 = getelementptr inbounds %struct.A, %struct.A* %1, i64 %3, i32 2, !dbg !14
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tail call void @llvm.dbg.value(metadata i32* %7, i64 0, metadata !11, metadata !15), !dbg !16
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br label %8, !dbg !17
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; <label>:8: ; preds = %8, %0
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%9 = load i32, i32* %7, align 4, !dbg !18
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store i32 %9, i32* @d, align 4, !dbg !18
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br label %8, !dbg !19
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}
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; Function Attrs: nounwind readnone
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declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0
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attributes #0 = { nounwind readnone }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!5, !6, !7}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, globals: !2)
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!1 = !DIFile(filename: "test.c", directory: "")
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!2 = !{}
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!3 = !{!4}
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!4 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!5 = !{i32 2, !"Dwarf Version", i32 4}
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!6 = !{i32 2, !"Debug Info Version", i32 3}
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!7 = !{i32 1, !"PIC Level", i32 2}
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!8 = distinct !DISubprogram(name: "fn1", scope: !1, file: !1, line: 7, type: !9, isLocal: false, isDefinition: true, scopeLine: 7, isOptimized: true, unit: !0, variables: !10)
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!9 = !DISubroutineType(types: !3)
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!10 = !{!11}
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!11 = !DILocalVariable(name: "e", scope: !8, file: !1, line: 8, type: !12)
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!12 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !4, size: 64)
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!13 = !DILocation(line: 9, scope: !8)
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!14 = !DILocation(line: 10, scope: !8)
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!15 = !DIExpression()
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!16 = !DILocation(line: 8, scope: !8)
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!17 = !DILocation(line: 11, scope: !8)
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!18 = !DILocation(line: 13, scope: !8)
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!19 = !DILocation(line: 14, scope: !8)
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...
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---
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name: fn1
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr64 }
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- { id: 1, class: gr64 }
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- { id: 2, class: gr64_nosp }
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- { id: 3, class: gr64_nosp }
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- { id: 4, class: gr64 }
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- { id: 5, class: gr32 }
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- { id: 6, class: gr32 }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0 (%ir-block.0):
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successors: %bb.1(0x80000000)
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; CHECK: %3 = LEA64r %2, 2, %2, 0, _, debug-location !13
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; CHECK-NEXT: %4 = LEA64r %1, 4, %3, 0, _, debug-location !13
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; CHECK-NOT: %0 = LEA64r %1, 4, %3, 8, _, debug-location !14
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; CHECK: DBG_VALUE debug-use _, debug-use _, !11, !15, debug-location !16
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%1 = MOV64rm %rip, 1, _, @c, _, debug-location !13 :: (dereferenceable load 8 from @c)
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%2 = MOVSX64rm32 %rip, 1, _, @a, _, debug-location !13 :: (dereferenceable load 4 from @a)
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%3 = LEA64r %2, 2, %2, 0, _, debug-location !13
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%4 = LEA64r %1, 4, %3, 0, _, debug-location !13
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%5 = COPY %4.sub_32bit, debug-location !13
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MOV32mr %rip, 1, _, @d, _, killed %5, debug-location !13 :: (store 4 into @d)
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%0 = LEA64r %1, 4, %3, 8, _, debug-location !14
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DBG_VALUE debug-use %0, debug-use _, !11, !15, debug-location !16
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; CHECK-LABEL: bb.1 (%ir-block.8):
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; CHECK: %6 = MOV32rm %4, 1, _, 8, _, debug-location !18 :: (load 4 from %ir.7)
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bb.1 (%ir-block.8):
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successors: %bb.1(0x80000000)
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%6 = MOV32rm %0, 1, _, 0, _, debug-location !18 :: (load 4 from %ir.7)
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MOV32mr %rip, 1, _, @d, _, killed %6, debug-location !18 :: (store 4 into @d)
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JMP_1 %bb.1, debug-location !19
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...
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