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Add arm64_32 support to lldb, an ILP32 codegen

Browse Source 
that runs on arm64 ISA targets, specifically 
Apple watches.


Differential Revision: https://reviews.llvm.org/D68858

llvm-svn: 375032
This commit is contained in:
Jason Molenda 2019-10-16 19:14:49 +00:00
parent 930ada91ce
commit 7dd7a36075
36 changed files with 123 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
lldb/include/lldb/Utility/ArchSpec.h
View File

@ -122,6 +122,7 @@ public:
eCore_thumbv7em,
eCore_arm_arm64,
eCore_arm_armv8,
eCore_arm_arm64_32,
eCore_arm_aarch64,
eCore_mips32,

4
lldb/packages/Python/lldbsuite/test/arm/breakpoint-it/TestBreakpointIt.py
View File

@ -17,7 +17,7 @@ class TestBreakpointIt(TestBase):
NO_DEBUG_INFO_TESTCASE = True
@skipIf(archs=no_match(["arm"]))
@skipIf(archs=["arm64", "arm64e"])
@skipIf(archs=["arm64", "arm64e", "arm64_32"])
def test_false(self):
self.build()
exe = self.getBuildArtifact("a.out")
@ -31,7 +31,7 @@ class TestBreakpointIt(TestBase):
"Breakpoint does not get hit")
@skipIf(archs=no_match(["arm"]))
@skipIf(archs=["arm64", "arm64e"])
@skipIf(archs=["arm64", "arm64e", "arm64_32"])
def test_true(self):
self.build()
exe = self.getBuildArtifact("a.out")

2
lldb/packages/Python/lldbsuite/test/commands/expression/call-function/TestCallStdStringFunction.py
View File

@ -50,7 +50,7 @@ class ExprCommandCallFunctionTestCase(TestBase):
# skip this part of the test.
triple = self.dbg.GetSelectedPlatform().GetTriple()
do_cstr_test = True
if triple == "arm64-apple-ios" or triple == "arm64-apple-tvos" or triple == "armv7k-apple-watchos" or triple == "arm64-apple-bridgeos":
if triple in ["arm64-apple-ios", "arm64e-apple-ios", "arm64-apple-tvos", "armv7k-apple-watchos", "arm64-apple-bridgeos", "arm64_32-apple-watchos"]:
do_cstr_test = False
if do_cstr_test:
self.expect("print str.c_str()",

4
lldb/packages/Python/lldbsuite/test/commands/expression/char/TestExprsChar.py
View File

@ -59,8 +59,10 @@ class ExprCharTestCase(TestBase):
"i[3-6]86",
"x86_64",
"arm64",
'arm64e',
'armv7',
'armv7k'],
'armv7k',
'arm64_32'],
bugnumber="llvm.org/pr23069, <rdar://problem/28721938>")
@expectedFailureAll(triple='mips*', bugnumber="llvm.org/pr23069")
def test_unsigned_char(self):

2
lldb/packages/Python/lldbsuite/test/commands/expression/persist_objc_pointeetype/TestPersistObjCPointeeType.py
View File

@ -23,7 +23,7 @@ class PersistObjCPointeeType(TestBase):
@skipUnlessDarwin
@skipIf(archs=["i386", "i686"])
@skipIf(debug_info="gmodules", archs=['arm64', 'armv7', 'armv7k']) # compile error with gmodules for iOS
@skipIf(debug_info="gmodules", archs=['arm64', 'armv7', 'armv7k', 'arm64e', 'arm64_32']) # compile error with gmodules for iOS
def test_with(self):
"""Test that we can p *objcObject"""
self.build()

6
lldb/packages/Python/lldbsuite/test/commands/register/register/register_command/TestRegisters.py
View File

@ -44,7 +44,7 @@ class RegisterCommandsTestCase(TestBase):
self.runCmd("register read xmm0")
self.runCmd("register read ymm15") # may be available
self.runCmd("register read bnd0") # may be available
elif self.getArchitecture() in ['arm', 'armv7', 'armv7k', 'arm64']:
elif self.getArchitecture() in ['arm', 'armv7', 'armv7k', 'arm64', 'arm64e', 'arm64_32']:
self.runCmd("register read s0")
self.runCmd("register read q15") # may be available
@ -89,7 +89,7 @@ class RegisterCommandsTestCase(TestBase):
if self.getArchitecture() in ['amd64', 'i386', 'x86_64']:
gpr = "eax"
vector = "xmm0"
elif self.getArchitecture() in ['arm64', 'aarch64']:
elif self.getArchitecture() in ['arm64', 'aarch64', 'arm64e', 'arm64_32']:
gpr = "w0"
vector = "v0"
elif self.getArchitecture() in ['arm', 'armv7', 'armv7k']:
@ -335,7 +335,7 @@ class RegisterCommandsTestCase(TestBase):
("xmm15",
"{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x0e 0x0f}",
False))
elif self.getArchitecture() in ['arm64', 'aarch64']:
elif self.getArchitecture() in ['arm64', 'aarch64', 'arm64e', 'arm64_32']:
reg_list = [
# reg value
# must-have

2
lldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-objc/nsindexpath/TestDataFormatterNSIndexPath.py
View File

@ -43,7 +43,7 @@ class NSIndexPathDataFormatterTestCase(TestBase):
@skipUnlessDarwin
@expectedFailureAll(archs=['i386'], bugnumber="rdar://28656605")
@expectedFailureAll(archs=['armv7', 'armv7k'], bugnumber="rdar://problem/34561607") # NSIndexPath formatter isn't working for 32-bit arm
@expectedFailureAll(archs=['armv7', 'armv7k', 'arm64_32'], bugnumber="rdar://problem/34561607") # NSIndexPath formatter isn't working for 32-bit arm
def test_nsindexpath_with_run_command(self):
"""Test formatters for NSIndexPath."""
self.appkit_tester_impl(self.nsindexpath_data_formatter_commands)

2
lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
View File

@ -27,7 +27,7 @@ def check_first_register_readable(test_case):
test_case.expect("register read eax", substrs=['eax = 0x'])
elif arch in ['arm', 'armv7', 'armv7k']:
test_case.expect("register read r0", substrs=['r0 = 0x'])
elif arch in ['aarch64', 'arm64']:
elif arch in ['aarch64', 'arm64', 'arm64e', 'arm64_32']:
test_case.expect("register read x0", substrs=['x0 = 0x'])
elif re.match("mips", arch):
test_case.expect("register read zero", substrs=['zero = 0x'])

2
lldb/packages/Python/lldbsuite/test/python_api/watchpoint/TestWatchpointIter.py
View File

@ -18,7 +18,7 @@ class WatchpointIteratorTestCase(TestBase):
# hardware watchpoints are not reported with a hardware index # on armv7 on ios devices
def affected_by_radar_34564183(self):
return (self.getArchitecture() == 'armv7' or self.getArchitecture() == 'armv7k') and self.platformIsDarwin()
return (self.getArchitecture() in ['armv7', 'armv7k', 'arm64_32']) and self.platformIsDarwin()
def setUp(self):
# Call super's setUp().

2
lldb/source/Host/common/NativeProcessProtocol.cpp
View File

@ -527,6 +527,7 @@ NativeProcessProtocol::GetSoftwareBreakpointTrapOpcode(size_t size_hint) {
switch (GetArchitecture().GetMachine()) {
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
return llvm::makeArrayRef(g_aarch64_opcode);
case llvm::Triple::x86:
@ -563,6 +564,7 @@ size_t NativeProcessProtocol::GetSoftwareBreakpointPCOffset() {
case llvm::Triple::arm:
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
case llvm::Triple::mips64:
case llvm::Triple::mips64el:
case llvm::Triple::mips:

6
lldb/source/Host/macosx/objcxx/Host.mm
View File

@ -471,6 +471,12 @@ static bool GetMacOSXProcessCPUType(ProcessInstanceInfo &process_info) {
break;
#endif
#if defined(CPU_TYPE_ARM64_32) && defined(CPU_SUBTYPE_ARM64_32_ALL)
case CPU_TYPE_ARM64_32:
sub = CPU_SUBTYPE_ARM64_32_ALL;
break;
#endif
case CPU_TYPE_ARM: {
// Note that we fetched the cpu type from the PROCESS but we can't get a
// cpusubtype of the

12
lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
View File

@ -42,6 +42,11 @@
#define CPU_TYPE_ARM64 (CPU_TYPE_ARM | CPU_ARCH_ABI64)
#endif
#ifndef CPU_TYPE_ARM64_32
#define CPU_ARCH_ABI64_32 0x02000000
#define (CPU_TYPE_ARM | CPU_ARCH_ABI64_32)
#endif
#include <TargetConditionals.h> // for TARGET_OS_TV, TARGET_OS_WATCH
using namespace lldb_private;
@ -257,7 +262,9 @@ void HostInfoMacOSX::ComputeHostArchitectureSupport(ArchSpec &arch_32,
arch_32.SetArchitecture(eArchTypeMachO, cputype & ~(CPU_ARCH_MASK),
cpusubtype32);
if (cputype == CPU_TYPE_ARM || cputype == CPU_TYPE_ARM64) {
if (cputype == CPU_TYPE_ARM ||
cputype == CPU_TYPE_ARM64 ||
cputype == CPU_TYPE_ARM64_32) {
// When running on a watch or tv, report the host os correctly
#if defined(TARGET_OS_TV) && TARGET_OS_TV == 1
arch_32.GetTriple().setOS(llvm::Triple::TvOS);
@ -265,6 +272,9 @@ void HostInfoMacOSX::ComputeHostArchitectureSupport(ArchSpec &arch_32,
#elif defined(TARGET_OS_BRIDGE) && TARGET_OS_BRIDGE == 1
arch_32.GetTriple().setOS(llvm::Triple::BridgeOS);
arch_64.GetTriple().setOS(llvm::Triple::BridgeOS);
#elif defined(TARGET_OS_WATCHOS) && TARGET_OS_WATCHOS == 1
arch_32.GetTriple().setOS(llvm::Triple::WatchOS);
arch_64.GetTriple().setOS(llvm::Triple::WatchOS);
#else
arch_32.GetTriple().setOS(llvm::Triple::IOS);
arch_64.GetTriple().setOS(llvm::Triple::IOS);

3
lldb/source/Plugins/ABI/MacOSX-arm64/ABIMacOSX_arm64.cpp
View File

@ -1665,7 +1665,8 @@ ABIMacOSX_arm64::CreateInstance(ProcessSP process_sp, const ArchSpec &arch) {
const llvm::Triple::VendorType vendor_type = arch.GetTriple().getVendor();
if (vendor_type == llvm::Triple::Apple) {
if (arch_type == llvm::Triple::aarch64) {
if (arch_type == llvm::Triple::aarch64 ||
arch_type == llvm::Triple::aarch64_32) {
return ABISP(
new ABIMacOSX_arm64(std::move(process_sp), MakeMCRegisterInfo(arch)));
}

3
lldb/source/Plugins/ABI/SysV-arm64/ABISysV_arm64.cpp
View File

@ -1668,7 +1668,8 @@ ABISysV_arm64::CreateInstance(lldb::ProcessSP process_sp, const ArchSpec &arch)
const llvm::Triple::VendorType vendor_type = arch.GetTriple().getVendor();
if (vendor_type != llvm::Triple::Apple) {
if (arch_type == llvm::Triple::aarch64) {
if (arch_type == llvm::Triple::aarch64 ||
arch_type == llvm::Triple::aarch64_32) {
return ABISP(
new ABISysV_arm64(std::move(process_sp), MakeMCRegisterInfo(arch)));
}

6
lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
View File

@ -1189,10 +1189,12 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch,
// If any AArch64 variant, enable the ARMv8.5 ISA with SVE extensions so we
// can disassemble newer instructions.
if (triple.getArch() == llvm::Triple::aarch64)
if (triple.getArch() == llvm::Triple::aarch64 ||
triple.getArch() == llvm::Triple::aarch64_32)
features_str += "+v8.5a,+sve2";
if (triple.getArch() == llvm::Triple::aarch64
if ((triple.getArch() == llvm::Triple::aarch64 ||
triple.getArch() == llvm::Triple::aarch64_32)
&& triple.getVendor() == llvm::Triple::Apple) {
cpu = "apple-latest";
}

3
lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
View File

@ -234,7 +234,8 @@ void DynamicLoaderMacOSXDYLD::DoInitialImageFetch() {
ReadDYLDInfoFromMemoryAndSetNotificationCallback(0x7fff5fc00000ull);
} else if (exe_arch.GetMachine() == llvm::Triple::arm ||
exe_arch.GetMachine() == llvm::Triple::thumb ||
exe_arch.GetMachine() == llvm::Triple::aarch64) {
exe_arch.GetMachine() == llvm::Triple::aarch64 ||
exe_arch.GetMachine() == llvm::Triple::aarch64_32) {
ReadDYLDInfoFromMemoryAndSetNotificationCallback(0x2fe00000);
} else {
ReadDYLDInfoFromMemoryAndSetNotificationCallback(0x8fe00000);

3
lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp
View File

@ -302,7 +302,8 @@ bool ClangExpressionSourceCode::GetText(
Target *target = exe_ctx.GetTargetPtr();
if (target) {
if (target->GetArchitecture().GetMachine() == llvm::Triple::aarch64) {
if (target->GetArchitecture().GetMachine() == llvm::Triple::aarch64 ||
target->GetArchitecture().GetMachine() == llvm::Triple::aarch64_32) {
target_specific_defines = "typedef bool BOOL;\n";
}
if (target->GetArchitecture().GetMachine() == llvm::Triple::x86_64) {

3
lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp
View File

@ -149,7 +149,8 @@ EmulateInstructionARM64::CreateInstance(const ArchSpec &arch,
InstructionType inst_type) {
if (EmulateInstructionARM64::SupportsEmulatingInstructionsOfTypeStatic(
inst_type)) {
if (arch.GetTriple().getArch() == llvm::Triple::aarch64) {
if (arch.GetTriple().getArch() == llvm::Triple::aarch64 ||
arch.GetTriple().getArch() == llvm::Triple::aarch64_32) {
return new EmulateInstructionARM64(arch);
}
}

4
lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
View File

@ -5189,6 +5189,7 @@ lldb_private::Address ObjectFileMachO::GetEntryPointAddress() {
}
break;
case llvm::MachO::CPU_TYPE_ARM64:
case llvm::MachO::CPU_TYPE_ARM64_32:
if (flavor == 6) // ARM_THREAD_STATE64 from mach/arm/thread_status.h
{
offset += 256; // This is the offset of pc in the GPR thread state
@ -5469,6 +5470,7 @@ ObjectFileMachO::GetThreadContextAtIndex(uint32_t idx,
switch (m_header.cputype) {
case llvm::MachO::CPU_TYPE_ARM64:
case llvm::MachO::CPU_TYPE_ARM64_32:
reg_ctx_sp =
std::make_shared<RegisterContextDarwin_arm64_Mach>(thread, data);
break;
@ -6029,6 +6031,7 @@ bool ObjectFileMachO::SaveCore(const lldb::ProcessSP &process_sp,
bool make_core = false;
switch (target_arch.GetMachine()) {
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
case llvm::Triple::arm:
case llvm::Triple::thumb:
case llvm::Triple::x86:
@ -6131,6 +6134,7 @@ bool ObjectFileMachO::SaveCore(const lldb::ProcessSP &process_sp,
if (thread_sp) {
switch (mach_header.cputype) {
case llvm::MachO::CPU_TYPE_ARM64:
case llvm::MachO::CPU_TYPE_ARM64_32:
RegisterContextDarwin_arm64_Mach::Create_LC_THREAD(
thread_sp.get(), LC_THREAD_datas[thread_idx]);
break;

7
lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
View File

@ -418,11 +418,10 @@ PlatformDarwin::GetSoftwareBreakpointTrapOpcode(Target &target,
llvm::Triple::ArchType machine = target.GetArchitecture().GetMachine();
switch (machine) {
case llvm::Triple::aarch64_32:
case llvm::Triple::aarch64: {
// TODO: fix this with actual darwin breakpoint opcode for arm64.
// right now debugging uses the Z packets with GDB remote so this is not
// needed, but the size needs to be correct...
static const uint8_t g_arm64_breakpoint_opcode[] = {0xFE, 0xDE, 0xFF, 0xE7};
// 'brk #0' or 0xd4200000 in BE byte order
static const uint8_t g_arm64_breakpoint_opcode[] = {0x00, 0x00, 0x20, 0xD4};
trap_opcode = g_arm64_breakpoint_opcode;
trap_opcode_size = sizeof(g_arm64_breakpoint_opcode);
} break;

16
lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleWatch.cpp
View File

@ -75,6 +75,7 @@ PlatformSP PlatformRemoteAppleWatch::CreateInstance(bool force,
switch (arch->GetMachine()) {
case llvm::Triple::arm:
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
case llvm::Triple::thumb: {
const llvm::Triple &triple = arch->GetTriple();
llvm::Triple::VendorType vendor = triple.getVendor();
@ -176,6 +177,9 @@ bool PlatformRemoteAppleWatch::GetSupportedArchitectureAtIndex(uint32_t idx,
case 6:
arch.SetTriple("thumbv7s-apple-watchos");
return true;
case 7:
arch.SetTriple("arm64_32-apple-watchos");
return true;
default:
break;
}
@ -204,6 +208,9 @@ bool PlatformRemoteAppleWatch::GetSupportedArchitectureAtIndex(uint32_t idx,
case 6:
arch.SetTriple("thumbv7s-apple-watchos");
return true;
case 7:
arch.SetTriple("arm64_32-apple-watchos");
return true;
default:
break;
}
@ -229,6 +236,9 @@ bool PlatformRemoteAppleWatch::GetSupportedArchitectureAtIndex(uint32_t idx,
case 5:
arch.SetTriple("thumbv7s-apple-watchos");
return true;
case 6:
arch.SetTriple("arm64_32-apple-watchos");
return true;
default:
break;
}
@ -254,6 +264,9 @@ bool PlatformRemoteAppleWatch::GetSupportedArchitectureAtIndex(uint32_t idx,
case 5:
arch.SetTriple("thumbv7s-apple-watchos");
return true;
case 6:
arch.SetTriple("arm64_32-apple-watchos");
return true;
default:
break;
}
@ -273,6 +286,9 @@ bool PlatformRemoteAppleWatch::GetSupportedArchitectureAtIndex(uint32_t idx,
case 3:
arch.SetTriple("thumbv7-apple-watchos");
return true;
case 4:
arch.SetTriple("arm64_32-apple-watchos");
return true;
default:
break;
}

1
lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
View File

@ -536,6 +536,7 @@ void DynamicRegisterInfo::Finalize(const ArchSpec &arch) {
if (!generic_regs_specified) {
switch (arch.GetMachine()) {
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
case llvm::Triple::aarch64_be:
for (auto &reg : m_regs) {
if (strcmp(reg.name, "pc") == 0)

2
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
View File

@ -109,6 +109,7 @@ RegisterContextPOSIX_arm64::RegisterContextPOSIX_arm64(
switch (register_info->m_target_arch.GetMachine()) {
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
m_reg_info.num_registers = k_num_registers_arm64;
m_reg_info.num_gpr_registers = k_num_gpr_registers_arm64;
m_reg_info.num_fpr_registers = k_num_fpr_registers_arm64;
@ -184,6 +185,7 @@ RegisterContextPOSIX_arm64::GetRegisterSet(size_t set) {
if (IsRegisterSetAvailable(set)) {
switch (m_register_info_up->m_target_arch.GetMachine()) {
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
return &g_reg_sets_arm64[set];
default:
assert(false && "Unhandled target architecture.");

2
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
View File

@ -57,6 +57,7 @@ static const lldb_private::RegisterInfo *
GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
switch (target_arch.GetMachine()) {
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
return g_register_infos_arm64_le;
default:
assert(false && "Unhandled target architecture.");
@ -68,6 +69,7 @@ static uint32_t
GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
switch (target_arch.GetMachine()) {
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
return static_cast<uint32_t>(sizeof(g_register_infos_arm64_le) /
sizeof(g_register_infos_arm64_le[0]));
default:

1
lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
View File

@ -416,6 +416,7 @@ StopInfoSP StopInfoMachException::CreateStopReasonWithMachException(
}
break;
case llvm::Triple::aarch64_32:
case llvm::Triple::aarch64: {
if (exc_code == 1 && exc_sub_code == 0) // EXC_ARM_BREAKPOINT
{

4
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
View File

@ -1271,6 +1271,7 @@ bool GDBRemoteCommunicationClient::GetHostInfo(bool force) {
host_triple.getOS() == llvm::Triple::Darwin) {
switch (m_host_arch.GetMachine()) {
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
case llvm::Triple::arm:
case llvm::Triple::thumb:
host_triple.setOS(llvm::Triple::IOS);
@ -3182,7 +3183,8 @@ bool GDBRemoteCommunicationClient::AvoidGPackets(ProcessGDBRemote *process) {
if (arch.IsValid() &&
arch.GetTriple().getVendor() == llvm::Triple::Apple &&
arch.GetTriple().getOS() == llvm::Triple::IOS &&
arch.GetTriple().getArch() == llvm::Triple::aarch64) {
(arch.GetTriple().getArch() == llvm::Triple::aarch64 ||
arch.GetTriple().getArch() == llvm::Triple::aarch64_32)) {
m_avoid_g_packets = eLazyBoolYes;
uint32_t gdb_server_version = GetGDBServerProgramVersion();
if (gdb_server_version != 0) {

2
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
View File

@ -231,6 +231,7 @@ GDBRemoteCommunicationServerCommon::Handle_qHostInfo(
#else
if (host_arch.GetMachine() == llvm::Triple::aarch64 ||
host_arch.GetMachine() == llvm::Triple::aarch64_32 ||
host_arch.GetMachine() == llvm::Triple::aarch64_be ||
host_arch.GetMachine() == llvm::Triple::arm ||
host_arch.GetMachine() == llvm::Triple::armeb || host_arch.IsMIPS())
@ -1243,6 +1244,7 @@ void GDBRemoteCommunicationServerCommon::
case llvm::Triple::arm:
case llvm::Triple::thumb:
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
ostype = "ios";
break;
default:

4
lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
View File

@ -637,7 +637,9 @@ bool GDBRemoteRegisterContext::WriteAllRegisterValues(
if (m_thread.GetProcess().get()) {
const ArchSpec &arch =
m_thread.GetProcess()->GetTarget().GetArchitecture();
if (arch.IsValid() && arch.GetMachine() == llvm::Triple::aarch64 &&
if (arch.IsValid() &&
(arch.GetMachine() == llvm::Triple::aarch64 ||
arch.GetMachine() == llvm::Triple::aarch64_32) &&
arch.GetTriple().getVendor() == llvm::Triple::Apple &&
arch.GetTriple().getOS() == llvm::Triple::IOS) {
arm64_debugserver = true;

1
lldb/source/Symbol/ClangASTContext.cpp
View File

@ -578,6 +578,7 @@ lldb::TypeSystemSP ClangASTContext::CreateInstance(lldb::LanguageType language,
fixed_arch.GetTriple().getOS() == llvm::Triple::UnknownOS) {
if (fixed_arch.GetTriple().getArch() == llvm::Triple::arm ||
fixed_arch.GetTriple().getArch() == llvm::Triple::aarch64 ||
fixed_arch.GetTriple().getArch() == llvm::Triple::aarch64_32 ||
fixed_arch.GetTriple().getArch() == llvm::Triple::thumb) {
fixed_arch.GetTriple().setOS(llvm::Triple::IOS);
} else {

3
lldb/source/Symbol/CompactUnwindInfo.cpp
View File

@ -213,7 +213,8 @@ bool CompactUnwindInfo::GetUnwindPlan(Target &target, Address addr,
return CreateUnwindPlan_x86_64(target, function_info, unwind_plan,
addr);
}
if (arch.GetTriple().getArch() == llvm::Triple::aarch64) {
if (arch.GetTriple().getArch() == llvm::Triple::aarch64 ||
arch.GetTriple().getArch() == llvm::Triple::aarch64_32) {
return CreateUnwindPlan_arm64(target, function_info, unwind_plan, addr);
}
if (arch.GetTriple().getArch() == llvm::Triple::x86) {

1
lldb/source/Target/Platform.cpp
View File

@ -1816,6 +1816,7 @@ size_t Platform::GetSoftwareBreakpointTrapOpcode(Target &target,
size_t trap_opcode_size = 0;
switch (arch.GetMachine()) {
case llvm::Triple::aarch64_32:
case llvm::Triple::aarch64: {
static const uint8_t g_aarch64_opcode[] = {0x00, 0x00, 0x20, 0xd4};
trap_opcode = g_aarch64_opcode;

1
lldb/source/Target/Thread.cpp
View File

@ -2050,6 +2050,7 @@ Unwind *Thread::GetUnwinder() {
case llvm::Triple::x86:
case llvm::Triple::arm:
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
case llvm::Triple::thumb:
case llvm::Triple::mips:
case llvm::Triple::mipsel:

15
lldb/source/Utility/ArchSpec.cpp
View File

@ -101,6 +101,8 @@ static const CoreDefinition g_core_definitions[] = {
ArchSpec::eCore_arm_arm64, "arm64"},
{eByteOrderLittle, 8, 4, 4, llvm::Triple::aarch64,
ArchSpec::eCore_arm_armv8, "armv8"},
{eByteOrderLittle, 4, 4, 4, llvm::Triple::aarch64_32,
ArchSpec::eCore_arm_arm64_32, "arm64_32"},
{eByteOrderLittle, 8, 4, 4, llvm::Triple::aarch64,
ArchSpec::eCore_arm_aarch64, "aarch64"},
@ -296,6 +298,10 @@ static const ArchDefinitionEntry g_macho_arch_entries[] = {
SUBTYPE_MASK},
{ArchSpec::eCore_arm_arm64, llvm::MachO::CPU_TYPE_ARM64, 13, UINT32_MAX,
SUBTYPE_MASK},
{ArchSpec::eCore_arm_arm64_32, llvm::MachO::CPU_TYPE_ARM64_32, 0,
UINT32_MAX, SUBTYPE_MASK},
{ArchSpec::eCore_arm_arm64_32, llvm::MachO::CPU_TYPE_ARM64_32, 1,
UINT32_MAX, SUBTYPE_MASK},
{ArchSpec::eCore_arm_arm64, llvm::MachO::CPU_TYPE_ARM64, CPU_ANY,
UINT32_MAX, SUBTYPE_MASK},
{ArchSpec::eCore_thumb, llvm::MachO::CPU_TYPE_ARM, 0, UINT32_MAX,
@ -752,6 +758,7 @@ bool ArchSpec::CharIsSignedByDefault() const {
return true;
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_32:
case llvm::Triple::aarch64_be:
case llvm::Triple::arm:
case llvm::Triple::armeb:
@ -1239,6 +1246,14 @@ static bool cores_match(const ArchSpec::Core core1, const ArchSpec::Core core2,
}
break;
case ArchSpec::eCore_arm_arm64_32:
if (!enforce_exact_match) {
if (core2 == ArchSpec::eCore_arm_generic)
return true;
try_inverse = false;
}
break;
case ArchSpec::eCore_mips32:
if (!enforce_exact_match) {
if (core2 >= ArchSpec::kCore_mips32_first &&

2
lldb/tools/compact-unwind/compact-unwind-dumper.c
View File

@ -1149,7 +1149,7 @@ void print_encoding(struct baton baton, uint8_t *function_start,
print_encoding_x86_64(baton, function_start, encoding);
} else if (baton.cputype == CPU_TYPE_I386) {
print_encoding_i386(baton, function_start, encoding);
} else if (baton.cputype == CPU_TYPE_ARM64) {
} else if (baton.cputype == CPU_TYPE_ARM64 || baton.cputype == CPU_TYPE_ARM64_32) {
print_encoding_arm64(baton, function_start, encoding);
} else if (baton.cputype == CPU_TYPE_ARM) {
print_encoding_armv7(baton, function_start, encoding);

3
lldb/tools/debugserver/source/DNB.cpp
View File

@ -1719,7 +1719,8 @@ nub_bool_t DNBSetArchitecture(const char *arch) {
else if ((strcasecmp(arch, "x86_64") == 0) ||
(strcasecmp(arch, "x86_64h") == 0))
return DNBArchProtocol::SetArchitecture(CPU_TYPE_X86_64);
else if (strstr(arch, "arm64_32") == arch)
else if (strstr(arch, "arm64_32") == arch ||
strstr(arch, "aarch64_32") == arch)
return DNBArchProtocol::SetArchitecture(CPU_TYPE_ARM64_32);
else if (strstr(arch, "arm64") == arch || strstr(arch, "armv8") == arch ||
strstr(arch, "aarch64") == arch)

16
lldb/unittests/Utility/ArchSpecTest.cpp
View File

@ -157,8 +157,13 @@ TEST(ArchSpecTest, MergeFrom) {
ArchSpec A("aarch64");
ArchSpec B("aarch64--linux-android");
ArchSpec C("arm64_32");
ArchSpec D("arm64_32--watchos");
EXPECT_TRUE(A.IsValid());
EXPECT_TRUE(B.IsValid());
EXPECT_TRUE(C.IsValid());
EXPECT_TRUE(D.IsValid());
EXPECT_EQ(llvm::Triple::ArchType::aarch64, B.GetTriple().getArch());
EXPECT_EQ(llvm::Triple::VendorType::UnknownVendor,
@ -174,6 +179,17 @@ TEST(ArchSpecTest, MergeFrom) {
EXPECT_EQ(llvm::Triple::OSType::Linux, A.GetTriple().getOS());
EXPECT_EQ(llvm::Triple::EnvironmentType::Android,
A.GetTriple().getEnvironment());
EXPECT_EQ(llvm::Triple::ArchType::aarch64_32, D.GetTriple().getArch());
EXPECT_EQ(llvm::Triple::VendorType::UnknownVendor,
D.GetTriple().getVendor());
EXPECT_EQ(llvm::Triple::OSType::WatchOS, D.GetTriple().getOS());
C.MergeFrom(D);
EXPECT_EQ(llvm::Triple::ArchType::aarch64_32, C.GetTriple().getArch());
EXPECT_EQ(llvm::Triple::VendorType::UnknownVendor,
C.GetTriple().getVendor());
EXPECT_EQ(llvm::Triple::OSType::WatchOS, C.GetTriple().getOS());
}
{
ArchSpec A, B;