diff --git a/llvm/lib/CodeGen/RegAllocLinearScan.cpp b/llvm/lib/CodeGen/RegAllocLinearScan.cpp
index 144f0a7d430f..d43cc19683c4 100644
--- a/llvm/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/llvm/lib/CodeGen/RegAllocLinearScan.cpp
@@ -685,14 +685,8 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
     }
 
     // All registers must have inf weight. Just grab one!
-    if (!minReg) {
-      if (active_.size() == 0) {
-        // FIXME: All the registers are occupied by fixed intervals.
-        cerr << "Register allocator ran out of registers!\n";
-        abort();
-      }
+    if (!minReg)
       minReg = *RC->allocation_order_begin(*mf_);
-    }
   }
   
   DOUT << "\t\tregister with min weight: "