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AMDGPU/SI: Don't promote alloca to vector for atomic load/store

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Summary:
  Don't promote alloca to vector for atomic load/store

Reviewer:
  arsenm

Differential Revision:
  https://reviews.llvm.org/D46085

llvm-svn: 332673
This commit is contained in:
Changpeng Fang 2018-05-17 21:49:44 +00:00
parent 1de9fce151
commit 860d460063
2 changed files with 70 additions and 3 deletions
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8
llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
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@ -323,17 +323,19 @@ static Value* GEPToVectorIndex(GetElementPtrInst *GEP) {
static bool canVectorizeInst(Instruction *Inst, User *User) {
switch (Inst->getOpcode()) {
case Instruction::Load: {
// Currently only handle the case where the Pointer Operand is a GEP.
// Also we could not vectorize volatile or atomic loads.
LoadInst *LI = cast<LoadInst>(Inst);
// Currently only handle the case where the Pointer Operand is a GEP so check for that case.
return isa<GetElementPtrInst>(LI->getPointerOperand()) && !LI->isVolatile();
return isa<GetElementPtrInst>(LI->getPointerOperand()) && LI->isSimple();
}
case Instruction::BitCast:
return true;
case Instruction::Store: {
// Must be the stored pointer operand, not a stored value, plus
// since it should be canonical form, the User should be a GEP.
// Also we could not vectorize volatile or atomic stores.
StoreInst *SI = cast<StoreInst>(Inst);
return (SI->getPointerOperand() == User) && isa<GetElementPtrInst>(User) && !SI->isVolatile();
return (SI->getPointerOperand() == User) && isa<GetElementPtrInst>(User) && SI->isSimple();
}
default:
return false;

65
llvm/test/CodeGen/AMDGPU/vector-alloca-atomic.ll Normal file
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@ -0,0 +1,65 @@
; RUN: opt -S -mtriple=amdgcn-- -data-layout=A5 -amdgpu-promote-alloca -sroa -instcombine < %s | FileCheck -check-prefix=OPT %s
; Show that what the alloca promotion pass will do for non-atomic load/store.
; OPT-LABEL: @vector_alloca_not_atomic(
;
; OPT: extractelement <3 x i32> <i32 0, i32 1, i32 2>, i64 %index
define amdgpu_kernel void @vector_alloca_not_atomic(i32 addrspace(1)* %out, i64 %index) {
entry:
%alloca = alloca [3 x i32], addrspace(5)
%a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
%a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
%a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
store i32 0, i32 addrspace(5)* %a0
store i32 1, i32 addrspace(5)* %a1
store i32 2, i32 addrspace(5)* %a2
%tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
%data = load i32, i32 addrspace(5)* %tmp
store i32 %data, i32 addrspace(1)* %out
ret void
}
; OPT-LABEL: @vector_alloca_atomic_read(
;
; OPT: alloca [3 x i32]
; OPT: store i32 0, i32 addrspace(5)*
; OPT: store i32 1, i32 addrspace(5)*
; OPT: store i32 2, i32 addrspace(5)*
; OPT: load atomic i32, i32 addrspace(5)*
define amdgpu_kernel void @vector_alloca_atomic_read(i32 addrspace(1)* %out, i64 %index) {
entry:
%alloca = alloca [3 x i32], addrspace(5)
%a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
%a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
%a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
store i32 0, i32 addrspace(5)* %a0
store i32 1, i32 addrspace(5)* %a1
store i32 2, i32 addrspace(5)* %a2
%tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
%data = load atomic i32, i32 addrspace(5)* %tmp acquire, align 4
store i32 %data, i32 addrspace(1)* %out
ret void
}
; OPT-LABEL: @vector_alloca_atomic_write(
;
; OPT: alloca [3 x i32]
; OPT: store atomic i32 0, i32 addrspace(5)
; OPT: store atomic i32 1, i32 addrspace(5)
; OPT: store atomic i32 2, i32 addrspace(5)
; OPT: load i32, i32 addrspace(5)*
define amdgpu_kernel void @vector_alloca_atomic_write(i32 addrspace(1)* %out, i64 %index) {
entry:
%alloca = alloca [3 x i32], addrspace(5)
%a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
%a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
%a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
store atomic i32 0, i32 addrspace(5)* %a0 release, align 4
store atomic i32 1, i32 addrspace(5)* %a1 release, align 4
store atomic i32 2, i32 addrspace(5)* %a2 release, align 4
%tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
%data = load i32, i32 addrspace(5)* %tmp
store i32 %data, i32 addrspace(1)* %out
ret void
}