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[X86][Inline] Skip inline asm in inlining target feature check (#83820)
When inlining across functions with different target features, we perform roughly two checks: 1. The caller features must be a superset of the callee features. 2. Calls in the callee cannot use types where the target features would change the call ABI (e.g. by changing whether something is passed in a zmm or two ymm registers). The latter check is very crude right now. The latter check currently also catches inline asm "calls". I believe that inline asm should be excluded from this check, as it is independent from the usual call ABI, and instead governed by the inline asm constraint string. Fixes https://github.com/llvm/llvm-project/issues/67054. (cherry picked from commit e84182af919d136d74b75ded4d599b38fb47dfb0)
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@ -6080,6 +6080,10 @@ bool X86TTIImpl::areInlineCompatible(const Function *Caller,
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for (const Instruction &I : instructions(Callee)) {
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if (const auto *CB = dyn_cast<CallBase>(&I)) {
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// Having more target features is fine for inline ASM.
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if (CB->isInlineAsm())
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continue;
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SmallVector<Type *, 8> Types;
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for (Value *Arg : CB->args())
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Types.push_back(Arg->getType());
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@ -94,27 +94,22 @@ define internal void @caller_not_avx4() {
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declare i64 @caller_unknown_simple(i64)
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; FIXME: This call should get inlined, because the callee only contains
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; This call should get inlined, because the callee only contains
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; inline ASM, not real calls.
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define <8 x i64> @caller_inline_asm(ptr %p0, i64 %k, ptr %p1, ptr %p2) #0 {
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; CHECK-LABEL: define {{[^@]+}}@caller_inline_asm
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; CHECK-SAME: (ptr [[P0:%.*]], i64 [[K:%.*]], ptr [[P1:%.*]], ptr [[P2:%.*]]) #[[ATTR2:[0-9]+]] {
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; CHECK-NEXT: [[CALL:%.*]] = call <8 x i64> @callee_inline_asm(ptr [[P0]], i64 [[K]], ptr [[P1]], ptr [[P2]])
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; CHECK-NEXT: ret <8 x i64> [[CALL]]
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; CHECK-NEXT: [[SRC_I:%.*]] = load <8 x i64>, ptr [[P0]], align 64
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; CHECK-NEXT: [[A_I:%.*]] = load <8 x i64>, ptr [[P1]], align 64
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; CHECK-NEXT: [[B_I:%.*]] = load <8 x i64>, ptr [[P2]], align 64
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; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i64> asm "vpaddb\09$($3, $2, $0 {$1}", "=v,^Yk,v,v,0,~{dirflag},~{fpsr},~{flags}"(i64 [[K]], <8 x i64> [[A_I]], <8 x i64> [[B_I]], <8 x i64> [[SRC_I]])
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; CHECK-NEXT: ret <8 x i64> [[TMP1]]
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;
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%call = call <8 x i64> @callee_inline_asm(ptr %p0, i64 %k, ptr %p1, ptr %p2)
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ret <8 x i64> %call
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}
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define internal <8 x i64> @callee_inline_asm(ptr %p0, i64 %k, ptr %p1, ptr %p2) #1 {
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; CHECK-LABEL: define {{[^@]+}}@callee_inline_asm
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; CHECK-SAME: (ptr [[P0:%.*]], i64 [[K:%.*]], ptr [[P1:%.*]], ptr [[P2:%.*]]) #[[ATTR3:[0-9]+]] {
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; CHECK-NEXT: [[SRC:%.*]] = load <8 x i64>, ptr [[P0]], align 64
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; CHECK-NEXT: [[A:%.*]] = load <8 x i64>, ptr [[P1]], align 64
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; CHECK-NEXT: [[B:%.*]] = load <8 x i64>, ptr [[P2]], align 64
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; CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x i64> asm "vpaddb\09$($3, $2, $0 {$1}", "=v,^Yk,v,v,0,~{dirflag},~{fpsr},~{flags}"(i64 [[K]], <8 x i64> [[A]], <8 x i64> [[B]], <8 x i64> [[SRC]])
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; CHECK-NEXT: ret <8 x i64> [[TMP1]]
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;
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%src = load <8 x i64>, ptr %p0, align 64
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%a = load <8 x i64>, ptr %p1, align 64
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%b = load <8 x i64>, ptr %p2, align 64
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