From 922ac056e3ee8f39eaff1a56781e3331dc7a43d9 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Wed, 26 Jun 2013 18:22:15 +0000 Subject: [PATCH] libclc: Add assembly versions of vload for global int4/8/16 The assembly should be generic, but at least currently R600 only supports 32-bit loads of int1/4, and I believe that only global is well-supported. R600 lowers the 8/16 component vectors to multiple 4-bit loads. The unoptimized C versions of the other stuff is left in place. Patch by: Aaron Watry llvm-svn: 185008 --- libclc/generic/lib/SOURCES | 2 + libclc/generic/lib/shared/vload.cl | 53 +++++++++++++++++++++- libclc/generic/lib/shared/vload_if.ll | 60 +++++++++++++++++++++++++ libclc/generic/lib/shared/vload_impl.ll | 49 ++++++++++++++++++++ 4 files changed, 162 insertions(+), 2 deletions(-) create mode 100644 libclc/generic/lib/shared/vload_if.ll create mode 100644 libclc/generic/lib/shared/vload_impl.ll diff --git a/libclc/generic/lib/SOURCES b/libclc/generic/lib/SOURCES index 50cc9bd522c3..9f6acf34ee02 100644 --- a/libclc/generic/lib/SOURCES +++ b/libclc/generic/lib/SOURCES @@ -24,6 +24,8 @@ shared/clamp.cl shared/max.cl shared/min.cl shared/vload.cl +shared/vload_if.ll +shared/vload_impl.ll shared/vstore.cl workitem/get_global_id.cl workitem/get_global_size.cl diff --git a/libclc/generic/lib/shared/vload.cl b/libclc/generic/lib/shared/vload.cl index 24d82400f848..f6ebd375c122 100644 --- a/libclc/generic/lib/shared/vload.cl +++ b/libclc/generic/lib/shared/vload.cl @@ -27,13 +27,12 @@ VLOAD_VECTORIZE(SCALAR_GENTYPE, __constant) \ VLOAD_VECTORIZE(SCALAR_GENTYPE, __global) \ +//int/uint are special... see below #define VLOAD_TYPES() \ VLOAD_ADDR_SPACES(char) \ VLOAD_ADDR_SPACES(uchar) \ VLOAD_ADDR_SPACES(short) \ VLOAD_ADDR_SPACES(ushort) \ - VLOAD_ADDR_SPACES(int) \ - VLOAD_ADDR_SPACES(uint) \ VLOAD_ADDR_SPACES(long) \ VLOAD_ADDR_SPACES(ulong) \ VLOAD_ADDR_SPACES(float) \ @@ -45,3 +44,53 @@ VLOAD_TYPES() VLOAD_ADDR_SPACES(double) #endif +VLOAD_VECTORIZE(int, __private) +VLOAD_VECTORIZE(int, __local) +VLOAD_VECTORIZE(int, __constant) +VLOAD_VECTORIZE(uint, __private) +VLOAD_VECTORIZE(uint, __local) +VLOAD_VECTORIZE(uint, __constant) + +_CLC_OVERLOAD _CLC_DEF int2 vload2(size_t offset, const global int *x) { + return (int2)(x[offset] , x[offset+1]); +} +_CLC_OVERLOAD _CLC_DEF int3 vload3(size_t offset, const global int *x) { + return (int3)(vload2(offset, x), x[offset+2]); +} +_CLC_OVERLOAD _CLC_DEF uint2 vload2(size_t offset, const global uint *x) { + return (uint2)(x[offset] , x[offset+1]); +} +_CLC_OVERLOAD _CLC_DEF uint3 vload3(size_t offset, const global uint *x) { + return (uint3)(vload2(offset, x), x[offset+2]); +} + +/*Note: It is known that R600 doesn't support load <2 x ?> and <3 x ?>... so + * they aren't actually overridden here + */ +_CLC_DECL int4 __clc_vload4_int__global(size_t offset, const __global int *); +_CLC_DECL int8 __clc_vload8_int__global(size_t offset, const __global int *); +_CLC_DECL int16 __clc_vload16_int__global(size_t offset, const __global int *); + +_CLC_OVERLOAD _CLC_DEF int4 vload4(size_t offset, const global int *x) { + return __clc_vload4_int__global(offset, x); +} +_CLC_OVERLOAD _CLC_DEF int8 vload8(size_t offset, const global int *x) { + return __clc_vload8_int__global(offset, x); +} +_CLC_OVERLOAD _CLC_DEF int16 vload16(size_t offset, const global int *x) { + return __clc_vload16_int__global(offset, x); +} + +_CLC_DECL uint4 __clc_vload4_uint__global(size_t offset, const __global uint *); +_CLC_DECL uint8 __clc_vload8_uint__global(size_t offset, const __global uint *); +_CLC_DECL uint16 __clc_vload16_uint__global(size_t offset, const __global uint *); + +_CLC_OVERLOAD _CLC_DEF uint4 vload4(size_t offset, const global uint *x) { + return __clc_vload4_uint__global(offset, x); +} +_CLC_OVERLOAD _CLC_DEF uint8 vload8(size_t offset, const global uint *x) { + return __clc_vload8_uint__global(offset, x); +} +_CLC_OVERLOAD _CLC_DEF uint16 vload16(size_t offset, const global uint *x) { + return __clc_vload16_uint__global(offset, x); +} \ No newline at end of file diff --git a/libclc/generic/lib/shared/vload_if.ll b/libclc/generic/lib/shared/vload_if.ll new file mode 100644 index 000000000000..2634d37b785f --- /dev/null +++ b/libclc/generic/lib/shared/vload_if.ll @@ -0,0 +1,60 @@ +;Start int global vload + +declare <2 x i32> @__clc_vload2_impl_i32__global(i32 %x, i32 %y) +declare <3 x i32> @__clc_vload3_impl_i32__global(i32 %x, i32 %y) +declare <4 x i32> @__clc_vload4_impl_i32__global(i32 %x, i32 %y) +declare <8 x i32> @__clc_vload8_impl_i32__global(i32 %x, i32 %y) +declare <16 x i32> @__clc_vload16_impl_i32__global(i32 %x, i32 %y) + +define <2 x i32> @__clc_vload2_int__global(i32 %x, i32 %y) nounwind readonly alwaysinline { + %call = call <2 x i32> @__clc_vload2_impl_i32__global(i32 %x, i32 %y) + ret <2 x i32> %call +} + +define <3 x i32> @__clc_vload3_int__global(i32 %x, i32 %y) nounwind readonly alwaysinline { + %call = call <3 x i32> @__clc_vload3_impl_i32__global(i32 %x, i32 %y) + ret <3 x i32> %call +} + +define <4 x i32> @__clc_vload4_int__global(i32 %x, i32 %y) nounwind readonly alwaysinline { + %call = call <4 x i32> @__clc_vload4_impl_i32__global(i32 %x, i32 %y) + ret <4 x i32> %call +} + +define <8 x i32> @__clc_vload8_int__global(i32 %x, i32 %y) nounwind readonly alwaysinline { + %call = call <8 x i32> @__clc_vload8_impl_i32__global(i32 %x, i32 %y) + ret <8 x i32> %call +} + +define <16 x i32> @__clc_vload16_int__global(i32 %x, i32 %y) nounwind readonly alwaysinline { + %call = call <16 x i32> @__clc_vload16_impl_i32__global(i32 %x, i32 %y) + ret <16 x i32> %call +} + + +;Start uint global vload + +define <2 x i32> @__clc_vload2_uint__global(i32 %x, i32 %y) nounwind readonly alwaysinline { + %call = call <2 x i32> @__clc_vload2_impl_i32__global(i32 %x, i32 %y) + ret <2 x i32> %call +} + +define <3 x i32> @__clc_vload3_uint__global(i32 %x, i32 %y) nounwind readonly alwaysinline { + %call = call <3 x i32> @__clc_vload3_impl_i32__global(i32 %x, i32 %y) + ret <3 x i32> %call +} + +define <4 x i32> @__clc_vload4_uint__global(i32 %x, i32 %y) nounwind readonly alwaysinline { + %call = call <4 x i32> @__clc_vload4_impl_i32__global(i32 %x, i32 %y) + ret <4 x i32> %call +} + +define <8 x i32> @__clc_vload8_uint__global(i32 %x, i32 %y) nounwind readonly alwaysinline { + %call = call <8 x i32> @__clc_vload8_impl_i32__global(i32 %x, i32 %y) + ret <8 x i32> %call +} + +define <16 x i32> @__clc_vload16_uint__global(i32 %x, i32 %y) nounwind readonly alwaysinline { + %call = call <16 x i32> @__clc_vload16_impl_i32__global(i32 %x, i32 %y) + ret <16 x i32> %call +} diff --git a/libclc/generic/lib/shared/vload_impl.ll b/libclc/generic/lib/shared/vload_impl.ll new file mode 100644 index 000000000000..ae719e0ae6dc --- /dev/null +++ b/libclc/generic/lib/shared/vload_impl.ll @@ -0,0 +1,49 @@ +; This provides optimized implementations of vload4/8/16 for 32-bit int/uint + +define <2 x i32> @__clc_vload2_impl_i32__global(i32 %offset, i32 addrspace(1)* nocapture %addr) nounwind readonly alwaysinline { + %1 = ptrtoint i32 addrspace(1)* %addr to i32 + %2 = add i32 %1, %offset + %3 = inttoptr i32 %2 to <2 x i32> addrspace(1)* + %4 = load <2 x i32> addrspace(1)* %3, align 4, !tbaa !3 + ret <2 x i32> %4 +} + +define <3 x i32> @__clc_vload3_impl_i32__global(i32 %offset, i32 addrspace(1)* nocapture %addr) nounwind readonly alwaysinline { + %1 = ptrtoint i32 addrspace(1)* %addr to i32 + %2 = add i32 %1, %offset + %3 = inttoptr i32 %2 to <3 x i32> addrspace(1)* + %4 = load <3 x i32> addrspace(1)* %3, align 4, !tbaa !3 + ret <3 x i32> %4 +} + +define <4 x i32> @__clc_vload4_impl_i32__global(i32 %offset, i32 addrspace(1)* nocapture %addr) nounwind readonly alwaysinline { + %1 = ptrtoint i32 addrspace(1)* %addr to i32 + %2 = add i32 %1, %offset + %3 = inttoptr i32 %2 to <4 x i32> addrspace(1)* + %4 = load <4 x i32> addrspace(1)* %3, align 4, !tbaa !3 + ret <4 x i32> %4 +} + +define <8 x i32> @__clc_vload8_impl_i32__global(i32 %offset, i32 addrspace(1)* nocapture %addr) nounwind readonly alwaysinline { + %1 = ptrtoint i32 addrspace(1)* %addr to i32 + %2 = add i32 %1, %offset + %3 = inttoptr i32 %2 to <8 x i32> addrspace(1)* + %4 = load <8 x i32> addrspace(1)* %3, align 4, !tbaa !3 + ret <8 x i32> %4 +} + +define <16 x i32> @__clc_vload16_impl_i32__global(i32 %offset, i32 addrspace(1)* nocapture %addr) nounwind readonly alwaysinline { + %1 = ptrtoint i32 addrspace(1)* %addr to i32 + %2 = add i32 %1, %offset + %3 = inttoptr i32 %2 to <16 x i32> addrspace(1)* + %4 = load <16 x i32> addrspace(1)* %3, align 4, !tbaa !3 + ret <16 x i32> %4 +} + +!1 = metadata !{metadata !"char", metadata !5} +!2 = metadata !{metadata !"short", metadata !5} +!3 = metadata !{metadata !"int", metadata !5} +!4 = metadata !{metadata !"long", metadata !5} +!5 = metadata !{metadata !"omnipotent char", metadata !6} +!6 = metadata !{metadata !"Simple C/C++ TBAA"} +