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[AVX512] Add hasSideEffects/mayLoad/mayStore flags to some instructions.

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llvm-svn: 268174
This commit is contained in:
Craig Topper 2016-05-01 01:03:56 +00:00
parent 2307f405cc
commit 99f6b620cc
1 changed files with 7 additions and 4 deletions
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11
llvm/lib/Target/X86/X86InstrAVX512.td
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@ -2647,6 +2647,7 @@ multiclass avx512_load_vl<bits<8> opc, string OpcodeStr,
multiclass avx512_store<bits<8> opc, string OpcodeStr, X86VectorVTInfo _, multiclass avx512_store<bits<8> opc, string OpcodeStr, X86VectorVTInfo _,
PatFrag st_frag, PatFrag mstore> { PatFrag st_frag, PatFrag mstore> {
let hasSideEffects = 0 in {
def rr_REV : AVX512PI<opc, MRMDestReg, (outs _.RC:$dst), (ins _.RC:$src), def rr_REV : AVX512PI<opc, MRMDestReg, (outs _.RC:$dst), (ins _.RC:$src),
OpcodeStr # ".s\t{$src, $dst|$dst, $src}", OpcodeStr # ".s\t{$src, $dst|$dst, $src}",
[], _.ExeDomain>, EVEX; [], _.ExeDomain>, EVEX;
@ -2660,8 +2661,8 @@ multiclass avx512_store<bits<8> opc, string OpcodeStr, X86VectorVTInfo _,
OpcodeStr # ".s\t{$src, ${dst} {${mask}} {z}|" # OpcodeStr # ".s\t{$src, ${dst} {${mask}} {z}|" #
"${dst} {${mask}} {z}, $src}", "${dst} {${mask}} {z}, $src}",
[], _.ExeDomain>, EVEX, EVEX_KZ; [], _.ExeDomain>, EVEX, EVEX_KZ;
}
let mayStore = 1 in {
def mr : AVX512PI<opc, MRMDestMem, (outs), (ins _.MemOp:$dst, _.RC:$src), def mr : AVX512PI<opc, MRMDestMem, (outs), (ins _.MemOp:$dst, _.RC:$src),
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
[(st_frag (_.VT _.RC:$src), addr:$dst)], _.ExeDomain>, EVEX; [(st_frag (_.VT _.RC:$src), addr:$dst)], _.ExeDomain>, EVEX;
@ -2669,7 +2670,6 @@ multiclass avx512_store<bits<8> opc, string OpcodeStr, X86VectorVTInfo _,
(ins _.MemOp:$dst, _.KRCWM:$mask, _.RC:$src), (ins _.MemOp:$dst, _.KRCWM:$mask, _.RC:$src),
OpcodeStr # "\t{$src, ${dst} {${mask}}|${dst} {${mask}}, $src}", OpcodeStr # "\t{$src, ${dst} {${mask}}|${dst} {${mask}}, $src}",
[], _.ExeDomain>, EVEX, EVEX_K; [], _.ExeDomain>, EVEX, EVEX_K;
}
def: Pat<(mstore addr:$ptr, _.KRCWM:$mask, (_.VT _.RC:$src)), def: Pat<(mstore addr:$ptr, _.KRCWM:$mask, (_.VT _.RC:$src)),
(!cast<Instruction>(NAME#_.ZSuffix##mrk) addr:$ptr, (!cast<Instruction>(NAME#_.ZSuffix##mrk) addr:$ptr,
@ -2946,11 +2946,13 @@ def : Pat<(int_x86_avx512_mask_store_ss addr:$dst, VR128X:$src, GR8:$mask),
(VMOVSSZmrk addr:$dst, (i1 (COPY_TO_REGCLASS GR8:$mask, VK1WM)), (VMOVSSZmrk addr:$dst, (i1 (COPY_TO_REGCLASS GR8:$mask, VK1WM)),
(COPY_TO_REGCLASS VR128X:$src, FR32X))>; (COPY_TO_REGCLASS VR128X:$src, FR32X))>;
let hasSideEffects = 0 in
defm VMOVSSZrr_REV : AVX512_maskable_in_asm<0x11, MRMDestReg, f32x_info, defm VMOVSSZrr_REV : AVX512_maskable_in_asm<0x11, MRMDestReg, f32x_info,
(outs VR128X:$dst), (ins VR128X:$src1, VR128X:$src2), (outs VR128X:$dst), (ins VR128X:$src1, VR128X:$src2),
"vmovss.s", "$src2, $src1", "$src1, $src2", []>, "vmovss.s", "$src2, $src1", "$src1, $src2", []>,
XS, EVEX_4V, VEX_LIG; XS, EVEX_4V, VEX_LIG;
let hasSideEffects = 0 in
defm VMOVSSDrr_REV : AVX512_maskable_in_asm<0x11, MRMDestReg, f64x_info, defm VMOVSSDrr_REV : AVX512_maskable_in_asm<0x11, MRMDestReg, f64x_info,
(outs VR128X:$dst), (ins VR128X:$src1, VR128X:$src2), (outs VR128X:$dst), (ins VR128X:$src1, VR128X:$src2),
"vmovsd.s", "$src2, $src1", "$src1, $src2", []>, "vmovsd.s", "$src2, $src1", "$src1, $src2", []>,
@ -6116,7 +6118,7 @@ multiclass avx512_trunc_common<bits<8> opc, string OpcodeStr, SDNode OpNode,
DestInfo.KRCWM:$mask , DestInfo.KRCWM:$mask ,
SrcInfo.RC:$src1)>; SrcInfo.RC:$src1)>;
let mayStore = 1 in { let mayStore = 1, mayLoad = 1, hasSideEffects = 0 in {
def mr : AVX512XS8I<opc, MRMDestMem, (outs), def mr : AVX512XS8I<opc, MRMDestMem, (outs),
(ins x86memop:$dst, SrcInfo.RC:$src), (ins x86memop:$dst, SrcInfo.RC:$src),
OpcodeStr # "\t{$src, $dst|$dst, $src}", OpcodeStr # "\t{$src, $dst|$dst, $src}",
@ -6126,7 +6128,7 @@ multiclass avx512_trunc_common<bits<8> opc, string OpcodeStr, SDNode OpNode,
(ins x86memop:$dst, SrcInfo.KRCWM:$mask, SrcInfo.RC:$src), (ins x86memop:$dst, SrcInfo.KRCWM:$mask, SrcInfo.RC:$src),
OpcodeStr # "\t{$src, $dst {${mask}}|$dst {${mask}}, $src}", OpcodeStr # "\t{$src, $dst {${mask}}|$dst {${mask}}, $src}",
[]>, EVEX, EVEX_K; []>, EVEX, EVEX_K;
}//mayStore = 1 }//mayStore = 1, mayLoad = 1, hasSideEffects = 0
} }
multiclass avx512_trunc_mr_lowering<X86VectorVTInfo SrcInfo, multiclass avx512_trunc_mr_lowering<X86VectorVTInfo SrcInfo,
@ -7369,6 +7371,7 @@ multiclass avx512_extract_elt_w<string OpcodeStr, X86VectorVTInfo _> {
(X86pextrw (_.VT _.RC:$src1), imm:$src2))]>, (X86pextrw (_.VT _.RC:$src1), imm:$src2))]>,
EVEX, PD; EVEX, PD;
let hasSideEffects = 0 in
def rr_REV : AVX512Ii8<0x15, MRMDestReg, (outs GR32orGR64:$dst), def rr_REV : AVX512Ii8<0x15, MRMDestReg, (outs GR32orGR64:$dst),
(ins _.RC:$src1, u8imm:$src2), (ins _.RC:$src1, u8imm:$src2),
OpcodeStr#".s\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>, OpcodeStr#".s\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,