[libunwind] Add UNW_AARCH64_* beside UNW_ARM64_*

The original libunwind project defines UNW_AARCH64_* instead of UNW_ARM64_*.
Rename the enum members to match. This allows some applications with simple
`unw_init_local` usage to migrate to llvm-project libunwind.

Note: the canonical names of `UNW_ARM_D{0..31}` are now `UNW_AARCH64_V{0..31}`,
to match the original libunwind.

UNW_ARM64_* are kept for now for compatibility. Some may be unneeded and can be
cleaned up in the future.

Reviewed By: #libunwind, compnerd

Differential Revision: https://reviews.llvm.org/D107996
This commit is contained in:
Fangrui Song 2021-08-20 14:26:27 -07:00
parent 44bf0dc625
commit 9ae9dd3fcf
7 changed files with 306 additions and 233 deletions

View File

@ -493,77 +493,150 @@ enum {
// 64-bit ARM64 registers
enum {
UNW_ARM64_X0 = 0,
UNW_ARM64_X1 = 1,
UNW_ARM64_X2 = 2,
UNW_ARM64_X3 = 3,
UNW_ARM64_X4 = 4,
UNW_ARM64_X5 = 5,
UNW_ARM64_X6 = 6,
UNW_ARM64_X7 = 7,
UNW_ARM64_X8 = 8,
UNW_ARM64_X9 = 9,
UNW_ARM64_X10 = 10,
UNW_ARM64_X11 = 11,
UNW_ARM64_X12 = 12,
UNW_ARM64_X13 = 13,
UNW_ARM64_X14 = 14,
UNW_ARM64_X15 = 15,
UNW_ARM64_X16 = 16,
UNW_ARM64_X17 = 17,
UNW_ARM64_X18 = 18,
UNW_ARM64_X19 = 19,
UNW_ARM64_X20 = 20,
UNW_ARM64_X21 = 21,
UNW_ARM64_X22 = 22,
UNW_ARM64_X23 = 23,
UNW_ARM64_X24 = 24,
UNW_ARM64_X25 = 25,
UNW_ARM64_X26 = 26,
UNW_ARM64_X27 = 27,
UNW_ARM64_X28 = 28,
UNW_ARM64_X29 = 29,
UNW_ARM64_FP = 29,
UNW_ARM64_X30 = 30,
UNW_ARM64_LR = 30,
UNW_ARM64_X31 = 31,
UNW_ARM64_SP = 31,
UNW_ARM64_PC = 32,
UNW_AARCH64_X0 = 0,
UNW_AARCH64_X1 = 1,
UNW_AARCH64_X2 = 2,
UNW_AARCH64_X3 = 3,
UNW_AARCH64_X4 = 4,
UNW_AARCH64_X5 = 5,
UNW_AARCH64_X6 = 6,
UNW_AARCH64_X7 = 7,
UNW_AARCH64_X8 = 8,
UNW_AARCH64_X9 = 9,
UNW_AARCH64_X10 = 10,
UNW_AARCH64_X11 = 11,
UNW_AARCH64_X12 = 12,
UNW_AARCH64_X13 = 13,
UNW_AARCH64_X14 = 14,
UNW_AARCH64_X15 = 15,
UNW_AARCH64_X16 = 16,
UNW_AARCH64_X17 = 17,
UNW_AARCH64_X18 = 18,
UNW_AARCH64_X19 = 19,
UNW_AARCH64_X20 = 20,
UNW_AARCH64_X21 = 21,
UNW_AARCH64_X22 = 22,
UNW_AARCH64_X23 = 23,
UNW_AARCH64_X24 = 24,
UNW_AARCH64_X25 = 25,
UNW_AARCH64_X26 = 26,
UNW_AARCH64_X27 = 27,
UNW_AARCH64_X28 = 28,
UNW_AARCH64_X29 = 29,
UNW_AARCH64_FP = 29,
UNW_AARCH64_X30 = 30,
UNW_AARCH64_LR = 30,
UNW_AARCH64_X31 = 31,
UNW_AARCH64_SP = 31,
UNW_AARCH64_PC = 32,
// reserved block
UNW_ARM64_RA_SIGN_STATE = 34,
// reserved block
UNW_ARM64_D0 = 64,
UNW_ARM64_D1 = 65,
UNW_ARM64_D2 = 66,
UNW_ARM64_D3 = 67,
UNW_ARM64_D4 = 68,
UNW_ARM64_D5 = 69,
UNW_ARM64_D6 = 70,
UNW_ARM64_D7 = 71,
UNW_ARM64_D8 = 72,
UNW_ARM64_D9 = 73,
UNW_ARM64_D10 = 74,
UNW_ARM64_D11 = 75,
UNW_ARM64_D12 = 76,
UNW_ARM64_D13 = 77,
UNW_ARM64_D14 = 78,
UNW_ARM64_D15 = 79,
UNW_ARM64_D16 = 80,
UNW_ARM64_D17 = 81,
UNW_ARM64_D18 = 82,
UNW_ARM64_D19 = 83,
UNW_ARM64_D20 = 84,
UNW_ARM64_D21 = 85,
UNW_ARM64_D22 = 86,
UNW_ARM64_D23 = 87,
UNW_ARM64_D24 = 88,
UNW_ARM64_D25 = 89,
UNW_ARM64_D26 = 90,
UNW_ARM64_D27 = 91,
UNW_ARM64_D28 = 92,
UNW_ARM64_D29 = 93,
UNW_ARM64_D30 = 94,
UNW_ARM64_D31 = 95,
UNW_AARCH64_RA_SIGN_STATE = 34,
// FP/vector registers
UNW_AARCH64_V0 = 64,
UNW_AARCH64_V1 = 65,
UNW_AARCH64_V2 = 66,
UNW_AARCH64_V3 = 67,
UNW_AARCH64_V4 = 68,
UNW_AARCH64_V5 = 69,
UNW_AARCH64_V6 = 70,
UNW_AARCH64_V7 = 71,
UNW_AARCH64_V8 = 72,
UNW_AARCH64_V9 = 73,
UNW_AARCH64_V10 = 74,
UNW_AARCH64_V11 = 75,
UNW_AARCH64_V12 = 76,
UNW_AARCH64_V13 = 77,
UNW_AARCH64_V14 = 78,
UNW_AARCH64_V15 = 79,
UNW_AARCH64_V16 = 80,
UNW_AARCH64_V17 = 81,
UNW_AARCH64_V18 = 82,
UNW_AARCH64_V19 = 83,
UNW_AARCH64_V20 = 84,
UNW_AARCH64_V21 = 85,
UNW_AARCH64_V22 = 86,
UNW_AARCH64_V23 = 87,
UNW_AARCH64_V24 = 88,
UNW_AARCH64_V25 = 89,
UNW_AARCH64_V26 = 90,
UNW_AARCH64_V27 = 91,
UNW_AARCH64_V28 = 92,
UNW_AARCH64_V29 = 93,
UNW_AARCH64_V30 = 94,
UNW_AARCH64_V31 = 95,
// Compatibility aliases
UNW_ARM64_X0 = UNW_AARCH64_X0,
UNW_ARM64_X1 = UNW_AARCH64_X1,
UNW_ARM64_X2 = UNW_AARCH64_X2,
UNW_ARM64_X3 = UNW_AARCH64_X3,
UNW_ARM64_X4 = UNW_AARCH64_X4,
UNW_ARM64_X5 = UNW_AARCH64_X5,
UNW_ARM64_X6 = UNW_AARCH64_X6,
UNW_ARM64_X7 = UNW_AARCH64_X7,
UNW_ARM64_X8 = UNW_AARCH64_X8,
UNW_ARM64_X9 = UNW_AARCH64_X9,
UNW_ARM64_X10 = UNW_AARCH64_X10,
UNW_ARM64_X11 = UNW_AARCH64_X11,
UNW_ARM64_X12 = UNW_AARCH64_X12,
UNW_ARM64_X13 = UNW_AARCH64_X13,
UNW_ARM64_X14 = UNW_AARCH64_X14,
UNW_ARM64_X15 = UNW_AARCH64_X15,
UNW_ARM64_X16 = UNW_AARCH64_X16,
UNW_ARM64_X17 = UNW_AARCH64_X17,
UNW_ARM64_X18 = UNW_AARCH64_X18,
UNW_ARM64_X19 = UNW_AARCH64_X19,
UNW_ARM64_X20 = UNW_AARCH64_X20,
UNW_ARM64_X21 = UNW_AARCH64_X21,
UNW_ARM64_X22 = UNW_AARCH64_X22,
UNW_ARM64_X23 = UNW_AARCH64_X23,
UNW_ARM64_X24 = UNW_AARCH64_X24,
UNW_ARM64_X25 = UNW_AARCH64_X25,
UNW_ARM64_X26 = UNW_AARCH64_X26,
UNW_ARM64_X27 = UNW_AARCH64_X27,
UNW_ARM64_X28 = UNW_AARCH64_X28,
UNW_ARM64_X29 = UNW_AARCH64_X29,
UNW_ARM64_FP = UNW_AARCH64_FP,
UNW_ARM64_X30 = UNW_AARCH64_X30,
UNW_ARM64_LR = UNW_AARCH64_LR,
UNW_ARM64_X31 = UNW_AARCH64_X31,
UNW_ARM64_SP = UNW_AARCH64_SP,
UNW_ARM64_PC = UNW_AARCH64_PC,
UNW_ARM64_RA_SIGN_STATE = UNW_AARCH64_RA_SIGN_STATE,
UNW_ARM64_D0 = UNW_AARCH64_V0,
UNW_ARM64_D1 = UNW_AARCH64_V1,
UNW_ARM64_D2 = UNW_AARCH64_V2,
UNW_ARM64_D3 = UNW_AARCH64_V3,
UNW_ARM64_D4 = UNW_AARCH64_V4,
UNW_ARM64_D5 = UNW_AARCH64_V5,
UNW_ARM64_D6 = UNW_AARCH64_V6,
UNW_ARM64_D7 = UNW_AARCH64_V7,
UNW_ARM64_D8 = UNW_AARCH64_V8,
UNW_ARM64_D9 = UNW_AARCH64_V9,
UNW_ARM64_D10 = UNW_AARCH64_V10,
UNW_ARM64_D11 = UNW_AARCH64_V11,
UNW_ARM64_D12 = UNW_AARCH64_V12,
UNW_ARM64_D13 = UNW_AARCH64_V13,
UNW_ARM64_D14 = UNW_AARCH64_V14,
UNW_ARM64_D15 = UNW_AARCH64_V15,
UNW_ARM64_D16 = UNW_AARCH64_V16,
UNW_ARM64_D17 = UNW_AARCH64_V17,
UNW_ARM64_D18 = UNW_AARCH64_V18,
UNW_ARM64_D19 = UNW_AARCH64_V19,
UNW_ARM64_D20 = UNW_AARCH64_V20,
UNW_ARM64_D21 = UNW_AARCH64_V21,
UNW_ARM64_D22 = UNW_AARCH64_V22,
UNW_ARM64_D23 = UNW_AARCH64_V23,
UNW_ARM64_D24 = UNW_AARCH64_V24,
UNW_ARM64_D25 = UNW_AARCH64_V25,
UNW_ARM64_D26 = UNW_AARCH64_V26,
UNW_ARM64_D27 = UNW_AARCH64_V27,
UNW_ARM64_D28 = UNW_AARCH64_V28,
UNW_ARM64_D29 = UNW_AARCH64_V29,
UNW_ARM64_D30 = UNW_AARCH64_V30,
UNW_ARM64_D31 = UNW_AARCH64_V31,
};
// 32-bit ARM registers. Numbers match DWARF for ARM spec #3.1 Table 1.

View File

@ -537,65 +537,65 @@ int CompactUnwinder_arm64<A>::stepWithCompactEncodingFrameless(
uint64_t savedRegisterLoc = registers.getSP() + stackSize;
if (encoding & UNWIND_ARM64_FRAME_X19_X20_PAIR) {
registers.setRegister(UNW_ARM64_X19, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X19, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setRegister(UNW_ARM64_X20, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X20, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_X21_X22_PAIR) {
registers.setRegister(UNW_ARM64_X21, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X21, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setRegister(UNW_ARM64_X22, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X22, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_X23_X24_PAIR) {
registers.setRegister(UNW_ARM64_X23, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X23, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setRegister(UNW_ARM64_X24, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X24, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_X25_X26_PAIR) {
registers.setRegister(UNW_ARM64_X25, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X25, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setRegister(UNW_ARM64_X26, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X26, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_X27_X28_PAIR) {
registers.setRegister(UNW_ARM64_X27, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X27, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setRegister(UNW_ARM64_X28, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X28, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_D8_D9_PAIR) {
registers.setFloatRegister(UNW_ARM64_D8,
registers.setFloatRegister(UNW_AARCH64_V8,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setFloatRegister(UNW_ARM64_D9,
registers.setFloatRegister(UNW_AARCH64_V9,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_D10_D11_PAIR) {
registers.setFloatRegister(UNW_ARM64_D10,
registers.setFloatRegister(UNW_AARCH64_V10,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setFloatRegister(UNW_ARM64_D11,
registers.setFloatRegister(UNW_AARCH64_V11,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_D12_D13_PAIR) {
registers.setFloatRegister(UNW_ARM64_D12,
registers.setFloatRegister(UNW_AARCH64_V12,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setFloatRegister(UNW_ARM64_D13,
registers.setFloatRegister(UNW_AARCH64_V13,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_D14_D15_PAIR) {
registers.setFloatRegister(UNW_ARM64_D14,
registers.setFloatRegister(UNW_AARCH64_V14,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setFloatRegister(UNW_ARM64_D15,
registers.setFloatRegister(UNW_AARCH64_V15,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
}
@ -604,7 +604,7 @@ int CompactUnwinder_arm64<A>::stepWithCompactEncodingFrameless(
registers.setSP(savedRegisterLoc);
// set pc to be value in lr
registers.setIP(registers.getRegister(UNW_ARM64_LR));
registers.setIP(registers.getRegister(UNW_AARCH64_LR));
return UNW_STEP_SUCCESS;
}
@ -616,65 +616,65 @@ int CompactUnwinder_arm64<A>::stepWithCompactEncodingFrame(
uint64_t savedRegisterLoc = registers.getFP() - 8;
if (encoding & UNWIND_ARM64_FRAME_X19_X20_PAIR) {
registers.setRegister(UNW_ARM64_X19, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X19, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setRegister(UNW_ARM64_X20, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X20, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_X21_X22_PAIR) {
registers.setRegister(UNW_ARM64_X21, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X21, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setRegister(UNW_ARM64_X22, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X22, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_X23_X24_PAIR) {
registers.setRegister(UNW_ARM64_X23, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X23, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setRegister(UNW_ARM64_X24, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X24, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_X25_X26_PAIR) {
registers.setRegister(UNW_ARM64_X25, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X25, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setRegister(UNW_ARM64_X26, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X26, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_X27_X28_PAIR) {
registers.setRegister(UNW_ARM64_X27, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X27, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setRegister(UNW_ARM64_X28, addressSpace.get64(savedRegisterLoc));
registers.setRegister(UNW_AARCH64_X28, addressSpace.get64(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_D8_D9_PAIR) {
registers.setFloatRegister(UNW_ARM64_D8,
registers.setFloatRegister(UNW_AARCH64_V8,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setFloatRegister(UNW_ARM64_D9,
registers.setFloatRegister(UNW_AARCH64_V9,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_D10_D11_PAIR) {
registers.setFloatRegister(UNW_ARM64_D10,
registers.setFloatRegister(UNW_AARCH64_V10,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setFloatRegister(UNW_ARM64_D11,
registers.setFloatRegister(UNW_AARCH64_V11,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_D12_D13_PAIR) {
registers.setFloatRegister(UNW_ARM64_D12,
registers.setFloatRegister(UNW_AARCH64_V12,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setFloatRegister(UNW_ARM64_D13,
registers.setFloatRegister(UNW_AARCH64_V13,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
}
if (encoding & UNWIND_ARM64_FRAME_D14_D15_PAIR) {
registers.setFloatRegister(UNW_ARM64_D14,
registers.setFloatRegister(UNW_AARCH64_V14,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
registers.setFloatRegister(UNW_ARM64_D15,
registers.setFloatRegister(UNW_AARCH64_V15,
addressSpace.getDouble(savedRegisterLoc));
savedRegisterLoc -= 8;
}

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@ -219,7 +219,7 @@ int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,
// restored. autia1716 is used instead of autia as autia1716 assembles
// to a NOP on pre-v8.3a architectures.
if ((R::getArch() == REGISTERS_ARM64) &&
prolog.savedRegisters[UNW_ARM64_RA_SIGN_STATE].value &&
prolog.savedRegisters[UNW_AARCH64_RA_SIGN_STATE].value &&
returnAddress != 0) {
#if !defined(_LIBUNWIND_IS_NATIVE_ONLY)
return UNW_ECROSSRASIGNING;

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@ -733,8 +733,8 @@ bool CFI_Parser<A>::parseFDEInstructions(A &addressSpace,
#if defined(_LIBUNWIND_TARGET_AARCH64)
case REGISTERS_ARM64: {
int64_t value =
results->savedRegisters[UNW_ARM64_RA_SIGN_STATE].value ^ 0x1;
results->setRegisterValue(UNW_ARM64_RA_SIGN_STATE, value,
results->savedRegisters[UNW_AARCH64_RA_SIGN_STATE].value ^ 0x1;
results->setRegisterValue(UNW_AARCH64_RA_SIGN_STATE, value,
initialState);
_LIBUNWIND_TRACE_DWARF("DW_CFA_AARCH64_negate_ra_state\n");
} break;

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@ -1850,7 +1850,7 @@ inline bool Registers_arm64::validRegister(int regNum) const {
return false;
if (regNum > 95)
return false;
if (regNum == UNW_ARM64_RA_SIGN_STATE)
if (regNum == UNW_AARCH64_RA_SIGN_STATE)
return true;
if ((regNum > 32) && (regNum < 64))
return false;
@ -1858,15 +1858,15 @@ inline bool Registers_arm64::validRegister(int regNum) const {
}
inline uint64_t Registers_arm64::getRegister(int regNum) const {
if (regNum == UNW_REG_IP || regNum == UNW_ARM64_PC)
if (regNum == UNW_REG_IP || regNum == UNW_AARCH64_PC)
return _registers.__pc;
if (regNum == UNW_REG_SP || regNum == UNW_ARM64_SP)
if (regNum == UNW_REG_SP || regNum == UNW_AARCH64_SP)
return _registers.__sp;
if (regNum == UNW_ARM64_RA_SIGN_STATE)
if (regNum == UNW_AARCH64_RA_SIGN_STATE)
return _registers.__ra_sign_state;
if (regNum == UNW_ARM64_FP)
if (regNum == UNW_AARCH64_FP)
return _registers.__fp;
if (regNum == UNW_ARM64_LR)
if (regNum == UNW_AARCH64_LR)
return _registers.__lr;
if ((regNum >= 0) && (regNum < 29))
return _registers.__x[regNum];
@ -1874,15 +1874,15 @@ inline uint64_t Registers_arm64::getRegister(int regNum) const {
}
inline void Registers_arm64::setRegister(int regNum, uint64_t value) {
if (regNum == UNW_REG_IP || regNum == UNW_ARM64_PC)
if (regNum == UNW_REG_IP || regNum == UNW_AARCH64_PC)
_registers.__pc = value;
else if (regNum == UNW_REG_SP || regNum == UNW_ARM64_SP)
else if (regNum == UNW_REG_SP || regNum == UNW_AARCH64_SP)
_registers.__sp = value;
else if (regNum == UNW_ARM64_RA_SIGN_STATE)
else if (regNum == UNW_AARCH64_RA_SIGN_STATE)
_registers.__ra_sign_state = value;
else if (regNum == UNW_ARM64_FP)
else if (regNum == UNW_AARCH64_FP)
_registers.__fp = value;
else if (regNum == UNW_ARM64_LR)
else if (regNum == UNW_AARCH64_LR)
_registers.__lr = value;
else if ((regNum >= 0) && (regNum < 29))
_registers.__x[regNum] = value;
@ -1896,135 +1896,135 @@ inline const char *Registers_arm64::getRegisterName(int regNum) {
return "pc";
case UNW_REG_SP:
return "sp";
case UNW_ARM64_X0:
case UNW_AARCH64_X0:
return "x0";
case UNW_ARM64_X1:
case UNW_AARCH64_X1:
return "x1";
case UNW_ARM64_X2:
case UNW_AARCH64_X2:
return "x2";
case UNW_ARM64_X3:
case UNW_AARCH64_X3:
return "x3";
case UNW_ARM64_X4:
case UNW_AARCH64_X4:
return "x4";
case UNW_ARM64_X5:
case UNW_AARCH64_X5:
return "x5";
case UNW_ARM64_X6:
case UNW_AARCH64_X6:
return "x6";
case UNW_ARM64_X7:
case UNW_AARCH64_X7:
return "x7";
case UNW_ARM64_X8:
case UNW_AARCH64_X8:
return "x8";
case UNW_ARM64_X9:
case UNW_AARCH64_X9:
return "x9";
case UNW_ARM64_X10:
case UNW_AARCH64_X10:
return "x10";
case UNW_ARM64_X11:
case UNW_AARCH64_X11:
return "x11";
case UNW_ARM64_X12:
case UNW_AARCH64_X12:
return "x12";
case UNW_ARM64_X13:
case UNW_AARCH64_X13:
return "x13";
case UNW_ARM64_X14:
case UNW_AARCH64_X14:
return "x14";
case UNW_ARM64_X15:
case UNW_AARCH64_X15:
return "x15";
case UNW_ARM64_X16:
case UNW_AARCH64_X16:
return "x16";
case UNW_ARM64_X17:
case UNW_AARCH64_X17:
return "x17";
case UNW_ARM64_X18:
case UNW_AARCH64_X18:
return "x18";
case UNW_ARM64_X19:
case UNW_AARCH64_X19:
return "x19";
case UNW_ARM64_X20:
case UNW_AARCH64_X20:
return "x20";
case UNW_ARM64_X21:
case UNW_AARCH64_X21:
return "x21";
case UNW_ARM64_X22:
case UNW_AARCH64_X22:
return "x22";
case UNW_ARM64_X23:
case UNW_AARCH64_X23:
return "x23";
case UNW_ARM64_X24:
case UNW_AARCH64_X24:
return "x24";
case UNW_ARM64_X25:
case UNW_AARCH64_X25:
return "x25";
case UNW_ARM64_X26:
case UNW_AARCH64_X26:
return "x26";
case UNW_ARM64_X27:
case UNW_AARCH64_X27:
return "x27";
case UNW_ARM64_X28:
case UNW_AARCH64_X28:
return "x28";
case UNW_ARM64_FP:
case UNW_AARCH64_FP:
return "fp";
case UNW_ARM64_LR:
case UNW_AARCH64_LR:
return "lr";
case UNW_ARM64_SP:
case UNW_AARCH64_SP:
return "sp";
case UNW_ARM64_PC:
case UNW_AARCH64_PC:
return "pc";
case UNW_ARM64_D0:
case UNW_AARCH64_V0:
return "d0";
case UNW_ARM64_D1:
case UNW_AARCH64_V1:
return "d1";
case UNW_ARM64_D2:
case UNW_AARCH64_V2:
return "d2";
case UNW_ARM64_D3:
case UNW_AARCH64_V3:
return "d3";
case UNW_ARM64_D4:
case UNW_AARCH64_V4:
return "d4";
case UNW_ARM64_D5:
case UNW_AARCH64_V5:
return "d5";
case UNW_ARM64_D6:
case UNW_AARCH64_V6:
return "d6";
case UNW_ARM64_D7:
case UNW_AARCH64_V7:
return "d7";
case UNW_ARM64_D8:
case UNW_AARCH64_V8:
return "d8";
case UNW_ARM64_D9:
case UNW_AARCH64_V9:
return "d9";
case UNW_ARM64_D10:
case UNW_AARCH64_V10:
return "d10";
case UNW_ARM64_D11:
case UNW_AARCH64_V11:
return "d11";
case UNW_ARM64_D12:
case UNW_AARCH64_V12:
return "d12";
case UNW_ARM64_D13:
case UNW_AARCH64_V13:
return "d13";
case UNW_ARM64_D14:
case UNW_AARCH64_V14:
return "d14";
case UNW_ARM64_D15:
case UNW_AARCH64_V15:
return "d15";
case UNW_ARM64_D16:
case UNW_AARCH64_V16:
return "d16";
case UNW_ARM64_D17:
case UNW_AARCH64_V17:
return "d17";
case UNW_ARM64_D18:
case UNW_AARCH64_V18:
return "d18";
case UNW_ARM64_D19:
case UNW_AARCH64_V19:
return "d19";
case UNW_ARM64_D20:
case UNW_AARCH64_V20:
return "d20";
case UNW_ARM64_D21:
case UNW_AARCH64_V21:
return "d21";
case UNW_ARM64_D22:
case UNW_AARCH64_V22:
return "d22";
case UNW_ARM64_D23:
case UNW_AARCH64_V23:
return "d23";
case UNW_ARM64_D24:
case UNW_AARCH64_V24:
return "d24";
case UNW_ARM64_D25:
case UNW_AARCH64_V25:
return "d25";
case UNW_ARM64_D26:
case UNW_AARCH64_V26:
return "d26";
case UNW_ARM64_D27:
case UNW_AARCH64_V27:
return "d27";
case UNW_ARM64_D28:
case UNW_AARCH64_V28:
return "d28";
case UNW_ARM64_D29:
case UNW_AARCH64_V29:
return "d29";
case UNW_ARM64_D30:
case UNW_AARCH64_V30:
return "d30";
case UNW_ARM64_D31:
case UNW_AARCH64_V31:
return "d31";
default:
return "unknown register";
@ -2032,21 +2032,21 @@ inline const char *Registers_arm64::getRegisterName(int regNum) {
}
inline bool Registers_arm64::validFloatRegister(int regNum) const {
if (regNum < UNW_ARM64_D0)
if (regNum < UNW_AARCH64_V0)
return false;
if (regNum > UNW_ARM64_D31)
if (regNum > UNW_AARCH64_V31)
return false;
return true;
}
inline double Registers_arm64::getFloatRegister(int regNum) const {
assert(validFloatRegister(regNum));
return _vectorHalfRegisters[regNum - UNW_ARM64_D0];
return _vectorHalfRegisters[regNum - UNW_AARCH64_V0];
}
inline void Registers_arm64::setFloatRegister(int regNum, double value) {
assert(validFloatRegister(regNum));
_vectorHalfRegisters[regNum - UNW_ARM64_D0] = value;
_vectorHalfRegisters[regNum - UNW_AARCH64_V0] = value;
}
inline bool Registers_arm64::validVectorRegister(int) const {

View File

@ -169,8 +169,8 @@ _GCC_specific_handler(PEXCEPTION_RECORD ms_exc, PVOID frame, PCONTEXT ms_ctx,
__unw_get_reg(&cursor, UNW_ARM_R1, &exc->private_[3]);
#elif defined(__aarch64__)
exc->private_[2] = disp->TargetPc;
__unw_get_reg(&cursor, UNW_ARM64_X0, &retval);
__unw_get_reg(&cursor, UNW_ARM64_X1, &exc->private_[3]);
__unw_get_reg(&cursor, UNW_AARCH64_X0, &retval);
__unw_get_reg(&cursor, UNW_AARCH64_X1, &exc->private_[3]);
#endif
__unw_get_reg(&cursor, UNW_REG_IP, &target);
ms_exc->ExceptionCode = STATUS_GCC_UNWIND;

View File

@ -620,12 +620,12 @@ UnwindCursor<A, R>::UnwindCursor(unw_context_t *context, A &as)
_msContext.D[i - UNW_ARM_D0] = d.w;
}
#elif defined(_LIBUNWIND_TARGET_AARCH64)
for (int i = UNW_ARM64_X0; i <= UNW_ARM64_X30; ++i)
_msContext.X[i - UNW_ARM64_X0] = r.getRegister(i);
for (int i = UNW_AARCH64_X0; i <= UNW_ARM64_X30; ++i)
_msContext.X[i - UNW_AARCH64_X0] = r.getRegister(i);
_msContext.Sp = r.getRegister(UNW_REG_SP);
_msContext.Pc = r.getRegister(UNW_REG_IP);
for (int i = UNW_ARM64_D0; i <= UNW_ARM64_D31; ++i)
_msContext.V[i - UNW_ARM64_D0].D[0] = r.getFloatRegister(i);
for (int i = UNW_AARCH64_V0; i <= UNW_ARM64_D31; ++i)
_msContext.V[i - UNW_AARCH64_V0].D[0] = r.getFloatRegister(i);
#endif
}
@ -650,7 +650,7 @@ bool UnwindCursor<A, R>::validReg(int regNum) {
#elif defined(_LIBUNWIND_TARGET_ARM)
if (regNum >= UNW_ARM_R0 && regNum <= UNW_ARM_R15) return true;
#elif defined(_LIBUNWIND_TARGET_AARCH64)
if (regNum >= UNW_ARM64_X0 && regNum <= UNW_ARM64_X30) return true;
if (regNum >= UNW_AARCH64_X0 && regNum <= UNW_ARM64_X30) return true;
#endif
return false;
}
@ -699,7 +699,7 @@ unw_word_t UnwindCursor<A, R>::getReg(int regNum) {
#elif defined(_LIBUNWIND_TARGET_AARCH64)
case UNW_REG_SP: return _msContext.Sp;
case UNW_REG_IP: return _msContext.Pc;
default: return _msContext.X[regNum - UNW_ARM64_X0];
default: return _msContext.X[regNum - UNW_AARCH64_X0];
#endif
}
_LIBUNWIND_ABORT("unsupported register");
@ -749,37 +749,37 @@ void UnwindCursor<A, R>::setReg(int regNum, unw_word_t value) {
#elif defined(_LIBUNWIND_TARGET_AARCH64)
case UNW_REG_SP: _msContext.Sp = value; break;
case UNW_REG_IP: _msContext.Pc = value; break;
case UNW_ARM64_X0:
case UNW_ARM64_X1:
case UNW_ARM64_X2:
case UNW_ARM64_X3:
case UNW_ARM64_X4:
case UNW_ARM64_X5:
case UNW_ARM64_X6:
case UNW_ARM64_X7:
case UNW_ARM64_X8:
case UNW_ARM64_X9:
case UNW_ARM64_X10:
case UNW_ARM64_X11:
case UNW_ARM64_X12:
case UNW_ARM64_X13:
case UNW_ARM64_X14:
case UNW_ARM64_X15:
case UNW_ARM64_X16:
case UNW_ARM64_X17:
case UNW_ARM64_X18:
case UNW_ARM64_X19:
case UNW_ARM64_X20:
case UNW_ARM64_X21:
case UNW_ARM64_X22:
case UNW_ARM64_X23:
case UNW_ARM64_X24:
case UNW_ARM64_X25:
case UNW_ARM64_X26:
case UNW_ARM64_X27:
case UNW_ARM64_X28:
case UNW_ARM64_FP:
case UNW_ARM64_LR: _msContext.X[regNum - UNW_ARM64_X0] = value; break;
case UNW_AARCH64_X0:
case UNW_AARCH64_X1:
case UNW_AARCH64_X2:
case UNW_AARCH64_X3:
case UNW_AARCH64_X4:
case UNW_AARCH64_X5:
case UNW_AARCH64_X6:
case UNW_AARCH64_X7:
case UNW_AARCH64_X8:
case UNW_AARCH64_X9:
case UNW_AARCH64_X10:
case UNW_AARCH64_X11:
case UNW_AARCH64_X12:
case UNW_AARCH64_X13:
case UNW_AARCH64_X14:
case UNW_AARCH64_X15:
case UNW_AARCH64_X16:
case UNW_AARCH64_X17:
case UNW_AARCH64_X18:
case UNW_AARCH64_X19:
case UNW_AARCH64_X20:
case UNW_AARCH64_X21:
case UNW_AARCH64_X22:
case UNW_AARCH64_X23:
case UNW_AARCH64_X24:
case UNW_AARCH64_X25:
case UNW_AARCH64_X26:
case UNW_AARCH64_X27:
case UNW_AARCH64_X28:
case UNW_AARCH64_FP:
case UNW_AARCH64_LR: _msContext.X[regNum - UNW_ARM64_X0] = value; break;
#endif
default:
_LIBUNWIND_ABORT("unsupported register");
@ -792,7 +792,7 @@ bool UnwindCursor<A, R>::validFloatReg(int regNum) {
if (regNum >= UNW_ARM_S0 && regNum <= UNW_ARM_S31) return true;
if (regNum >= UNW_ARM_D0 && regNum <= UNW_ARM_D31) return true;
#elif defined(_LIBUNWIND_TARGET_AARCH64)
if (regNum >= UNW_ARM64_D0 && regNum <= UNW_ARM64_D31) return true;
if (regNum >= UNW_AARCH64_V0 && regNum <= UNW_ARM64_D31) return true;
#else
(void)regNum;
#endif
@ -820,7 +820,7 @@ unw_fpreg_t UnwindCursor<A, R>::getFloatReg(int regNum) {
}
_LIBUNWIND_ABORT("unsupported float register");
#elif defined(_LIBUNWIND_TARGET_AARCH64)
return _msContext.V[regNum - UNW_ARM64_D0].D[0];
return _msContext.V[regNum - UNW_AARCH64_V0].D[0];
#else
(void)regNum;
_LIBUNWIND_ABORT("float registers unimplemented");
@ -848,7 +848,7 @@ void UnwindCursor<A, R>::setFloatReg(int regNum, unw_fpreg_t value) {
}
_LIBUNWIND_ABORT("unsupported float register");
#elif defined(_LIBUNWIND_TARGET_AARCH64)
_msContext.V[regNum - UNW_ARM64_D0].D[0] = value;
_msContext.V[regNum - UNW_AARCH64_V0].D[0] = value;
#else
(void)regNum;
(void)value;
@ -2061,7 +2061,7 @@ int UnwindCursor<A, R>::stepThroughSigReturn(Registers_arm64 &) {
for (int i = 0; i <= 30; ++i) {
uint64_t value = _addressSpace.get64(sigctx + kOffsetGprs +
static_cast<pint_t>(i * 8));
_registers.setRegister(UNW_ARM64_X0 + i, value);
_registers.setRegister(UNW_AARCH64_X0 + i, value);
}
_registers.setSP(_addressSpace.get64(sigctx + kOffsetSp));
_registers.setIP(_addressSpace.get64(sigctx + kOffsetPc));