mirror of
https://github.com/capstone-engine/llvm-capstone.git
synced 2025-01-01 13:20:25 +00:00
[ELF] - Applied clang format. NFC.
llvm-svn: 284705
This commit is contained in:
parent
8010b631d5
commit
a4c7e74d4b
@ -235,8 +235,8 @@ static void checkOptions(opt::InputArgList &Args) {
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}
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}
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static StringRef
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getString(opt::InputArgList &Args, unsigned Key, StringRef Default = "") {
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static StringRef getString(opt::InputArgList &Args, unsigned Key,
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StringRef Default = "") {
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if (auto *Arg = Args.getLastArg(Key))
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return Arg->getValue();
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return Default;
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@ -265,8 +265,8 @@ static bool hasZOption(opt::InputArgList &Args, StringRef Key) {
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return false;
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}
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static uint64_t
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getZOptionValue(opt::InputArgList &Args, StringRef Key, uint64_t Default) {
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static uint64_t getZOptionValue(opt::InputArgList &Args, StringRef Key,
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uint64_t Default) {
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for (auto *Arg : Args.filtered(OPT_z)) {
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StringRef Value = Arg->getValue();
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size_t Pos = Value.find("=");
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@ -718,7 +718,7 @@ static Symbol *createBitcodeSymbol(DenseSet<StringRef> &KeptComdats,
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if (!Keep)
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return Symtab<ELFT>::X->addUndefined(NameRef, Binding, Visibility, Type,
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CanOmitFromDynSym, F);
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}
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}
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if (Flags & BasicSymbolRef::SF_Undefined)
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return Symtab<ELFT>::X->addUndefined(NameRef, Binding, Visibility, Type,
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@ -162,7 +162,8 @@ public:
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return *SymbolBodies[SymbolIndex];
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}
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template <typename RelT> SymbolBody &getRelocTargetSym(const RelT &Rel) const {
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template <typename RelT>
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SymbolBody &getRelocTargetSym(const RelT &Rel) const {
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uint32_t SymIndex = Rel.getSymbol(Config->Mips64EL);
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return getSymbolBody(SymIndex);
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}
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@ -260,8 +261,7 @@ class BitcodeFile : public InputFile {
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public:
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explicit BitcodeFile(MemoryBufferRef M);
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static bool classof(const InputFile *F) { return F->kind() == BitcodeKind; }
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template <class ELFT>
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void parse(llvm::DenseSet<StringRef> &ComdatGroups);
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template <class ELFT> void parse(llvm::DenseSet<StringRef> &ComdatGroups);
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ArrayRef<Symbol *> getSymbols() { return Symbols; }
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std::unique_ptr<llvm::lto::InputFile> Obj;
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@ -173,9 +173,8 @@ InputSectionBase<ELFT>::getOffset(const DefinedRegular<ELFT> &Sym) const {
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return getOffset(Sym.Value);
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}
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template<class ELFT>
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InputSectionBase<ELFT>*
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InputSectionBase<ELFT>::getLinkOrderDep() const {
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template <class ELFT>
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InputSectionBase<ELFT> *InputSectionBase<ELFT>::getLinkOrderDep() const {
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const Elf_Shdr *Hdr = getSectionHdr();
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if ((Hdr->sh_flags & SHF_LINK_ORDER) && Hdr->sh_link != 0)
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return getFile()->getSections()[Hdr->sh_link];
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@ -199,8 +198,7 @@ InputSectionBase<ELFT> *InputSection<ELFT>::getRelocatedSection() {
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return Sections[this->Header->sh_info];
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}
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template <class ELFT>
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void InputSection<ELFT>::addThunk(const Thunk<ELFT> *T) {
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template <class ELFT> void InputSection<ELFT>::addThunk(const Thunk<ELFT> *T) {
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Thunks.push_back(T);
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}
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@ -452,7 +450,7 @@ void InputSectionBase<ELFT>::relocate(uint8_t *Buf, uint8_t *BufEnd) {
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// Patch a nop (0x60000000) to a ld.
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if (BufLoc + 8 <= BufEnd && read32be(BufLoc + 4) == 0x60000000)
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write32be(BufLoc + 4, 0xe8410028); // ld %r2, 40(%r1)
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// fallthrough
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// fallthrough
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default:
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Target->relocateOne(BufLoc, Type, SymVA);
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break;
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@ -540,8 +538,7 @@ static unsigned getReloc(IntTy Begin, IntTy Size, const ArrayRef<RelTy> &Rels,
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// .eh_frame is a sequence of CIE or FDE records.
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// This function splits an input section into records and returns them.
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template <class ELFT>
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void EhInputSection<ELFT>::split() {
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template <class ELFT> void EhInputSection<ELFT>::split() {
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// Early exit if already split.
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if (!this->Pieces.empty())
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return;
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@ -705,7 +702,7 @@ typename ELFT::uint MergeInputSection<ELFT>::getOffset(uintX_t Offset) const {
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// Create a map from input offsets to output offsets for all section pieces.
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// It is called after finalize().
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template <class ELFT> void MergeInputSection<ELFT>::finalizePieces() {
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template <class ELFT> void MergeInputSection<ELFT>::finalizePieces() {
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OffsetMap.reserve(this->Pieces.size());
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for (SectionPiece &Piece : this->Pieces) {
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if (!Piece.Live)
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@ -65,7 +65,7 @@ static std::unique_ptr<lto::LTO> createLTO() {
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if (Config->SaveTemps)
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checkError(Conf.addSaveTemps(std::string(Config->OutputFile) + ".",
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/*UseInputModulePath*/ true));
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/*UseInputModulePath*/ true));
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lto::ThinBackend Backend;
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if (Config->ThinLtoJobs != -1u)
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@ -240,7 +240,7 @@ LinkerScript<ELFT>::createInputSectionList(OutputSectionCommand &OutCmd) {
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}
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// After we created final list we should now set OutSec pointer to null,
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// instead of -1. Otherwise we may get a crash when writing relocs, in
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// instead of -1. Otherwise we may get a crash when writing relocs, in
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// case section is discarded by linker script
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for (InputSectionBase<ELFT> *S : Ret)
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S->OutSec = nullptr;
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@ -44,8 +44,7 @@ using namespace lld::elf;
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namespace {
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// A resolved relocation. The Sec and Offset fields are set if the relocation
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// was resolved to an offset within a section.
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template <class ELFT>
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struct ResolvedReloc {
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template <class ELFT> struct ResolvedReloc {
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InputSectionBase<ELFT> *Sec;
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typename ELFT::uint Offset;
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};
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@ -93,8 +93,7 @@ GotSection<ELFT>::GotSection()
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this->Header.sh_addralign = Target->GotEntrySize;
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}
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template <class ELFT>
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void GotSection<ELFT>::addEntry(SymbolBody &Sym) {
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template <class ELFT> void GotSection<ELFT>::addEntry(SymbolBody &Sym) {
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Sym.GotIndex = Entries.size();
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Entries.push_back(&Sym);
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}
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@ -294,7 +293,7 @@ template <class ELFT> void GotSection<ELFT>::writeMipsGot(uint8_t *Buf) {
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auto AddEntry = [&](const MipsGotEntry &SA) {
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uint8_t *Entry = Buf;
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Buf += sizeof(uintX_t);
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const SymbolBody* Body = SA.first;
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const SymbolBody *Body = SA.first;
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uintX_t VA = Body->template getVA<ELFT>(SA.second);
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writeUint<ELFT>(Entry, VA);
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};
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@ -1396,8 +1395,7 @@ template <class ELFT> void SymbolTableSection<ELFT>::finalize() {
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S.Symbol->DynsymIndex = ++I;
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}
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template <class ELFT>
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void SymbolTableSection<ELFT>::addSymbol(SymbolBody *B) {
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template <class ELFT> void SymbolTableSection<ELFT>::addSymbol(SymbolBody *B) {
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Symbols.push_back({B, StrTabSec.addString(B->getName(), false)});
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}
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@ -187,7 +187,7 @@ private:
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// GOT entries should have one-to-one mapping with dynamic symbols table.
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// But we use the same container's types for both kind of GOT entries
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// to handle them uniformly.
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typedef std::pair<const SymbolBody*, uintX_t> MipsGotEntry;
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typedef std::pair<const SymbolBody *, uintX_t> MipsGotEntry;
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typedef std::vector<MipsGotEntry> MipsGotEntries;
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llvm::DenseMap<MipsGotEntry, size_t> MipsGotMap;
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MipsGotEntries MipsLocal;
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@ -288,9 +288,7 @@ public:
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typename Base::Kind getKind() const override { return Base::SymTable; }
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static bool classof(const Base *B) { return B->getKind() == Base::SymTable; }
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ArrayRef<SymbolTableEntry> getSymbols() const {
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return Symbols;
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}
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ArrayRef<SymbolTableEntry> getSymbols() const { return Symbols; }
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unsigned NumLocals = 0;
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StringTableSection<ELFT> &StrTabSec;
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@ -271,7 +271,7 @@ static int32_t findMipsPairedAddend(const uint8_t *Buf, const uint8_t *BufLoc,
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readSignedLo16<E>(Buf + RI->r_offset);
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}
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warn("can't find matching " + getRelName(Type) + " relocation for " +
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getRelName(Rel->getType(Config->Mips64EL)));
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getRelName(Rel->getType(Config->Mips64EL)));
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return 0;
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}
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@ -444,8 +444,8 @@ static RelExpr adjustExpr(const elf::ObjectFile<ELFT> &File, SymbolBody &Body,
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// the refered symbol can be preemepted to refer to the executable.
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if (Config->Shared || (Config->Pic && !isRelExpr(Expr))) {
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StringRef Name = getSymbolName(File, Body);
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error("can't create dynamic relocation " + getRelName(Type) +
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" against " + (Name.empty() ? "readonly segment" : "symbol " + Name));
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error("can't create dynamic relocation " + getRelName(Type) + " against " +
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(Name.empty() ? "readonly segment" : "symbol " + Name));
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return Expr;
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}
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if (Body.getVisibility() != STV_DEFAULT) {
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@ -578,7 +578,8 @@ static void scanRelocs(InputSectionBase<ELFT> &C, ArrayRef<RelTy> Rels) {
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SymbolBody &Body = File.getRelocTargetSym(RI);
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uint32_t Type = RI.getType(Config->Mips64EL);
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// We only report undefined symbols if they are referenced somewhere in the code.
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// We only report undefined symbols if they are referenced somewhere in the
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// code.
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if (!Body.isLocal() && Body.isUndefined() && !Body.symbol()->isWeak())
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reportUndefined(Body);
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@ -246,8 +246,7 @@ SymbolTable<ELFT>::insert(StringRef &Name, uint8_t Type, uint8_t Visibility,
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S->IsUsedInRegularObj = true;
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if (!WasInserted && S->body()->Type != SymbolBody::UnknownType &&
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((Type == STT_TLS) != S->body()->isTls()))
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error("TLS attribute mismatch for symbol: " +
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conflictMsg(S->body(), File));
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error("TLS attribute mismatch for symbol: " + conflictMsg(S->body(), File));
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return {S, WasInserted};
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}
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@ -439,8 +439,7 @@ struct Symbol {
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llvm::AlignedCharArrayUnion<
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DefinedCommon, DefinedRegular<llvm::object::ELF64LE>,
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DefinedSynthetic<llvm::object::ELF64LE>, Undefined,
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SharedSymbol<llvm::object::ELF64LE>, LazyArchive, LazyObject>
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Body;
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SharedSymbol<llvm::object::ELF64LE>, LazyArchive, LazyObject> Body;
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SymbolBody *body() { return reinterpret_cast<SymbolBody *>(Body.buffer); }
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const SymbolBody *body() const { return const_cast<Symbol *>(this)->body(); }
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@ -185,8 +185,7 @@ public:
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void writePltHeader(uint8_t *Buf) const override;
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void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
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int32_t Index, unsigned RelOff) const override;
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RelExpr getThunkExpr(RelExpr Expr, uint32_t RelocType,
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const InputFile &File,
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RelExpr getThunkExpr(RelExpr Expr, uint32_t RelocType, const InputFile &File,
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const SymbolBody &S) const override;
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void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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};
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@ -203,8 +202,7 @@ public:
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void writePltHeader(uint8_t *Buf) const override;
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void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
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int32_t Index, unsigned RelOff) const override;
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RelExpr getThunkExpr(RelExpr Expr, uint32_t RelocType,
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const InputFile &File,
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RelExpr getThunkExpr(RelExpr Expr, uint32_t RelocType, const InputFile &File,
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const SymbolBody &S) const override;
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void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
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bool usesOnlyLowPageBits(uint32_t Type) const override;
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@ -266,9 +264,7 @@ bool TargetInfo::isTlsInitialExecRel(uint32_t Type) const { return false; }
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bool TargetInfo::isTlsLocalDynamicRel(uint32_t Type) const { return false; }
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bool TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const {
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return false;
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}
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bool TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const { return false; }
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RelExpr TargetInfo::adjustRelaxExpr(uint32_t Type, const uint8_t *Data,
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RelExpr Expr) const {
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@ -1046,26 +1042,33 @@ void PPC64TargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
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// be a pointer to the function descriptor in the .opd section. Using
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// this scheme is simpler, but requires an extra indirection per PLT dispatch.
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write32be(Buf, 0xf8410028); // std %r2, 40(%r1)
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write32be(Buf + 4, 0x3d620000 | applyPPCHa(Off)); // addis %r11, %r2, X@ha
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write32be(Buf + 8, 0xe98b0000 | applyPPCLo(Off)); // ld %r12, X@l(%r11)
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write32be(Buf + 12, 0xe96c0000); // ld %r11,0(%r12)
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write32be(Buf + 16, 0x7d6903a6); // mtctr %r11
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write32be(Buf + 20, 0xe84c0008); // ld %r2,8(%r12)
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write32be(Buf + 24, 0xe96c0010); // ld %r11,16(%r12)
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write32be(Buf + 28, 0x4e800420); // bctr
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write32be(Buf, 0xf8410028); // std %r2, 40(%r1)
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write32be(Buf + 4, 0x3d620000 | applyPPCHa(Off)); // addis %r11, %r2, X@ha
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write32be(Buf + 8, 0xe98b0000 | applyPPCLo(Off)); // ld %r12, X@l(%r11)
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write32be(Buf + 12, 0xe96c0000); // ld %r11,0(%r12)
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write32be(Buf + 16, 0x7d6903a6); // mtctr %r11
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write32be(Buf + 20, 0xe84c0008); // ld %r2,8(%r12)
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write32be(Buf + 24, 0xe96c0010); // ld %r11,16(%r12)
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write32be(Buf + 28, 0x4e800420); // bctr
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}
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static std::pair<uint32_t, uint64_t> toAddr16Rel(uint32_t Type, uint64_t Val) {
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uint64_t V = Val - PPC64TocOffset;
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switch (Type) {
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case R_PPC64_TOC16: return {R_PPC64_ADDR16, V};
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case R_PPC64_TOC16_DS: return {R_PPC64_ADDR16_DS, V};
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case R_PPC64_TOC16_HA: return {R_PPC64_ADDR16_HA, V};
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case R_PPC64_TOC16_HI: return {R_PPC64_ADDR16_HI, V};
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case R_PPC64_TOC16_LO: return {R_PPC64_ADDR16_LO, V};
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case R_PPC64_TOC16_LO_DS: return {R_PPC64_ADDR16_LO_DS, V};
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default: return {Type, Val};
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case R_PPC64_TOC16:
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return {R_PPC64_ADDR16, V};
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case R_PPC64_TOC16_DS:
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return {R_PPC64_ADDR16_DS, V};
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case R_PPC64_TOC16_HA:
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return {R_PPC64_ADDR16_HA, V};
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case R_PPC64_TOC16_HI:
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return {R_PPC64_ADDR16_HI, V};
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case R_PPC64_TOC16_LO:
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return {R_PPC64_ADDR16_LO, V};
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case R_PPC64_TOC16_LO_DS:
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return {R_PPC64_ADDR16_LO_DS, V};
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default:
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return {Type, Val};
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}
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}
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@ -1694,7 +1697,7 @@ void ARMTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
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// BLX (always unconditional) instruction to an ARM Target, select an
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// unconditional BL.
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write32le(Loc, 0xeb000000 | (read32le(Loc) & 0x00ffffff));
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// fall through as BL encoding is shared with B
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// fall through as BL encoding is shared with B
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case R_ARM_JUMP24:
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case R_ARM_PC24:
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case R_ARM_PLT32:
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@ -1728,7 +1731,7 @@ void ARMTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
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}
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// Bit 12 is 0 for BLX, 1 for BL
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write16le(Loc + 2, (read16le(Loc + 2) & ~0x1000) | (Val & 1) << 12);
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// Fall through as rest of encoding is the same as B.W
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// Fall through as rest of encoding is the same as B.W
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case R_ARM_THM_JUMP24:
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// Encoding B T4, BL T1, BLX T2: Val = S:I1:I2:imm10:imm11:0
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// FIXME: Use of I1 and I2 require v6T2ops
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@ -1990,29 +1993,25 @@ static void applyMipsPcReloc(uint8_t *Loc, uint32_t Type, uint64_t V) {
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write32<E>(Loc, (Instr & ~Mask) | ((V >> SHIFT) & Mask));
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}
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template <endianness E>
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static void writeMipsHi16(uint8_t *Loc, uint64_t V) {
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template <endianness E> static void writeMipsHi16(uint8_t *Loc, uint64_t V) {
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uint32_t Instr = read32<E>(Loc);
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uint16_t Res = ((V + 0x8000) >> 16) & 0xffff;
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write32<E>(Loc, (Instr & 0xffff0000) | Res);
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}
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template <endianness E>
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static void writeMipsHigher(uint8_t *Loc, uint64_t V) {
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template <endianness E> static void writeMipsHigher(uint8_t *Loc, uint64_t V) {
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uint32_t Instr = read32<E>(Loc);
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uint16_t Res = ((V + 0x80008000) >> 32) & 0xffff;
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write32<E>(Loc, (Instr & 0xffff0000) | Res);
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}
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template <endianness E>
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static void writeMipsHighest(uint8_t *Loc, uint64_t V) {
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template <endianness E> static void writeMipsHighest(uint8_t *Loc, uint64_t V) {
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uint32_t Instr = read32<E>(Loc);
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uint16_t Res = ((V + 0x800080008000) >> 48) & 0xffff;
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write32<E>(Loc, (Instr & 0xffff0000) | Res);
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}
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template <endianness E>
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static void writeMipsLo16(uint8_t *Loc, uint64_t V) {
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template <endianness E> static void writeMipsLo16(uint8_t *Loc, uint64_t V) {
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uint32_t Instr = read32<E>(Loc);
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write32<E>(Loc, (Instr & 0xffff0000) | (V & 0xffff));
|
||||
}
|
||||
@ -2045,9 +2044,9 @@ void MipsTargetInfo<ELFT>::writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
|
||||
uint64_t PltEntryAddr, int32_t Index,
|
||||
unsigned RelOff) const {
|
||||
const endianness E = ELFT::TargetEndianness;
|
||||
write32<E>(Buf, 0x3c0f0000); // lui $15, %hi(.got.plt entry)
|
||||
write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15)
|
||||
// jr $25
|
||||
write32<E>(Buf, 0x3c0f0000); // lui $15, %hi(.got.plt entry)
|
||||
write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15)
|
||||
// jr $25
|
||||
write32<E>(Buf + 8, isMipsR6<ELFT>() ? 0x03200009 : 0x03200008);
|
||||
write32<E>(Buf + 12, 0x25f80000); // addiu $24, $15, %lo(.got.plt entry)
|
||||
writeMipsHi16<E>(Buf, GotEntryAddr);
|
||||
|
@ -51,9 +51,8 @@ private:
|
||||
void copyLocalSymbols();
|
||||
void addReservedSymbols();
|
||||
void createSections();
|
||||
void forEachRelSec(
|
||||
std::function<void(InputSectionBase<ELFT> &, const typename ELFT::Shdr &)>
|
||||
Fn);
|
||||
void forEachRelSec(std::function<void(InputSectionBase<ELFT> &,
|
||||
const typename ELFT::Shdr &)> Fn);
|
||||
void sortSections();
|
||||
void finalizeSections();
|
||||
void addPredefinedSections();
|
||||
@ -529,14 +528,13 @@ template <class ELFT> static bool isDiscarded(InputSectionBase<ELFT> *S) {
|
||||
}
|
||||
|
||||
// Program header entry
|
||||
template<class ELFT>
|
||||
template <class ELFT>
|
||||
PhdrEntry<ELFT>::PhdrEntry(unsigned Type, unsigned Flags) {
|
||||
H.p_type = Type;
|
||||
H.p_flags = Flags;
|
||||
}
|
||||
|
||||
template<class ELFT>
|
||||
void PhdrEntry<ELFT>::add(OutputSectionBase<ELFT> *Sec) {
|
||||
template <class ELFT> void PhdrEntry<ELFT>::add(OutputSectionBase<ELFT> *Sec) {
|
||||
Last = Sec;
|
||||
if (!First)
|
||||
First = Sec;
|
||||
@ -1012,8 +1010,7 @@ static typename ELFT::uint computeFlags(typename ELFT::uint F) {
|
||||
|
||||
// Decide which program headers to create and which sections to include in each
|
||||
// one.
|
||||
template <class ELFT>
|
||||
std::vector<PhdrEntry<ELFT>> Writer<ELFT>::createPhdrs() {
|
||||
template <class ELFT> std::vector<PhdrEntry<ELFT>> Writer<ELFT>::createPhdrs() {
|
||||
std::vector<Phdr> Ret;
|
||||
auto AddHdr = [&](unsigned Type, unsigned Flags) -> Phdr * {
|
||||
Ret.emplace_back(Type, Flags);
|
||||
|
@ -28,8 +28,7 @@ template <class ELFT> bool isRelroSection(OutputSectionBase<ELFT> *Sec);
|
||||
// This describes a program header entry.
|
||||
// Each contains type, access flags and range of output sections that will be
|
||||
// placed in it.
|
||||
template<class ELFT>
|
||||
struct PhdrEntry {
|
||||
template <class ELFT> struct PhdrEntry {
|
||||
PhdrEntry(unsigned Type, unsigned Flags);
|
||||
void add(OutputSectionBase<ELFT> *Sec);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user