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Removing the unaligned load tests from builtins-x86.c since they're generated by a regular 'load' now.
llvm-svn: 129464
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@ -2092,8 +2092,6 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
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// If palignr is shifting the pair of vectors more than 32 bytes, emit zero.
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return llvm::Constant::getNullValue(ConvertType(E->getType()));
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}
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case X86::BI__builtin_ia32_loadups:
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case X86::BI__builtin_ia32_loadupd:
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case X86::BI__builtin_ia32_loaddqu: {
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const llvm::Type *VecTy = ConvertType(E->getType());
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const llvm::Type *IntTy = llvm::IntegerType::get(getLLVMContext(), 128);
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@ -273,7 +273,6 @@ void f0() {
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#endif
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tmp_V2i = __builtin_ia32_cvttps2pi(tmp_V4f);
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(void) __builtin_ia32_maskmovq(tmp_V8c, tmp_V8c, tmp_cp);
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tmp_V4f = __builtin_ia32_loadups(tmp_fCp);
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(void) __builtin_ia32_storeups(tmp_fp, tmp_V4f);
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(void) __builtin_ia32_storehps(tmp_V2ip, tmp_V4f);
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(void) __builtin_ia32_storelps(tmp_V2ip, tmp_V4f);
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@ -291,7 +290,6 @@ void f0() {
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tmp_V4f = __builtin_ia32_sqrtps(tmp_V4f);
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tmp_V4f = __builtin_ia32_sqrtss(tmp_V4f);
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(void) __builtin_ia32_maskmovdqu(tmp_V16c, tmp_V16c, tmp_cp);
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tmp_V2d = __builtin_ia32_loadupd(tmp_dCp);
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(void) __builtin_ia32_storeupd(tmp_dp, tmp_V2d);
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tmp_i = __builtin_ia32_movmskpd(tmp_V2d);
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tmp_i = __builtin_ia32_pmovmskb128(tmp_V16c);
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