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https://github.com/capstone-engine/llvm-capstone.git
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[AArch64] Add an aarch64-enable-ext-to-tbl option. NFC
This transform has caused a few issues with operations that can naturally be extended. This patch just adds a debug option for disabling the transform, useful for testing cases where it might not be profitable.
This commit is contained in:
David Green
parent
6bad175a87
commit
af56c4a4cb
@ -131,6 +131,10 @@ EnableCombineMGatherIntrinsics("aarch64-enable-mgather-combine", cl::Hidden,
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"gather intrinsics"),
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cl::init(true));
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static cl::opt<bool> EnableExtToTBL("aarch64-enable-ext-to-tbl", cl::Hidden,
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cl::desc("Combine ext and trunc to TBL"),
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cl::init(true));
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// All of the XOR, OR and CMP use ALU ports, and data dependency will become the
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// bottleneck after this transform on high end CPU. So this max leaf node
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// limitation is guard cmp+ccmp will be profitable.
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@ -14791,7 +14795,7 @@ bool AArch64TargetLowering::optimizeExtendOrTruncateConversion(
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Instruction *I, Loop *L, const TargetTransformInfo &TTI) const {
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// shuffle_vector instructions are serialized when targeting SVE,
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// see LowerSPLAT_VECTOR. This peephole is not beneficial.
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if (Subtarget->useSVEForFixedLengthVectors())
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if (!EnableExtToTBL || Subtarget->useSVEForFixedLengthVectors())
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return false;
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// Try to optimize conversions using tbl. This requires materializing constant
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@ -1,6 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=arm64-apple-ios -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64_be-unknown-linux -o - %s | FileCheck --check-prefix=CHECK-BE %s
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; RUN: llc -mtriple=aarch64_be-unknown-linux -aarch64-enable-ext-to-tbl=false -o - %s | FileCheck --check-prefix=CHECK-DISABLE %s
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; CHECK-LABEL: lCPI0_0:
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; CHECK-NEXT: .byte 0 ; 0x0
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@ -85,7 +86,30 @@ define void @trunc_v16i32_to_v16i8_in_loop(ptr %A, ptr %dst) {
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; CHECK-BE-NEXT: b.eq .LBB0_1
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; CHECK-BE-NEXT: // %bb.2: // %exit
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; CHECK-BE-NEXT: ret
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;
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; CHECK-DISABLE-LABEL: trunc_v16i32_to_v16i8_in_loop:
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; CHECK-DISABLE: // %bb.0: // %entry
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; CHECK-DISABLE-NEXT: mov x8, xzr
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; CHECK-DISABLE-NEXT: .LBB0_1: // %loop
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; CHECK-DISABLE-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-DISABLE-NEXT: add x9, x0, x8, lsl #6
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; CHECK-DISABLE-NEXT: ld1 { v0.4s }, [x9]
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; CHECK-DISABLE-NEXT: add x10, x9, #16
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; CHECK-DISABLE-NEXT: add x11, x9, #48
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; CHECK-DISABLE-NEXT: add x9, x9, #32
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; CHECK-DISABLE-NEXT: ld1 { v1.4s }, [x10]
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; CHECK-DISABLE-NEXT: ld1 { v2.4s }, [x11]
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; CHECK-DISABLE-NEXT: ld1 { v3.4s }, [x9]
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; CHECK-DISABLE-NEXT: add x9, x1, x8, lsl #4
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; CHECK-DISABLE-NEXT: add x8, x8, #1
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; CHECK-DISABLE-NEXT: cmp x8, #1000
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; CHECK-DISABLE-NEXT: uzp1 v0.8h, v0.8h, v1.8h
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; CHECK-DISABLE-NEXT: uzp1 v2.8h, v3.8h, v2.8h
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; CHECK-DISABLE-NEXT: uzp1 v0.16b, v0.16b, v2.16b
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; CHECK-DISABLE-NEXT: st1 { v0.16b }, [x9]
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; CHECK-DISABLE-NEXT: b.eq .LBB0_1
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; CHECK-DISABLE-NEXT: // %bb.2: // %exit
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; CHECK-DISABLE-NEXT: ret
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entry:
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br label %loop
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@ -131,6 +155,21 @@ define void @trunc_v16i32_to_v16i8_no_loop(ptr %A, ptr %dst) {
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; CHECK-BE-NEXT: uzp1 v0.16b, v0.16b, v2.16b
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; CHECK-BE-NEXT: st1 { v0.16b }, [x1]
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; CHECK-BE-NEXT: ret
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;
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; CHECK-DISABLE-LABEL: trunc_v16i32_to_v16i8_no_loop:
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; CHECK-DISABLE: // %bb.0: // %entry
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; CHECK-DISABLE-NEXT: add x8, x0, #16
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; CHECK-DISABLE-NEXT: add x9, x0, #48
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; CHECK-DISABLE-NEXT: add x10, x0, #32
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; CHECK-DISABLE-NEXT: ld1 { v0.4s }, [x0]
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; CHECK-DISABLE-NEXT: ld1 { v1.4s }, [x8]
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; CHECK-DISABLE-NEXT: ld1 { v2.4s }, [x9]
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; CHECK-DISABLE-NEXT: ld1 { v3.4s }, [x10]
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; CHECK-DISABLE-NEXT: uzp1 v0.8h, v0.8h, v1.8h
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; CHECK-DISABLE-NEXT: uzp1 v2.8h, v3.8h, v2.8h
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; CHECK-DISABLE-NEXT: uzp1 v0.16b, v0.16b, v2.16b
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; CHECK-DISABLE-NEXT: st1 { v0.16b }, [x1]
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; CHECK-DISABLE-NEXT: ret
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entry:
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%l.A = load <16 x i32>, ptr %A
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%trunc = trunc <16 x i32> %l.A to <16 x i8>
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@ -216,7 +255,25 @@ define void @trunc_v8i32_to_v8i8_in_loop(ptr %A, ptr %dst) {
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; CHECK-BE-NEXT: b.eq .LBB2_1
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; CHECK-BE-NEXT: // %bb.2: // %exit
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; CHECK-BE-NEXT: ret
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;
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; CHECK-DISABLE-LABEL: trunc_v8i32_to_v8i8_in_loop:
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; CHECK-DISABLE: // %bb.0: // %entry
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; CHECK-DISABLE-NEXT: mov x8, xzr
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; CHECK-DISABLE-NEXT: .LBB2_1: // %loop
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; CHECK-DISABLE-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-DISABLE-NEXT: add x9, x0, x8, lsl #5
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; CHECK-DISABLE-NEXT: add x10, x9, #16
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; CHECK-DISABLE-NEXT: ld1 { v0.4s }, [x9]
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; CHECK-DISABLE-NEXT: add x9, x1, x8, lsl #3
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; CHECK-DISABLE-NEXT: ld1 { v1.4s }, [x10]
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; CHECK-DISABLE-NEXT: add x8, x8, #1
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; CHECK-DISABLE-NEXT: cmp x8, #1000
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; CHECK-DISABLE-NEXT: uzp1 v0.8h, v0.8h, v1.8h
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; CHECK-DISABLE-NEXT: xtn v0.8b, v0.8h
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; CHECK-DISABLE-NEXT: st1 { v0.8b }, [x9]
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; CHECK-DISABLE-NEXT: b.eq .LBB2_1
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; CHECK-DISABLE-NEXT: // %bb.2: // %exit
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; CHECK-DISABLE-NEXT: ret
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entry:
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br label %loop
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@ -330,8 +387,42 @@ define void @trunc_v16i64_to_v16i8_in_loop(ptr %A, ptr %dst) {
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; CHECK-BE-NEXT: b.eq .LBB3_1
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; CHECK-BE-NEXT: // %bb.2: // %exit
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; CHECK-BE-NEXT: ret
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;
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; CHECK-DISABLE-LABEL: trunc_v16i64_to_v16i8_in_loop:
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; CHECK-DISABLE: // %bb.0: // %entry
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; CHECK-DISABLE-NEXT: mov x8, xzr
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; CHECK-DISABLE-NEXT: .LBB3_1: // %loop
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; CHECK-DISABLE-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-DISABLE-NEXT: add x9, x0, x8, lsl #7
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; CHECK-DISABLE-NEXT: add x10, x9, #16
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; CHECK-DISABLE-NEXT: add x11, x9, #48
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; CHECK-DISABLE-NEXT: ld1 { v0.2d }, [x9]
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; CHECK-DISABLE-NEXT: ld1 { v1.2d }, [x10]
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; CHECK-DISABLE-NEXT: add x10, x9, #112
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; CHECK-DISABLE-NEXT: ld1 { v2.2d }, [x11]
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; CHECK-DISABLE-NEXT: ld1 { v3.2d }, [x10]
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; CHECK-DISABLE-NEXT: add x10, x9, #96
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; CHECK-DISABLE-NEXT: add x11, x9, #32
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; CHECK-DISABLE-NEXT: ld1 { v4.2d }, [x10]
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; CHECK-DISABLE-NEXT: add x10, x9, #80
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; CHECK-DISABLE-NEXT: add x9, x9, #64
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; CHECK-DISABLE-NEXT: ld1 { v5.2d }, [x11]
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; CHECK-DISABLE-NEXT: ld1 { v6.2d }, [x10]
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; CHECK-DISABLE-NEXT: ld1 { v7.2d }, [x9]
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; CHECK-DISABLE-NEXT: uzp1 v0.4s, v0.4s, v1.4s
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; CHECK-DISABLE-NEXT: add x9, x1, x8, lsl #4
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; CHECK-DISABLE-NEXT: add x8, x8, #1
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; CHECK-DISABLE-NEXT: uzp1 v3.4s, v4.4s, v3.4s
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; CHECK-DISABLE-NEXT: cmp x8, #1000
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; CHECK-DISABLE-NEXT: uzp1 v4.4s, v7.4s, v6.4s
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; CHECK-DISABLE-NEXT: uzp1 v2.4s, v5.4s, v2.4s
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; CHECK-DISABLE-NEXT: uzp1 v1.8h, v4.8h, v3.8h
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; CHECK-DISABLE-NEXT: uzp1 v0.8h, v0.8h, v2.8h
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; CHECK-DISABLE-NEXT: uzp1 v0.16b, v0.16b, v1.16b
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; CHECK-DISABLE-NEXT: st1 { v0.16b }, [x9]
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; CHECK-DISABLE-NEXT: b.eq .LBB3_1
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; CHECK-DISABLE-NEXT: // %bb.2: // %exit
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; CHECK-DISABLE-NEXT: ret
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entry:
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br label %loop
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@ -431,8 +522,31 @@ define void @trunc_v8i64_to_v8i8_in_loop(ptr %A, ptr %dst) {
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; CHECK-BE-NEXT: b.eq .LBB4_1
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; CHECK-BE-NEXT: // %bb.2: // %exit
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; CHECK-BE-NEXT: ret
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;
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; CHECK-DISABLE-LABEL: trunc_v8i64_to_v8i8_in_loop:
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; CHECK-DISABLE: // %bb.0: // %entry
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; CHECK-DISABLE-NEXT: mov x8, xzr
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; CHECK-DISABLE-NEXT: .LBB4_1: // %loop
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; CHECK-DISABLE-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-DISABLE-NEXT: add x9, x0, x8, lsl #6
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; CHECK-DISABLE-NEXT: ld1 { v0.2d }, [x9]
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; CHECK-DISABLE-NEXT: add x10, x9, #16
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; CHECK-DISABLE-NEXT: add x11, x9, #48
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; CHECK-DISABLE-NEXT: add x9, x9, #32
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; CHECK-DISABLE-NEXT: ld1 { v1.2d }, [x10]
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; CHECK-DISABLE-NEXT: ld1 { v2.2d }, [x11]
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; CHECK-DISABLE-NEXT: ld1 { v3.2d }, [x9]
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; CHECK-DISABLE-NEXT: add x9, x1, x8, lsl #3
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; CHECK-DISABLE-NEXT: add x8, x8, #1
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; CHECK-DISABLE-NEXT: cmp x8, #1000
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; CHECK-DISABLE-NEXT: uzp1 v0.4s, v0.4s, v1.4s
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; CHECK-DISABLE-NEXT: uzp1 v2.4s, v3.4s, v2.4s
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; CHECK-DISABLE-NEXT: uzp1 v0.8h, v0.8h, v2.8h
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; CHECK-DISABLE-NEXT: xtn v0.8b, v0.8h
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; CHECK-DISABLE-NEXT: st1 { v0.8b }, [x9]
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; CHECK-DISABLE-NEXT: b.eq .LBB4_1
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; CHECK-DISABLE-NEXT: // %bb.2: // %exit
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; CHECK-DISABLE-NEXT: ret
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entry:
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br label %loop
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@ -529,7 +643,48 @@ define void @trunc_v8i19_to_v8i8_in_loop(ptr %A, ptr %dst) {
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; CHECK-BE-NEXT: b.eq .LBB5_1
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; CHECK-BE-NEXT: // %bb.2: // %exit
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; CHECK-BE-NEXT: ret
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;
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; CHECK-DISABLE-LABEL: trunc_v8i19_to_v8i8_in_loop:
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; CHECK-DISABLE: // %bb.0: // %entry
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; CHECK-DISABLE-NEXT: mov x8, xzr
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; CHECK-DISABLE-NEXT: .LBB5_1: // %loop
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; CHECK-DISABLE-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-DISABLE-NEXT: ldp x10, x9, [x0]
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; CHECK-DISABLE-NEXT: ldrb w16, [x0, #18]
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; CHECK-DISABLE-NEXT: lsr x11, x9, #40
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; CHECK-DISABLE-NEXT: ubfx x12, x9, #33, #7
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; CHECK-DISABLE-NEXT: lsr x15, x10, #45
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; CHECK-DISABLE-NEXT: lsr x13, x10, #40
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; CHECK-DISABLE-NEXT: ubfx x14, x10, #26, #14
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; CHECK-DISABLE-NEXT: orr w11, w12, w11, lsl #7
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; CHECK-DISABLE-NEXT: ldrh w12, [x0, #16]
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; CHECK-DISABLE-NEXT: fmov s0, w15
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; CHECK-DISABLE-NEXT: orr w13, w14, w13, lsl #14
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; CHECK-DISABLE-NEXT: ubfx x14, x9, #14, #18
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; CHECK-DISABLE-NEXT: add x0, x0, #32
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; CHECK-DISABLE-NEXT: fmov s1, w11
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; CHECK-DISABLE-NEXT: orr w11, w16, w12, lsl #8
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; CHECK-DISABLE-NEXT: lsl x12, x9, #24
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; CHECK-DISABLE-NEXT: mov v0.s[1], w13
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; CHECK-DISABLE-NEXT: ubfx x13, x10, #7, #25
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; CHECK-DISABLE-NEXT: extr x9, x10, x9, #40
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; CHECK-DISABLE-NEXT: orr w12, w11, w12
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; CHECK-DISABLE-NEXT: mov v1.s[1], w14
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; CHECK-DISABLE-NEXT: lsr w12, w12, #19
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; CHECK-DISABLE-NEXT: ubfx x9, x9, #12, #20
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; CHECK-DISABLE-NEXT: mov v0.s[2], w13
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; CHECK-DISABLE-NEXT: mov v1.s[2], w12
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; CHECK-DISABLE-NEXT: mov v0.s[3], w9
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; CHECK-DISABLE-NEXT: add x9, x1, x8, lsl #3
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; CHECK-DISABLE-NEXT: add x8, x8, #1
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; CHECK-DISABLE-NEXT: cmp x8, #1000
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; CHECK-DISABLE-NEXT: mov v1.s[3], w11
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; CHECK-DISABLE-NEXT: uzp1 v0.8h, v0.8h, v1.8h
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; CHECK-DISABLE-NEXT: xtn v0.8b, v0.8h
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; CHECK-DISABLE-NEXT: st1 { v0.8b }, [x9]
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; CHECK-DISABLE-NEXT: b.eq .LBB5_1
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; CHECK-DISABLE-NEXT: // %bb.2: // %exit
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; CHECK-DISABLE-NEXT: ret
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entry:
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br label %loop
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@ -610,7 +765,41 @@ define void @trunc_v11i64_to_v11i8_in_loop(ptr %A, ptr %dst) {
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; CHECK-BE-NEXT: b.eq .LBB6_1
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; CHECK-BE-NEXT: // %bb.2: // %exit
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; CHECK-BE-NEXT: ret
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;
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; CHECK-DISABLE-LABEL: trunc_v11i64_to_v11i8_in_loop:
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; CHECK-DISABLE: // %bb.0: // %entry
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; CHECK-DISABLE-NEXT: mov w8, #1000 // =0x3e8
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; CHECK-DISABLE-NEXT: .LBB6_1: // %loop
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; CHECK-DISABLE-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-DISABLE-NEXT: add x9, x0, #64
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; CHECK-DISABLE-NEXT: add x10, x0, #16
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; CHECK-DISABLE-NEXT: ld1 { v3.2d }, [x0]
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; CHECK-DISABLE-NEXT: ld1 { v0.2d }, [x9]
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; CHECK-DISABLE-NEXT: add x9, x0, #48
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; CHECK-DISABLE-NEXT: ld1 { v1.2d }, [x10]
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; CHECK-DISABLE-NEXT: add x10, x0, #32
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; CHECK-DISABLE-NEXT: ld1 { v2.2d }, [x9]
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; CHECK-DISABLE-NEXT: ldr d5, [x0, #80]
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; CHECK-DISABLE-NEXT: ld1 { v4.2d }, [x10]
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; CHECK-DISABLE-NEXT: add x9, x1, #10
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; CHECK-DISABLE-NEXT: subs x8, x8, #1
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; CHECK-DISABLE-NEXT: uzp1 v1.4s, v3.4s, v1.4s
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; CHECK-DISABLE-NEXT: uzp1 v0.4s, v0.4s, v5.4s
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; CHECK-DISABLE-NEXT: add x0, x0, #128
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; CHECK-DISABLE-NEXT: uzp1 v2.4s, v4.4s, v2.4s
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; CHECK-DISABLE-NEXT: xtn v0.4h, v0.4s
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; CHECK-DISABLE-NEXT: uzp1 v1.8h, v1.8h, v2.8h
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; CHECK-DISABLE-NEXT: uzp1 v1.16b, v1.16b, v0.16b
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; CHECK-DISABLE-NEXT: xtn v0.8b, v0.8h
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; CHECK-DISABLE-NEXT: rev16 v2.16b, v1.16b
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; CHECK-DISABLE-NEXT: rev64 v1.16b, v1.16b
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; CHECK-DISABLE-NEXT: st1 { v0.b }[2], [x9]
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; CHECK-DISABLE-NEXT: add x9, x1, #8
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; CHECK-DISABLE-NEXT: st1 { v2.h }[4], [x9]
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; CHECK-DISABLE-NEXT: str d1, [x1], #16
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; CHECK-DISABLE-NEXT: b.eq .LBB6_1
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; CHECK-DISABLE-NEXT: // %bb.2: // %exit
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; CHECK-DISABLE-NEXT: ret
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entry:
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br label %loop
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@ -662,10 +851,24 @@ define void @trunc_v16i16_to_v16i8_in_loop(ptr %A, ptr %dst) {
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; CHECK-BE-NEXT: b.eq .LBB7_1
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; CHECK-BE-NEXT: // %bb.2: // %exit
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; CHECK-BE-NEXT: ret
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;
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; CHECK-DISABLE-LABEL: trunc_v16i16_to_v16i8_in_loop:
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; CHECK-DISABLE: // %bb.0: // %entry
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; CHECK-DISABLE-NEXT: mov x8, xzr
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; CHECK-DISABLE-NEXT: .LBB7_1: // %loop
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; CHECK-DISABLE-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-DISABLE-NEXT: add x9, x0, x8, lsl #5
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; CHECK-DISABLE-NEXT: add x10, x9, #16
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; CHECK-DISABLE-NEXT: ld1 { v0.8h }, [x9]
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; CHECK-DISABLE-NEXT: add x9, x1, x8, lsl #4
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; CHECK-DISABLE-NEXT: ld1 { v1.8h }, [x10]
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; CHECK-DISABLE-NEXT: add x8, x8, #1
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; CHECK-DISABLE-NEXT: cmp x8, #1000
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; CHECK-DISABLE-NEXT: uzp1 v0.16b, v0.16b, v1.16b
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; CHECK-DISABLE-NEXT: st1 { v0.16b }, [x9]
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; CHECK-DISABLE-NEXT: b.eq .LBB7_1
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; CHECK-DISABLE-NEXT: // %bb.2: // %exit
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; CHECK-DISABLE-NEXT: ret
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entry:
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br label %loop
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@ -714,10 +917,22 @@ define void @trunc_v8i16_to_v8i8_in_loop(ptr %A, ptr %dst) {
|
||||
; CHECK-BE-NEXT: b.eq .LBB8_1
|
||||
; CHECK-BE-NEXT: // %bb.2: // %exit
|
||||
; CHECK-BE-NEXT: ret
|
||||
|
||||
|
||||
|
||||
|
||||
;
|
||||
; CHECK-DISABLE-LABEL: trunc_v8i16_to_v8i8_in_loop:
|
||||
; CHECK-DISABLE: // %bb.0: // %entry
|
||||
; CHECK-DISABLE-NEXT: mov x8, xzr
|
||||
; CHECK-DISABLE-NEXT: .LBB8_1: // %loop
|
||||
; CHECK-DISABLE-NEXT: // =>This Inner Loop Header: Depth=1
|
||||
; CHECK-DISABLE-NEXT: add x9, x0, x8, lsl #4
|
||||
; CHECK-DISABLE-NEXT: ld1 { v0.8h }, [x9]
|
||||
; CHECK-DISABLE-NEXT: add x9, x1, x8, lsl #3
|
||||
; CHECK-DISABLE-NEXT: add x8, x8, #1
|
||||
; CHECK-DISABLE-NEXT: cmp x8, #1000
|
||||
; CHECK-DISABLE-NEXT: xtn v0.8b, v0.8h
|
||||
; CHECK-DISABLE-NEXT: st1 { v0.8b }, [x9]
|
||||
; CHECK-DISABLE-NEXT: b.eq .LBB8_1
|
||||
; CHECK-DISABLE-NEXT: // %bb.2: // %exit
|
||||
; CHECK-DISABLE-NEXT: ret
|
||||
entry:
|
||||
br label %loop
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user