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[ScopInfo] Translate Scop::getParamSpace to isl++ [NFC]
llvm-svn: 310224
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@ -2511,7 +2511,7 @@ public:
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///
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/// Returns the set of context parameters that are currently constrained. In
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/// case the full set of parameters is needed, see @getFullParamSpace.
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__isl_give isl_space *getParamSpace() const;
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isl::space getParamSpace() const;
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/// Return the full space of parameters.
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///
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@ -117,7 +117,7 @@ static void collectInfo(Scop &S, isl_union_map *&Read,
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isl_union_map *&ReductionTagMap,
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isl_union_set *&TaggedStmtDomain,
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Dependences::AnalysisLevel Level) {
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isl_space *Space = S.getParamSpace();
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isl_space *Space = S.getParamSpace().release();
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Read = isl_union_map_empty(isl_space_copy(Space));
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MustWrite = isl_union_map_empty(isl_space_copy(Space));
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MayWrite = isl_union_map_empty(isl_space_copy(Space));
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@ -735,7 +735,7 @@ bool Dependences::isValidSchedule(Scop &S,
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return true;
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isl_union_map *Dependences = getDependences(TYPE_RAW | TYPE_WAW | TYPE_WAR);
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isl_space *Space = S.getParamSpace();
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isl_space *Space = S.getParamSpace().release();
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isl_union_map *Schedule = isl_union_map_empty(Space);
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isl_space *ScheduleSpace = nullptr;
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@ -121,7 +121,7 @@ const Scop *PolyhedralInfo::getScopContainingLoop(Loop *L) const {
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// Stmt[i0, i1] -> [i0, i1]
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__isl_give isl_union_map *PolyhedralInfo::getScheduleForLoop(const Scop *S,
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Loop *L) const {
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isl_union_map *Schedule = isl_union_map_empty(S->getParamSpace());
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isl_union_map *Schedule = isl_union_map_empty(S->getParamSpace().release());
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int CurrDim = S->getRelativeLoopDepth(L);
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DEBUG(dbgs() << "Relative loop depth:\t" << CurrDim << "\n");
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assert(CurrDim >= 0 && "Loop in region should have at least depth one");
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@ -1178,8 +1178,8 @@ void MemoryAccess::setNewAccessRelation(isl::map NewAccess) {
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if (isRead()) {
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// Check whether there is an access for every statement instance.
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isl::set StmtDomain = getStatement()->getDomain();
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StmtDomain = StmtDomain.intersect_params(
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getStatement()->getParent()->getContext());
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StmtDomain =
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StmtDomain.intersect_params(getStatement()->getParent()->getContext());
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isl::set NewDomain = NewAccess.domain();
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assert(StmtDomain.is_subset(NewDomain) &&
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"Partial READ accesses not supported");
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@ -2288,7 +2288,7 @@ void Scop::addUserContext() {
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isl_set *UserContext =
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isl_set_read_from_str(getIslCtx(), UserContextStr.c_str());
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isl_space *Space = getParamSpace();
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isl_space *Space = getParamSpace().release();
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if (isl_space_dim(Space, isl_dim_param) !=
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isl_set_dim(UserContext, isl_dim_param)) {
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auto SpaceStr = isl_space_to_str(Space);
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@ -2441,7 +2441,8 @@ simplifyAssumptionContext(__isl_take isl_set *AssumptionContext,
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isl_set_gist_params(AssumptionContext, DomainParameters);
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}
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AssumptionContext = isl_set_gist_params(AssumptionContext, S.getContext().release());
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AssumptionContext =
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isl_set_gist_params(AssumptionContext, S.getContext().release());
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return AssumptionContext;
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}
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@ -2475,7 +2476,8 @@ void Scop::simplifyContexts() {
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// otherwise we would access out of bound data. Now, knowing that code is
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// only executed for the case m >= 0, it is sufficient to assume p >= 0.
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AssumedContext = simplifyAssumptionContext(AssumedContext, *this);
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InvalidContext = isl_set_align_params(InvalidContext, getParamSpace());
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InvalidContext =
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isl_set_align_params(InvalidContext, getParamSpace().release());
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}
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/// Add the minimal/maximal access in @p Set to @p User.
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@ -2558,7 +2560,7 @@ static bool calculateMinMaxAccess(Scop::AliasGroupTy AliasGroup, Scop &S,
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MinMaxAccesses.reserve(AliasGroup.size());
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isl::union_set Domains = give(S.getDomains());
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isl::union_map Accesses = isl::union_map::empty(give(S.getParamSpace()));
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isl::union_map Accesses = isl::union_map::empty(S.getParamSpace());
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for (MemoryAccess *MA : AliasGroup)
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Accesses = Accesses.add_map(give(MA->getAccessRelation().release()));
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@ -3139,7 +3141,7 @@ bool Scop::propagateDomainConstraints(
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// Under the union of all predecessor conditions we can reach this block.
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isl::set PredDom = getPredecessorDomainConstraints(BB, Domain, DT, LI);
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Domain = Domain.intersect(PredDom).coalesce();
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Domain = Domain.align_params(isl::manage(getParamSpace()));
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Domain = Domain.align_params(getParamSpace());
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Loop *BBLoop = getRegionNodeLoop(RN, LI);
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if (BBLoop && BBLoop->getHeader() == BB && contains(BBLoop))
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@ -4279,9 +4281,7 @@ std::pair<std::string, std::string> Scop::getEntryExitStr() const {
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}
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isl::set Scop::getContext() const { return isl::manage(isl_set_copy(Context)); }
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__isl_give isl_space *Scop::getParamSpace() const {
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return isl_set_get_space(Context);
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}
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isl::space Scop::getParamSpace() const { return getContext().get_space(); }
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isl::space Scop::getFullParamSpace() const {
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std::vector<isl::id> FortranIDs;
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@ -4525,7 +4525,8 @@ void Scop::addRecordedAssumptions() {
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}
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void Scop::invalidate(AssumptionKind Kind, DebugLoc Loc, BasicBlock *BB) {
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addAssumption(Kind, isl_set_empty(getParamSpace()), Loc, AS_ASSUMPTION, BB);
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addAssumption(Kind, isl_set_empty(getParamSpace().release()), Loc,
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AS_ASSUMPTION, BB);
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}
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__isl_give isl_set *Scop::getInvalidContext() const {
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@ -4683,7 +4684,7 @@ __isl_give isl_pw_aff *Scop::getPwAffOnly(const SCEV *E, BasicBlock *BB) {
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isl::union_map
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Scop::getAccessesOfType(std::function<bool(MemoryAccess &)> Predicate) {
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isl::union_map Accesses = isl::union_map::empty(isl::manage(getParamSpace()));
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isl::union_map Accesses = isl::union_map::empty(getParamSpace());
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for (ScopStmt &Stmt : *this) {
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for (MemoryAccess *MA : Stmt) {
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@ -428,7 +428,8 @@ void IslAst::init(const Dependences &D) {
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if (UseContext)
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Build = isl_ast_build_from_context(S.getContext().release());
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else
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Build = isl_ast_build_from_context(isl_set_universe(S.getParamSpace()));
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Build = isl_ast_build_from_context(
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isl_set_universe(S.getParamSpace().release()));
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Build = isl_ast_build_set_at_each_domain(Build, AtEachDomain, nullptr);
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@ -815,9 +815,10 @@ IslNodeBuilder::createNewAccesses(ScopStmt *Stmt,
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auto SchedDom = isl_set_from_union_set(
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isl_union_map_domain(isl_union_map_copy(Schedule)));
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auto AccDom = isl_map_domain(MA->getAccessRelation().release());
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Dom = isl_set_intersect_params(Dom, Stmt->getParent()->getContext().release());
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SchedDom =
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isl_set_intersect_params(SchedDom, Stmt->getParent()->getContext().release());
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Dom = isl_set_intersect_params(Dom,
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Stmt->getParent()->getContext().release());
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SchedDom = isl_set_intersect_params(
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SchedDom, Stmt->getParent()->getContext().release());
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assert(isl_set_is_subset(SchedDom, AccDom) &&
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"Access relation not defined on full schedule domain");
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assert(isl_set_is_subset(Dom, AccDom) &&
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@ -1192,7 +1193,8 @@ Value *IslNodeBuilder::preloadInvariantLoad(const MemoryAccess &MA,
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return nullptr;
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}
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auto *Build = isl_ast_build_from_context(isl_set_universe(S.getParamSpace()));
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auto *Build =
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isl_ast_build_from_context(isl_set_universe(S.getParamSpace().release()));
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isl_set *Universe = isl_set_universe(isl_set_get_space(Domain));
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bool AlwaysExecuted = isl_set_is_equal(Domain, Universe);
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isl_set_free(Universe);
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@ -183,7 +183,7 @@ static bool isScalarUsesContainedInScop(const Scop &S,
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/// @returns live range reordering information that can be used to setup
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/// PPCG.
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static MustKillsInfo computeMustKillsInfo(const Scop &S) {
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const isl::space ParamSpace(isl::manage(S.getParamSpace()));
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const isl::space ParamSpace = S.getParamSpace();
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MustKillsInfo Info;
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// 1. Collect all ScopArrayInfo that satisfy *any* of the criteria:
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@ -1070,8 +1070,7 @@ static bool isPrefix(std::string String, std::string Prefix) {
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}
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Value *GPUNodeBuilder::getArraySize(gpu_array_info *Array) {
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isl::ast_build Build =
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isl::ast_build::from_context(S.getContext());
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isl::ast_build Build = isl::ast_build::from_context(S.getContext());
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Value *ArraySize = ConstantInt::get(Builder.getInt64Ty(), Array->size);
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if (!gpu_array_is_scalar(Array)) {
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@ -1099,8 +1098,7 @@ Value *GPUNodeBuilder::getArrayOffset(gpu_array_info *Array) {
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if (gpu_array_is_scalar(Array))
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return nullptr;
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isl::ast_build Build =
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isl::ast_build::from_context(S.getContext());
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isl::ast_build Build = isl::ast_build::from_context(S.getContext());
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isl::set Min = isl::manage(isl_set_copy(Array->extent)).lexmin();
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@ -1443,7 +1441,7 @@ GPUNodeBuilder::getReferencesInKernel(ppcg_kernel *Kernel) {
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for (auto &SAI : S.arrays())
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SubtreeValues.remove(SAI->getBasePtr());
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isl_space *Space = S.getParamSpace();
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isl_space *Space = S.getParamSpace().release();
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for (long i = 0; i < isl_space_dim(Space, isl_dim_param); i++) {
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isl_id *Id = isl_space_get_dim_id(Space, isl_dim_param, i);
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assert(IDToValue.count(Id));
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@ -2535,7 +2533,7 @@ public:
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///
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/// @return The relation describing all tagged memory accesses.
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isl_union_map *getTaggedAccesses(enum MemoryAccess::AccessType AccessTy) {
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isl_union_map *Accesses = isl_union_map_empty(S->getParamSpace());
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isl_union_map *Accesses = isl_union_map_empty(S->getParamSpace().release());
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for (auto &Stmt : *S)
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for (auto &Acc : Stmt)
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@ -2864,7 +2862,7 @@ public:
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/// `-polly-ignore-parameter-bounds` enabled, the Scop::Context does not
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/// contain all parameter dimensions.
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/// So, use the helper `alignPwAffs` to align all the `isl_pw_aff` together.
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isl_space *SeedAlignSpace = S->getParamSpace();
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isl_space *SeedAlignSpace = S->getParamSpace().release();
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SeedAlignSpace = isl_space_add_dims(SeedAlignSpace, isl_dim_set, 1);
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isl_space *AlignSpace = nullptr;
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@ -2935,7 +2933,7 @@ public:
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///
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/// @returns An identity map between the arrays in the scop.
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isl_union_map *getArrayIdentity() {
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isl_union_map *Maps = isl_union_map_empty(S->getParamSpace());
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isl_union_map *Maps = isl_union_map_empty(S->getParamSpace().release());
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for (auto &Array : S->arrays()) {
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isl_space *Space = Array->getSpace().release();
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@ -391,7 +391,7 @@ bool JSONImporter::importSchedule(Scop &S, Json::Value &JScop,
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return false;
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}
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auto ScheduleMap = isl_union_map_empty(S.getParamSpace());
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auto ScheduleMap = isl_union_map_empty(S.getParamSpace().release());
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for (ScopStmt &Stmt : S) {
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if (NewSchedule.find(&Stmt) != NewSchedule.end())
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ScheduleMap = isl_union_map_add_map(ScheduleMap, NewSchedule[&Stmt]);
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@ -562,8 +562,8 @@ bool JSONImporter::importAccesses(Scop &S, Json::Value &JScop,
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NewAccessDomain =
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isl_set_intersect_params(NewAccessDomain, S.getContext().release());
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CurrentAccessDomain =
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isl_set_intersect_params(CurrentAccessDomain, S.getContext().release());
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CurrentAccessDomain = isl_set_intersect_params(CurrentAccessDomain,
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S.getContext().release());
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if (MA->isRead() &&
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isl_set_is_subset(CurrentAccessDomain, NewAccessDomain) ==
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@ -174,7 +174,7 @@ private:
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for (auto &Stmt : *S) {
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isl::set Domain = Stmt.getDomain();
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isl::union_map WillBeOverwritten =
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isl::union_map::empty(give(S->getParamSpace()));
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isl::union_map::empty(S->getParamSpace());
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SmallVector<MemoryAccess *, 32> Accesses(getAccessesInOrder(Stmt));
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@ -190,7 +190,7 @@ private:
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auto AccRel = MA->getAccessRelation();
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AccRel = AccRel.intersect_domain(Domain);
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AccRel = AccRel.intersect_params(give(S->getContext()));
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AccRel = AccRel.intersect_params(S->getContext());
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// If a value is read in-between, do not consider it as overwritten.
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if (MA->isRead()) {
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@ -232,8 +232,7 @@ private:
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/// In all cases, both writes must write the same values.
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void coalesceWrites() {
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for (auto &Stmt : *S) {
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isl::set Domain =
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Stmt.getDomain().intersect_params(give(S->getContext()));
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isl::set Domain = Stmt.getDomain().intersect_params(S->getContext());
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// We let isl do the lookup for the same-value condition. For this, we
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// wrap llvm::Value into an isl::set such that isl can do the lookup in
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@ -258,8 +257,7 @@ private:
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// List of all eligible (for coalescing) writes of the future.
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// { [Domain[] -> Element[]] -> [Value[] -> MemoryAccess[]] }
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isl::union_map FutureWrites =
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isl::union_map::empty(give(S->getParamSpace()));
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isl::union_map FutureWrites = isl::union_map::empty(S->getParamSpace());
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// Iterate over accesses from the last to the first.
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SmallVector<MemoryAccess *, 32> Accesses(getAccessesInOrder(Stmt));
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@ -428,12 +426,12 @@ private:
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};
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isl::set Domain = Stmt.getDomain();
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Domain = Domain.intersect_params(give(S->getContext()));
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Domain = Domain.intersect_params(S->getContext());
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// List of element reads that still have the same value while iterating
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// through the MemoryAccesses.
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// { [Domain[] -> Element[]] -> Val[] }
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isl::union_map Known = isl::union_map::empty(give(S->getParamSpace()));
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isl::union_map Known = isl::union_map::empty(S->getParamSpace());
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SmallVector<MemoryAccess *, 32> Accesses(getAccessesInOrder(Stmt));
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for (MemoryAccess *MA : Accesses) {
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