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Add 8548 CPU definition and attributes
8548 CPU is GCC's name for the e500v2, so accept this in clang. The e500v2 doesn't support lwsync, so define __NO_LWSYNC__ for this as well, as GCC does. Differential Revision: https://reviews.llvm.org/D67787
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@ -157,6 +157,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
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Builder.defineMacro("_ARCH_A2Q");
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Builder.defineMacro("_ARCH_QP");
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}
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if (ArchDefs & ArchDefineE500)
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Builder.defineMacro("__NO_LWSYNC__");
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if (getTriple().getVendor() == llvm::Triple::BGQ) {
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Builder.defineMacro("__bg__");
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@ -312,6 +314,11 @@ bool PPCTargetInfo::initFeatureMap(
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.Case("pwr8", true)
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.Default(false);
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Features["spe"] = llvm::StringSwitch<bool>(CPU)
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.Case("8548", true)
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.Case("e500", true)
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.Default(false);
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if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
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return false;
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@ -449,16 +456,16 @@ ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
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}
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static constexpr llvm::StringLiteral ValidCPUNames[] = {
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{"generic"}, {"440"}, {"450"}, {"601"}, {"602"},
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{"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"},
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{"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"},
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{"7450"}, {"g4+"}, {"750"}, {"970"}, {"g5"},
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{"a2"}, {"a2q"}, {"e500mc"}, {"e5500"}, {"power3"},
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{"pwr3"}, {"power4"}, {"pwr4"}, {"power5"}, {"pwr5"},
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{"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"}, {"power6x"},
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{"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"}, {"pwr8"},
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{"power9"}, {"pwr9"}, {"powerpc"}, {"ppc"}, {"powerpc64"},
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{"ppc64"}, {"powerpc64le"}, {"ppc64le"},
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{"generic"}, {"440"}, {"450"}, {"601"}, {"602"},
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{"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"},
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{"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"},
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{"7450"}, {"g4+"}, {"750"}, {"8548"}, {"970"},
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{"g5"}, {"a2"}, {"a2q"}, {"e500"}, {"e500mc"},
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{"e5500"}, {"power3"}, {"pwr3"}, {"power4"}, {"pwr4"},
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{"power5"}, {"pwr5"}, {"power5x"}, {"pwr5x"}, {"power6"},
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{"pwr6"}, {"power6x"}, {"pwr6x"}, {"power7"}, {"pwr7"},
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{"power8"}, {"pwr8"}, {"power9"}, {"pwr9"}, {"powerpc"},
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{"ppc"}, {"powerpc64"}, {"ppc64"}, {"powerpc64le"}, {"ppc64le"},
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};
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bool PPCTargetInfo::isValidCPUName(StringRef Name) const {
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@ -44,7 +44,8 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
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ArchDefinePwr8 = 1 << 12,
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ArchDefinePwr9 = 1 << 13,
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ArchDefineA2 = 1 << 14,
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ArchDefineA2q = 1 << 15
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ArchDefineA2q = 1 << 15,
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ArchDefineE500 = 1 << 16
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} ArchDefineTypes;
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@ -145,6 +146,7 @@ public:
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ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7 |
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ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 |
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ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
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.Cases("8548", "e500", ArchDefineE500)
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.Default(ArchDefineNone);
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}
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return CPUKnown;
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@ -53,10 +53,12 @@ std::string ppc::getPPCTargetCPU(const ArgList &Args) {
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.Case("7450", "7450")
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.Case("G4+", "g4+")
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.Case("750", "750")
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.Case("8548", "e500")
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.Case("970", "970")
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.Case("G5", "g5")
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.Case("a2", "a2")
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.Case("a2q", "a2q")
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.Case("e500", "e500")
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.Case("e500mc", "e500mc")
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.Case("e5500", "e5500")
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.Case("power3", "pwr3")
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@ -276,6 +276,18 @@
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// PPC64NS: "-cc1"
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// PPC64NS: "-target-cpu" "ppc64"
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// RUN: %clang -target powerpc-fsl-linux -### -S %s \
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// RUN: -mcpu=e500 2>&1 | FileCheck -check-prefix=PPCE500 %s
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// PPCE500: clang
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// PPCE500: "-cc1"
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// PPCE500: "-target-cpu" "e500"
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// RUN: %clang -target powerpc-fsl-linux -### -S %s \
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// RUN: -mcpu=8548 2>&1 | FileCheck -check-prefix=PPC8548 %s
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// PPC8548: clang
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// PPC8548: "-cc1"
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// PPC8548: "-target-cpu" "e500"
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// RUN: %clang -target powerpc-fsl-linux -### -S %s \
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// RUN: -mcpu=e500mc 2>&1 | FileCheck -check-prefix=PPCE500MC %s
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// PPCE500MC: clang
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@ -79,10 +79,10 @@
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// PPC: error: unknown target CPU 'not-a-cpu'
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// PPC: note: valid target CPU values are: generic, 440, 450, 601, 602, 603,
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// PPC-SAME: 603e, 603ev, 604, 604e, 620, 630, g3, 7400, g4, 7450, g4+, 750,
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// PPC-SAME: 970, g5, a2, a2q, e500mc, e5500, power3, pwr3, power4, pwr4,
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// PPC-SAME: power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x, power7,
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// PPC-SAME: pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64, ppc64,
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// PPC-SAME: powerpc64le, ppc64le
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// PPC-SAME: 8548, 970, g5, a2, a2q, e500, e500mc, e5500, power3, pwr3, power4,
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// PPC-SAME: pwr4, power5, pwr5, power5x, pwr5x, power6, pwr6, power6x, pwr6x,
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// PPC-SAME: power7, pwr7, power8, pwr8, power9, pwr9, powerpc, ppc, powerpc64,
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// PPC-SAME: ppc64, powerpc64le, ppc64le
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// RUN: not %clang_cc1 -triple mips--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix MIPS
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// MIPS: error: unknown target CPU 'not-a-cpu'
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@ -7604,6 +7604,12 @@
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//
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// PPC32-SPE:#define __NO_FPRS__ 1
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// PPC32-SPE:#define __SPE__ 1
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//
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// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-unknown-linux-gnu -target-cpu 8548 < /dev/null | FileCheck -match-full-lines -check-prefix PPC8548 %s
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//
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// PPC8548:#define __NO_FPRS__ 1
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// PPC8548:#define __NO_LWSYNC__ 1
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// PPC8548:#define __SPE__ 1
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//
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// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc-apple-darwin8 < /dev/null | FileCheck -match-full-lines -check-prefix PPC-DARWIN %s
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//
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