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[Polly] [DependenceInfo] change WAR, WAW generation to correct semantics
= Change of WAR, WAW generation: = - `buildFlow(Sink, MustSource, MaySource, Sink)` treates any flow of the form `sink <- may source <- must source` as a *may* dependence. - we used to call: ```lang=cpp, name=old-flow-call.cpp Flow = buildFlow(MustWrite, MustWrite, Read, Schedule); WAW = isl_union_flow_get_must_dependence(Flow); WAR = isl_union_flow_get_may_dependence(Flow); ``` - This caused some WAW dependences to be treated as WAR dependences. - Incorrect semantics. - Now, we call WAR and WAW correctly. == Correct WAW: == ```lang=cpp, name=new-waw-call.cpp Flow = buildFlow(Write, MustWrite, MayWrite, Schedule); WAW = isl_union_flow_get_may_dependence(Flow); isl_union_flow_free(Flow); ``` == Correct WAR: == ```lang=cpp, name=new-war-call.cpp Flow = buildFlow(Write, Read, MustaWrite, Schedule); WAR = isl_union_flow_get_must_dependence(Flow); isl_union_flow_free(Flow); ``` - We want the "shortest" WAR possible (exact dependences). - We mark all the *must-writes* as may-source, reads as must-souce. - Then, we ask for *must* dependence. - This removes all the reads that flow through a *must-write* before reaching a sink. - Note that we only block ealier writes with *must-writes*. This is intuitively correct, as we do not want may-writes to block must-writes. - Leaves us with direct (R -> W). - This affects reduction generation since RED is built using WAW and WAR. = New StrictWAW for Reductions: = - We used to call: ```lang=cpp,name=old-waw-war-call.cpp Flow = buildFlow(MustWrite, MustWrite, Read, Schedule); WAW = isl_union_flow_get_must_dependence(Flow); WAR = isl_union_flow_get_may_dependence(Flow); ``` - This *is* the right model of WAW we need for reductions, just not in general. - Reductions need to track only *strict* WAW, without any interfering reductions. = Explanation: Why the new WAR dependences in tests are correct: = - We no longer set WAR = WAR - WAW - Hence, we will have WAR dependences that were originally removed. - These may look incorrect, but in fact make sense. == Code: == ```lang=llvm, name=new-war-dependence.ll ; void manyreductions(long *A) { ; for (long i = 0; i < 1024; i++) ; for (long j = 0; j < 1024; j++) ; S0: *A += 42; ; ; for (long i = 0; i < 1024; i++) ; for (long j = 0; j < 1024; j++) ; S1: *A += 42; ; ``` === WAR dependence: === { S0[1023, 1023] -> S1[0, 0] } - Between `S0[1023, 1023]` and `S1[0, 0]`, we will have the dependences: ```lang=cpp, name=dependence-incorrect, counterexample S0[1023, 1023]: *-- tmp = *A (load0)--* WAR 2 add = tmp + 42 | *-> *A = add (store0) | WAR 1 S1[0, 0]: | tmp = *A (load1) | add = tmp + 42 | A = add (store1)<-* ``` - One may assume that WAR2 *hides* WAR1 (since store0 happens before store1). However, within a statement, Polly has no idea about the ordering of loads and stores. - Hence, according to Polly, the code may have looked like this: ```lang=cpp, name=dependence-correct S0[1023, 1023]: A = add (store0) tmp = A (load0) ---* add = A + 42 | WAR 1 S1[0, 0]: | tmp = A (load1) | add = A + 42 | A = add (store1) <-* ``` - So, Polly generates (correct) WAR dependences. It does not make sense to remove these dependences, since they are correct with respect to Polly's model. Reviewers: grosser, Meinersbur tags: #polly Differential revision: https://reviews.llvm.org/D31386 llvm-svn: 299429
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@ -289,7 +289,8 @@ static __isl_give isl_union_flow *buildFlow(__isl_keep isl_union_map *Snk,
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isl_union_access_info *AI;
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AI = isl_union_access_info_from_sink(isl_union_map_copy(Snk));
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AI = isl_union_access_info_set_may_source(AI, isl_union_map_copy(MaySrc));
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if (MaySrc)
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AI = isl_union_access_info_set_may_source(AI, isl_union_map_copy(MaySrc));
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if (Src)
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AI = isl_union_access_info_set_must_source(AI, isl_union_map_copy(Src));
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AI = isl_union_access_info_set_schedule(AI, isl_schedule_copy(Schedule));
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@ -358,55 +359,132 @@ void Dependences::calculateDependences(Scop &S) {
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dbgs() << "MayWrite: " << MayWrite << "\n";
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dbgs() << "Schedule: " << Schedule << "\n");
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isl_union_map *StrictWAW = nullptr;
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{
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IslMaxOperationsGuard MaxOpGuard(IslCtx.get(), OptComputeOut);
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RAW = WAW = WAR = RED = nullptr;
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isl_union_map *Write = isl_union_map_union(isl_union_map_copy(MustWrite),
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isl_union_map_copy(MayWrite));
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// We are interested in detecting reductions that do not have intermediate
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// computations that are captured by other statements.
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//
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// Example:
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// void f(int *A, int *B) {
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// for(int i = 0; i <= 100; i++) {
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//
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// *-WAR (S0[i] -> S0[i + 1] 0 <= i <= 100)------------*
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// | |
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// *-WAW (S0[i] -> S0[i + 1] 0 <= i <= 100)------------*
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// | |
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// v |
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// S0: *A += i; >------------------*-----------------------*
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// |
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// if (i >= 98) { WAR (S0[i] -> S1[i]) 98 <= i <= 100
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// |
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// S1: *B = *A; <--------------*
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// }
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// }
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// }
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//
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// S0[0 <= i <= 100] has a reduction. However, the values in
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// S0[98 <= i <= 100] is captured in S1[98 <= i <= 100].
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// Since we allow free reordering on our reduction dependences, we need to
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// remove all instances of a reduction statement that have data dependences
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// orignating from them.
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// In the case of the example, we need to remove S0[98 <= i <= 100] from
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// our reduction dependences.
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//
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// When we build up the WAW dependences that are used to detect reductions,
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// we consider only **Writes that have no intermediate Reads**.
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//
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// `isl_union_flow_get_must_dependence` gives us dependences of the form:
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// (sink <- must_source).
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//
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// It *will not give* dependences of the form:
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// 1. (sink <- ... <- may_source <- ... <- must_source)
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// 2. (sink <- ... <- must_source <- ... <- must_source)
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//
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// For a detailed reference on ISL's flow analysis, see:
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// "Presburger Formulas and Polyhedral Compilation" - Approximate Dataflow
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// Analysis.
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//
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// Since we set "Write" as a must-source, "Read" as a may-source, and ask
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// for must dependences, we get all Writes to Writes that **do not flow
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// through a Read**.
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//
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// ScopInfo::checkForReductions makes sure that if something captures
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// the reduction variable in the same basic block, then it is rejected
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// before it is even handed here. This makes sure that there is exactly
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// one read and one write to a reduction variable in a Statement.
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// Example:
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// void f(int *sum, int A[N], int B[N]) {
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// for (int i = 0; i < N; i++) {
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// *sum += A[i]; < the store and the load is not tagged as a
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// B[i] = *sum; < reductionLike acccess due to the overlap.
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// }
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// }
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isl_union_flow *Flow = buildFlow(Write, Write, Read, Schedule);
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StrictWAW = isl_union_flow_get_must_dependence(Flow);
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isl_union_flow_free(Flow);
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if (OptAnalysisType == VALUE_BASED_ANALYSIS) {
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isl_union_flow *Flow;
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Flow = buildFlow(Read, MustWrite, MayWrite, Schedule);
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RAW = isl_union_flow_get_may_dependence(Flow);
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isl_union_flow_free(Flow);
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Flow = buildFlow(MustWrite, MustWrite, Read, Schedule);
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WAW = isl_union_flow_get_must_dependence(Flow);
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WAR = isl_union_flow_get_may_dependence(Flow);
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// This subtraction is needed to obtain the same results as were given by
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// isl_union_map_compute_flow. For large sets this may add some
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// compile-time cost. As there does not seem to be a need to distinguish
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// between WAW and WAR, refactoring Polly to only track general non-flow
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// dependences may improve performance.
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WAR = isl_union_map_subtract(WAR, isl_union_map_copy(WAW));
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Flow = buildFlow(Write, MustWrite, MayWrite, Schedule);
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WAW = isl_union_flow_get_may_dependence(Flow);
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isl_union_flow_free(Flow);
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// We need exact WAR dependences. That is, if there are
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// dependences of the form:
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// must-W2 (sink) <- must-W1 (sink) <- R (source)
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// We wish to generate *ONLY*:
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// { R -> W1 },
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// NOT:
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// { R -> W2, R -> W1 }
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//
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// However, in the case of may-writes, we do *not* wish to allow
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// may-writes to block must-writes. This makes sense, since perhaps the
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// may-write will not happen. In that case, the exact dependence will
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// be the (read -> must-write).
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// Example:
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// must-W2 (sink) <- may-W1 (sink) <- R (source)
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// We wish to generate:
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// { R-> W1, R -> W2 }
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//
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//
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// To achieve this, we use the fact that *must* dependences are not
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// allowed to flow through the may-source.
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// Since we set the may-source to MustWrite, we are guarenteed that
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// only the exact ("shortest") (must-write -> read) is captured.
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// Any number of intermediate may-writes are allowed.
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Flow = buildFlow(Write, Read, MustWrite, Schedule);
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WAR = isl_union_flow_get_must_dependence(Flow);
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isl_union_flow_free(Flow);
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isl_union_map_free(Write);
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isl_schedule_free(Schedule);
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} else {
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isl_union_flow *Flow;
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isl_union_map *Write = isl_union_map_union(isl_union_map_copy(MustWrite),
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isl_union_map_copy(MayWrite));
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Flow = buildFlow(Read, nullptr, Write, Schedule);
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RAW = isl_union_flow_get_may_dependence(Flow);
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isl_union_flow_free(Flow);
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Flow = buildFlow(Write, nullptr, Read, Schedule);
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WAR = isl_union_flow_get_may_dependence(Flow);
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isl_union_flow_free(Flow);
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Flow = buildFlow(Write, nullptr, Write, Schedule);
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WAW = isl_union_flow_get_may_dependence(Flow);
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isl_union_flow_free(Flow);
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isl_schedule_free(Schedule);
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isl_union_map_free(Write);
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isl_schedule_free(Schedule);
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}
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isl_union_map_free(MustWrite);
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@ -424,7 +502,8 @@ void Dependences::calculateDependences(Scop &S) {
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isl_union_map_free(RAW);
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isl_union_map_free(WAW);
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isl_union_map_free(WAR);
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RAW = WAW = WAR = nullptr;
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isl_union_map_free(StrictWAW);
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RAW = WAW = WAR = StrictWAW = nullptr;
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isl_ctx_reset_error(IslCtx.get());
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}
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@ -435,6 +514,7 @@ void Dependences::calculateDependences(Scop &S) {
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RED = isl_union_map_empty(isl_union_map_get_space(RAW));
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TC_RED = isl_union_map_empty(isl_union_set_get_space(TaggedStmtDomain));
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isl_union_set_free(TaggedStmtDomain);
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isl_union_map_free(StrictWAW);
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return;
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}
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@ -457,9 +537,9 @@ void Dependences::calculateDependences(Scop &S) {
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// 2) Intersect them with the actual RAW & WAW dependences to the get the
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// actual reduction dependences. This will ensure the load/store memory
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// addresses were __identical__ in the two iterations of the statement.
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// 3) Relax the original RAW and WAW dependences by subtracting the actual
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// reduction dependences. Binary reductions (sum += A[i]) cause both, and
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// the same, RAW and WAW dependences.
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// 3) Relax the original RAW, WAW and WAR dependences by subtracting the
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// actual reduction dependences. Binary reductions (sum += A[i]) cause
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// the same, RAW, WAW and WAR dependences.
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// 4) Add the privatization dependences which are widened versions of
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// already present dependences. They model the effect of manual
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// privatization at the outermost possible place (namely after the last
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@ -480,13 +560,14 @@ void Dependences::calculateDependences(Scop &S) {
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// Step 2)
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RED = isl_union_map_intersect(RED, isl_union_map_copy(RAW));
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RED = isl_union_map_intersect(RED, isl_union_map_copy(WAW));
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RED = isl_union_map_intersect(RED, StrictWAW);
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if (!isl_union_map_is_empty(RED)) {
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// Step 3)
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RAW = isl_union_map_subtract(RAW, isl_union_map_copy(RED));
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WAW = isl_union_map_subtract(WAW, isl_union_map_copy(RED));
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WAR = isl_union_map_subtract(WAR, isl_union_map_copy(RED));
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// Step 4)
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addPrivatizationDependences();
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@ -781,12 +781,6 @@ static bool containsOnlyMatrMultAcc(__isl_keep isl_map *PartialSchedule,
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/// and false, otherwise.
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static bool containsOnlyMatMulDep(__isl_keep isl_map *Schedule,
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const Dependences *D, int &Pos) {
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auto *WAR = D->getDependences(Dependences::TYPE_WAR);
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if (!isl_union_map_is_empty(WAR)) {
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isl_union_map_free(WAR);
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return false;
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}
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isl_union_map_free(WAR);
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auto *Dep = D->getDependences(Dependences::TYPE_RAW);
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auto *Red = D->getDependences(Dependences::TYPE_RED);
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if (Red)
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@ -6,7 +6,7 @@
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; CHECK: RAW dependences:
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; CHECK: { Stmt_bb9[0] -> Stmt_bb10[0] }
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; CHECK: WAR dependences:
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; CHECK: { }
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; CHECK: { Stmt_bb3[0] -> Stmt_bb10[0] }
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; CHECK: WAW dependences:
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; CHECK: { Stmt_bb3[0] -> Stmt_bb10[0] }
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; CHECK: Reduction dependences:
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@ -15,7 +15,7 @@
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; FUNC: RAW dependences:
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; FUNC-NEXT: { Stmt_bb9[0] -> Stmt_bb10[0]; [Stmt_bb9[0] -> Stmt_bb9_Write0_MemRef_tmp11[]] -> [Stmt_bb10[0] -> Stmt_bb10_Read0_MemRef_tmp11[]] }
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; FUNC-NEXT: WAR dependences:
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; FUNC-NEXT: { }
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; FUNC-NEXT: { Stmt_bb3[0] -> Stmt_bb10[0]; [Stmt_bb3[0] -> Stmt_bb3_Read0_MemRef_arg1[]] -> [Stmt_bb10[0] -> Stmt_bb10_Write1_MemRef_arg1[]] }
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; FUNC-NEXT: WAW dependences:
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; FUNC-NEXT: { Stmt_bb3[0] -> Stmt_bb10[0]; [Stmt_bb3[0] -> Stmt_bb3_Write1_MemRef_arg1[]] -> [Stmt_bb10[0] -> Stmt_bb10_Write1_MemRef_arg1[]] }
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; FUNC-NEXT: Reduction dependences:
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; VALUE: RAW dependences:
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; VALUE-NEXT: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, 1 + i2] : 0 <= i0 <= 35 and 0 <= i1 <= 35 and 0 <= i2 <= 34 }
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; VALUE-NEXT: WAR dependences:
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; VALUE-NEXT: { }
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; VALUE-NEXT: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, 1 + i2] : 0 <= i0 <= 35 and 0 <= i1 <= 35 and 0 <= i2 <= 34 }
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; VALUE-NEXT: WAW dependences:
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; VALUE-NEXT: { Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, 1 + i2] : 0 <= i0 <= 35 and 0 <= i1 <= 35 and 0 <= i2 <= 34 }
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@ -83,7 +83,7 @@ do.end45: ; preds = %do.cond42
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; FUNC-VALUE: RAW dependences:
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; FUNC-VALUE-NEXT: { [Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2_Write3_MemRef_C[]] -> [Stmt_do_body2[i0, i1, 1 + i2] -> Stmt_do_body2_Read0_MemRef_C[]] : 0 <= i0 <= 35 and 0 <= i1 <= 35 and 0 <= i2 <= 34; Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, 1 + i2] : 0 <= i0 <= 35 and 0 <= i1 <= 35 and 0 <= i2 <= 34 }
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; FUNC-VALUE-NEXT: WAR dependences:
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; FUNC-VALUE-NEXT: { }
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; FUNC-VALUE-NEXT: { [Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2_Read0_MemRef_C[]] -> [Stmt_do_body2[i0, i1, 1 + i2] -> Stmt_do_body2_Write3_MemRef_C[]] : 0 <= i0 <= 35 and 0 <= i1 <= 35 and 0 <= i2 <= 34; Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, 1 + i2] : 0 <= i0 <= 35 and 0 <= i1 <= 35 and 0 <= i2 <= 34 }
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; FUNC-VALUE-NEXT: WAW dependences:
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; FUNC-VALUE-NEXT: { [Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2_Write3_MemRef_C[]] -> [Stmt_do_body2[i0, i1, 1 + i2] -> Stmt_do_body2_Write3_MemRef_C[]] : 0 <= i0 <= 35 and 0 <= i1 <= 35 and 0 <= i2 <= 34; Stmt_do_body2[i0, i1, i2] -> Stmt_do_body2[i0, i1, 1 + i2] : 0 <= i0 <= 35 and 0 <= i1 <= 35 and 0 <= i2 <= 34 }
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; VALUE: RAW dependences:
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; VALUE-NEXT: { Stmt_A_must_write_20[i0] -> Stmt_B_write_from_A[i0] : 0 <= i0 <= 2999; Stmt_compute_i_square__TO__B_write_from_A[i0] -> Stmt_B_write_from_A[i0] : 0 <= i0 <= 2999 }
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; VALUE-NEXT: WAR dependences:
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; VALUE-NEXT: { Stmt_A_must_write_20[i0] -> Stmt_A_must_write_42[i0] : 0 <= i0 <= 2999; Stmt_B_write_from_A[i0] -> Stmt_A_must_write_42[i0] : 0 <= i0 <= 2999 }
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; VALUE-NEXT: { Stmt_B_write_from_A[i0] -> Stmt_A_must_write_42[i0] : 0 <= i0 <= 2999 }
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; VALUE-NEXT: WAW dependences:
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; VALUE-NEXT: { }
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; VALUE-NEXT: { Stmt_compute_i_square__TO__B_write_from_A[i0] -> Stmt_A_must_write_42[i0] : 0 <= i0 <= 2999; Stmt_A_must_write_20[i0] -> Stmt_A_must_write_42[i0] : 0 <= i0 <= 2999; Stmt_A_must_write_20[i0] -> Stmt_compute_i_square__TO__B_write_from_A[i0] : 0 <= i0 <= 2999 }
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; VALUE-NEXT: Reduction dependences:
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; VALUE-NEXT: { }
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; VALUE-NEXT: Transitive closure of reduction dependences:
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; VALUE-NEXT: { }
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; VALUE-NEXT: { }
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@ -0,0 +1,73 @@
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; RUN: opt %loadPolly -polly-dependences -analyze < %s | FileCheck %s
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;
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; Verify that the presence of a may-write (S1) between a read (S0) and a
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; must-write (S2) does not block the generation of RAW dependences. This makes
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; sure that we capture as many RAW dependences as possible.
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;
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; For this example, we want both (S0(Read) -> S1 (May-Write)) as well as
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; (S0(Read) -> S2(Must-Write)).
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;
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; CHECK: WAR dependences:
|
||||
; CHECK-NEXT: { Stmt_S0[i0] -> Stmt_S2[i0] : 0 < i0 <= 2; Stmt_S0[i0] -> Stmt_if_end__TO__S2[i0] : 0 < i0 <= 2 }
|
||||
;
|
||||
;
|
||||
; static const int N = 3000;
|
||||
;
|
||||
; void f(int *sum, int *A, int *B, int *out) {
|
||||
; for (int i = 0; i <= 2; i++) {
|
||||
; if (i) {
|
||||
; S0: *out += *sum;
|
||||
; }
|
||||
;
|
||||
; if (i * i) {
|
||||
; S1: *sum = *A;
|
||||
; }
|
||||
; S2: *sum = *B;
|
||||
; }
|
||||
; }
|
||||
;
|
||||
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
|
||||
|
||||
define void @f(i32* %sum, i32* %A, i32* %B, i32* %out) {
|
||||
entry:
|
||||
br label %for.cond
|
||||
|
||||
for.cond: ; preds = %for.inc, %entry
|
||||
%i.0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
|
||||
%exitcond = icmp ne i32 %i.0, 3
|
||||
br i1 %exitcond, label %for.body, label %for.end
|
||||
|
||||
for.body: ; preds = %for.cond
|
||||
%tobool = icmp eq i32 %i.0, 0
|
||||
br i1 %tobool, label %if.end, label %S0
|
||||
|
||||
S0: ; preds = %for.body
|
||||
%tmp = load i32, i32* %sum, align 4
|
||||
%tmp1 = load i32, i32* %out, align 4
|
||||
%add = add nsw i32 %tmp1, %tmp
|
||||
store i32 %add, i32* %out, align 4
|
||||
br label %if.end
|
||||
|
||||
if.end: ; preds = %for.body, %S0
|
||||
%mul = mul nsw i32 %i.0, %i.0
|
||||
%tobool1 = icmp eq i32 %mul, 0
|
||||
br i1 %tobool1, label %S2, label %S1
|
||||
|
||||
S1: ; preds = %if.end
|
||||
%tmp2 = load i32, i32* %A, align 4
|
||||
store i32 %tmp2, i32* %sum, align 4
|
||||
br label %S2
|
||||
|
||||
S2: ; preds = %if.end, %S1
|
||||
%tmp3 = load i32, i32* %B, align 4
|
||||
store i32 %tmp3, i32* %sum, align 4
|
||||
br label %for.inc
|
||||
|
||||
for.inc: ; preds = %S2
|
||||
%inc = add nuw nsw i32 %i.0, 1
|
||||
br label %for.cond
|
||||
|
||||
for.end: ; preds = %for.cond
|
||||
ret void
|
||||
}
|
||||
|
@ -6,7 +6,7 @@
|
||||
; CHECK: RAW dependences:
|
||||
; CHECK-NEXT: { Stmt_for_body[i0] -> Stmt_for_body[1 + i0] : 0 <= i0 <= 1022 }
|
||||
; CHECK-NEXT: WAR dependences:
|
||||
; CHECK-NEXT: { }
|
||||
; CHECK-NEXT: { Stmt_for_body[i0] -> Stmt_for_body[1 + i0] : 0 <= i0 <= 1022 }
|
||||
; CHECK-NEXT: WAW dependences:
|
||||
; CHECK-NEXT: { Stmt_for_body[i0] -> Stmt_for_body[1 + i0] : 0 <= i0 <= 1022 }
|
||||
; CHECK-NEXT: Reduction dependences:
|
||||
|
@ -12,7 +12,7 @@
|
||||
; CHECK: RAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S0[i0] -> Stmt_S1[i0, o1] : 0 <= i0 <= 1023 and 0 <= o1 <= 1023; Stmt_S2[i0, i1] -> Stmt_S3[i0] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023; Stmt_S3[i0] -> Stmt_S0[1 + i0] : 0 <= i0 <= 1022; Stmt_S1[i0, 1023] -> Stmt_S2[i0, o1] : 0 <= i0 <= 1023 and 0 <= o1 <= 1023; Stmt_S1[i0, i1] -> Stmt_S2[i0, 0] : 0 <= i0 <= 1023 and 0 <= i1 <= 1022 }
|
||||
; CHECK-NEXT: WAR dependences:
|
||||
; CHECK-NEXT: { }
|
||||
; CHECK-NEXT: { Stmt_S0[i0] -> Stmt_S1[i0, o1] : 0 <= i0 <= 1023 and 0 <= o1 <= 1023; Stmt_S2[i0, i1] -> Stmt_S3[i0] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023; Stmt_S3[i0] -> Stmt_S0[1 + i0] : 0 <= i0 <= 1022; Stmt_S1[i0, 1023] -> Stmt_S2[i0, o1] : 0 <= i0 <= 1023 and 0 <= o1 <= 1023; Stmt_S1[i0, i1] -> Stmt_S2[i0, 0] : 0 <= i0 <= 1023 and 0 <= i1 <= 1022 }
|
||||
; CHECK-NEXT: WAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S0[i0] -> Stmt_S1[i0, o1] : 0 <= i0 <= 1023 and 0 <= o1 <= 1023; Stmt_S2[i0, i1] -> Stmt_S3[i0] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023; Stmt_S3[i0] -> Stmt_S0[1 + i0] : 0 <= i0 <= 1022; Stmt_S1[i0, 1023] -> Stmt_S2[i0, o1] : 0 <= i0 <= 1023 and 0 <= o1 <= 1023; Stmt_S1[i0, i1] -> Stmt_S2[i0, 0] : 0 <= i0 <= 1023 and 0 <= i1 <= 1022 }
|
||||
; CHECK-NEXT: Reduction dependences:
|
||||
|
@ -3,9 +3,9 @@
|
||||
; CHECK: RAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S0[i0] -> Stmt_S1[o0, i0 - o0] : i0 <= 1023 and 0 <= o0 <= i0; Stmt_S1[i0, i1] -> Stmt_S2[-1 + i0 + i1] : 0 <= i0 <= 1023 and i1 >= 0 and -i0 < i1 <= 1024 - i0 and i1 <= 1023 }
|
||||
; CHECK-NEXT: WAR dependences:
|
||||
; CHECK-NEXT: { Stmt_S2[i0] -> Stmt_S2[1 + i0] : 0 <= i0 <= 1022; Stmt_S1[i0, i1] -> Stmt_S2[i0 + i1] : i0 >= 0 and i1 >= 0 and -i0 < i1 <= 1023 - i0 }
|
||||
; CHECK-NEXT: { Stmt_S2[i0] -> Stmt_S2[1 + i0] : 0 <= i0 <= 1022; Stmt_S1[0, 0] -> Stmt_S2[0] }
|
||||
; CHECK-NEXT: WAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S0[i0] -> Stmt_S1[o0, i0 - o0] : i0 <= 1023 and 0 <= o0 <= i0; Stmt_S1[0, 0] -> Stmt_S2[0] }
|
||||
; CHECK-NEXT: { Stmt_S0[i0] -> Stmt_S1[o0, i0 - o0] : i0 <= 1023 and 0 <= o0 <= i0; Stmt_S1[i0, i1] -> Stmt_S2[i0 + i1] : i0 >= 0 and 0 <= i1 <= 1023 - i0 }
|
||||
; CHECK-NEXT: Reduction dependences:
|
||||
; CHECK-NEXT: { Stmt_S1[i0, i1] -> Stmt_S1[1 + i0, -1 + i1] : 0 <= i0 <= 1022 and 0 < i1 <= 1023 }
|
||||
;
|
||||
|
@ -6,7 +6,7 @@
|
||||
; CHECK: RAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S3[i0] -> Stmt_S2[1 + i0, o1] : 0 <= i0 <= 97 and 0 <= o1 <= 99; Stmt_S1[i0] -> Stmt_S3[i0] : 0 <= i0 <= 98 }
|
||||
; CHECK-NEXT: WAR dependences:
|
||||
; CHECK-NEXT: { }
|
||||
; CHECK-NEXT: { Stmt_S3[i0] -> Stmt_S2[1 + i0, o1] : 0 <= i0 <= 97 and 0 <= o1 <= 99; Stmt_S1[i0] -> Stmt_S3[i0] : 0 <= i0 <= 98 }
|
||||
; CHECK-NEXT: WAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S3[i0] -> Stmt_S2[1 + i0, o1] : 0 <= i0 <= 97 and 0 <= o1 <= 99; Stmt_S1[i0] -> Stmt_S3[i0] : 0 <= i0 <= 98 }
|
||||
; CHECK-NEXT: Reduction dependences:
|
||||
|
@ -3,7 +3,7 @@
|
||||
; CHECK: RAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S3[o0] : i1 <= 1 - i0 and -i1 < o0 <= 1 and o0 <= 1 + i0 - i1; Stmt_S3[i0] -> Stmt_S2[o0, 1 - i0] : 0 <= i0 <= 1 and i0 < o0 <= 98; Stmt_S1[i0] -> Stmt_S3[2 + i0] : 0 <= i0 <= 96 }
|
||||
; CHECK-NEXT: WAR dependences:
|
||||
; CHECK-NEXT: { }
|
||||
; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S3[o0] : i1 <= 1 - i0 and -i1 < o0 <= 1 and o0 <= 1 + i0 - i1; Stmt_S3[i0] -> Stmt_S2[o0, 1 - i0] : 0 <= i0 <= 1 and i0 < o0 <= 98; Stmt_S1[i0] -> Stmt_S3[2 + i0] : 0 <= i0 <= 96 }
|
||||
; CHECK-NEXT: WAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S3[o0] : i1 <= 1 - i0 and -i1 < o0 <= 1 and o0 <= 1 + i0 - i1; Stmt_S3[i0] -> Stmt_S2[o0, 1 - i0] : 0 <= i0 <= 1 and i0 < o0 <= 98; Stmt_S1[i0] -> Stmt_S3[2 + i0] : 0 <= i0 <= 96 }
|
||||
; CHECK-NEXT: Reduction dependences:
|
||||
|
@ -3,7 +3,7 @@
|
||||
; CHECK: RAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S1[i1] : i0 >= 0 and i0 < i1 <= 98; Stmt_S1[i0] -> Stmt_S2[i0, i0] : 0 <= i0 <= 98; Stmt_S2[i0, i0] -> Stmt_S3[i0] : 0 <= i0 <= 98; Stmt_S3[i0] -> Stmt_S2[o0, i0] : i0 >= 0 and i0 < o0 <= 98 }
|
||||
; CHECK-NEXT: WAR dependences:
|
||||
; CHECK-NEXT: { }
|
||||
; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S1[i1] : i0 >= 0 and i0 < i1 <= 98; Stmt_S1[i0] -> Stmt_S2[i0, i0] : 0 <= i0 <= 98; Stmt_S2[i0, i0] -> Stmt_S3[i0] : 0 <= i0 <= 98; Stmt_S3[i0] -> Stmt_S2[o0, i0] : i0 >= 0 and i0 < o0 <= 98 }
|
||||
; CHECK-NEXT: WAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S2[i0, i1] -> Stmt_S1[i1] : i0 >= 0 and i0 < i1 <= 98; Stmt_S1[i0] -> Stmt_S2[i0, i0] : 0 <= i0 <= 98; Stmt_S2[i0, i0] -> Stmt_S3[i0] : 0 <= i0 <= 98; Stmt_S3[i0] -> Stmt_S2[o0, i0] : i0 >= 0 and i0 < o0 <= 98 }
|
||||
; CHECK-NEXT: Reduction dependences:
|
||||
|
@ -3,7 +3,7 @@
|
||||
; CHECK: RAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S2[i0, 0] -> Stmt_S1[1 + i0, 0] : 0 <= i0 <= 97; Stmt_S1[i0, 0] -> Stmt_S2[i0, 0] : 0 <= i0 <= 98 }
|
||||
; CHECK-NEXT: WAR dependences:
|
||||
; CHECK-NEXT: { }
|
||||
; CHECK-NEXT: { Stmt_S2[i0, 0] -> Stmt_S1[1 + i0, 0] : 0 <= i0 <= 97; Stmt_S1[i0, 0] -> Stmt_S2[i0, 0] : 0 <= i0 <= 98 }
|
||||
; CHECK-NEXT: WAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S2[i0, 0] -> Stmt_S1[1 + i0, 0] : 0 <= i0 <= 97; Stmt_S1[i0, 0] -> Stmt_S2[i0, 0] : 0 <= i0 <= 98 }
|
||||
; CHECK-NEXT: Reduction dependences:
|
||||
|
@ -61,7 +61,7 @@
|
||||
; CHECK: RAW dependences:
|
||||
; CHECK-NEXT: { Stmt_bb150[1023, 1023] -> Stmt_bb162[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb150[i0, i1] -> Stmt_bb162[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb150[1023, 1023] -> Stmt_bb162[0, 0]; Stmt_bb174[1023, 1023] -> Stmt_bb186[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb174[i0, i1] -> Stmt_bb186[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb174[1023, 1023] -> Stmt_bb186[0, 0]; Stmt_bb102[1023, 1023] -> Stmt_bb114[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb102[i0, i1] -> Stmt_bb114[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb102[1023, 1023] -> Stmt_bb114[0, 0]; Stmt_bb42[1023, 1023] -> Stmt_bb54[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb42[i0, i1] -> Stmt_bb54[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb42[1023, 1023] -> Stmt_bb54[0, 0]; Stmt_bb54[1023, 1023] -> Stmt_bb66[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb54[i0, i1] -> Stmt_bb66[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb54[1023, 1023] -> Stmt_bb66[0, 0]; Stmt_bb31[1023, 1023] -> Stmt_bb42[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb31[i0, i1] -> Stmt_bb42[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb31[1023, 1023] -> Stmt_bb42[0, 0]; Stmt_bb162[1023, 1023] -> Stmt_bb174[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb162[i0, i1] -> Stmt_bb174[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb162[1023, 1023] -> Stmt_bb174[0, 0]; Stmt_bb126[1023, 1023] -> Stmt_bb138[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb126[i0, i1] -> Stmt_bb138[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb126[1023, 1023] -> Stmt_bb138[0, 0]; Stmt_bb90[1023, 1023] -> Stmt_bb102[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb90[i0, i1] -> Stmt_bb102[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb90[1023, 1023] -> Stmt_bb102[0, 0]; Stmt_bb138[1023, 1023] -> Stmt_bb150[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb138[i0, i1] -> Stmt_bb150[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb138[1023, 1023] -> Stmt_bb150[0, 0]; Stmt_bb66[1023, 1023] -> Stmt_bb78[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb66[i0, i1] -> Stmt_bb78[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb66[1023, 1023] -> Stmt_bb78[0, 0]; Stmt_bb78[1023, 1023] -> Stmt_bb90[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb78[i0, i1] -> Stmt_bb90[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb78[1023, 1023] -> Stmt_bb90[0, 0]; Stmt_bb114[1023, 1023] -> Stmt_bb126[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb114[i0, i1] -> Stmt_bb126[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb114[1023, 1023] -> Stmt_bb126[0, 0] }
|
||||
; CHECK-NEXT: WAR dependences:
|
||||
; CHECK-NEXT: { }
|
||||
; CHECK-NEXT: { Stmt_bb150[1023, 1023] -> Stmt_bb162[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb150[i0, i1] -> Stmt_bb162[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb150[1023, 1023] -> Stmt_bb162[0, 0]; Stmt_bb174[1023, 1023] -> Stmt_bb186[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb174[i0, i1] -> Stmt_bb186[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb174[1023, 1023] -> Stmt_bb186[0, 0]; Stmt_bb102[1023, 1023] -> Stmt_bb114[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb102[i0, i1] -> Stmt_bb114[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb102[1023, 1023] -> Stmt_bb114[0, 0]; Stmt_bb42[1023, 1023] -> Stmt_bb54[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb42[i0, i1] -> Stmt_bb54[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb42[1023, 1023] -> Stmt_bb54[0, 0]; Stmt_bb54[1023, 1023] -> Stmt_bb66[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb54[i0, i1] -> Stmt_bb66[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb54[1023, 1023] -> Stmt_bb66[0, 0]; Stmt_bb31[1023, 1023] -> Stmt_bb42[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb31[i0, i1] -> Stmt_bb42[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb31[1023, 1023] -> Stmt_bb42[0, 0]; Stmt_bb162[1023, 1023] -> Stmt_bb174[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb162[i0, i1] -> Stmt_bb174[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb162[1023, 1023] -> Stmt_bb174[0, 0]; Stmt_bb126[1023, 1023] -> Stmt_bb138[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb126[i0, i1] -> Stmt_bb138[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb126[1023, 1023] -> Stmt_bb138[0, 0]; Stmt_bb90[1023, 1023] -> Stmt_bb102[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb90[i0, i1] -> Stmt_bb102[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb90[1023, 1023] -> Stmt_bb102[0, 0]; Stmt_bb138[1023, 1023] -> Stmt_bb150[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb138[i0, i1] -> Stmt_bb150[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb138[1023, 1023] -> Stmt_bb150[0, 0]; Stmt_bb66[1023, 1023] -> Stmt_bb78[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb66[i0, i1] -> Stmt_bb78[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb66[1023, 1023] -> Stmt_bb78[0, 0]; Stmt_bb78[1023, 1023] -> Stmt_bb90[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb78[i0, i1] -> Stmt_bb90[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb78[1023, 1023] -> Stmt_bb90[0, 0]; Stmt_bb114[1023, 1023] -> Stmt_bb126[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb114[i0, i1] -> Stmt_bb126[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb114[1023, 1023] -> Stmt_bb126[0, 0] }
|
||||
; CHECK-NEXT: WAW dependences:
|
||||
; CHECK-NEXT: { Stmt_bb150[1023, 1023] -> Stmt_bb162[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb150[i0, i1] -> Stmt_bb162[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb150[1023, 1023] -> Stmt_bb162[0, 0]; Stmt_bb174[1023, 1023] -> Stmt_bb186[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb174[i0, i1] -> Stmt_bb186[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb174[1023, 1023] -> Stmt_bb186[0, 0]; Stmt_bb102[1023, 1023] -> Stmt_bb114[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb102[i0, i1] -> Stmt_bb114[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb102[1023, 1023] -> Stmt_bb114[0, 0]; Stmt_bb42[1023, 1023] -> Stmt_bb54[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb42[i0, i1] -> Stmt_bb54[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb42[1023, 1023] -> Stmt_bb54[0, 0]; Stmt_bb54[1023, 1023] -> Stmt_bb66[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb54[i0, i1] -> Stmt_bb66[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb54[1023, 1023] -> Stmt_bb66[0, 0]; Stmt_bb31[1023, 1023] -> Stmt_bb42[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb31[i0, i1] -> Stmt_bb42[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb31[1023, 1023] -> Stmt_bb42[0, 0]; Stmt_bb162[1023, 1023] -> Stmt_bb174[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb162[i0, i1] -> Stmt_bb174[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb162[1023, 1023] -> Stmt_bb174[0, 0]; Stmt_bb126[1023, 1023] -> Stmt_bb138[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb126[i0, i1] -> Stmt_bb138[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb126[1023, 1023] -> Stmt_bb138[0, 0]; Stmt_bb90[1023, 1023] -> Stmt_bb102[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb90[i0, i1] -> Stmt_bb102[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb90[1023, 1023] -> Stmt_bb102[0, 0]; Stmt_bb138[1023, 1023] -> Stmt_bb150[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb138[i0, i1] -> Stmt_bb150[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb138[1023, 1023] -> Stmt_bb150[0, 0]; Stmt_bb66[1023, 1023] -> Stmt_bb78[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb66[i0, i1] -> Stmt_bb78[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb66[1023, 1023] -> Stmt_bb78[0, 0]; Stmt_bb78[1023, 1023] -> Stmt_bb90[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb78[i0, i1] -> Stmt_bb90[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb78[1023, 1023] -> Stmt_bb90[0, 0]; Stmt_bb114[1023, 1023] -> Stmt_bb126[o0, o1] : o0 <= 1023 and o1 >= 0 and -1024o0 < o1 <= 1023; Stmt_bb114[i0, i1] -> Stmt_bb126[0, 0] : i0 >= 0 and 0 <= i1 <= 1048574 - 1024i0 and i1 <= 1023; Stmt_bb114[1023, 1023] -> Stmt_bb126[0, 0] }
|
||||
; CHECK-NEXT: Reduction dependences:
|
||||
|
@ -10,7 +10,7 @@
|
||||
; CHECK-NEXT: RAW dependences:
|
||||
; CHECK-NEXT: { [Stmt_for_cond[i0] -> MemRef_sum[0{{\]\]}} -> [Stmt_for_cond[1 + i0] -> MemRef_sum[0{{\]\]}} : 0 <= i0 <= 99 }
|
||||
; CHECK-NEXT: WAR dependences:
|
||||
; CHECK-NEXT: { }
|
||||
; CHECK-NEXT: { [Stmt_for_cond[i0] -> MemRef_sum[0{{\]\]}} -> [Stmt_for_cond[1 + i0] -> MemRef_sum[0{{\]\]}} : 0 <= i0 <= 99 }
|
||||
; CHECK-NEXT: WAW dependences:
|
||||
; CHECK-NEXT: { [Stmt_for_cond[i0] -> MemRef_sum[0{{\]\]}} -> [Stmt_for_cond[1 + i0] -> MemRef_sum[0{{\]\]}} : 0 <= i0 <= 99 }
|
||||
; CHECK-NEXT: Reduction dependences:
|
||||
|
@ -3,7 +3,7 @@
|
||||
; CHECK: RAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S2[i0] -> Stmt_S0[1 + i0] : 0 <= i0 <= 98; Stmt_S0[i0] -> Stmt_S1[i0, o1] : 0 <= i0 <= 99 and 0 <= o1 <= 99; Stmt_S1[i0, i1] -> Stmt_S2[i0] : 0 <= i0 <= 99 and 0 <= i1 <= 99 }
|
||||
; CHECK-NEXT: WAR dependences:
|
||||
; CHECK-NEXT: { }
|
||||
; CHECK-NEXT: { Stmt_S2[i0] -> Stmt_S0[1 + i0] : 0 <= i0 <= 98; Stmt_S0[i0] -> Stmt_S1[i0, o1] : 0 <= i0 <= 99 and 0 <= o1 <= 99; Stmt_S1[i0, i1] -> Stmt_S2[i0] : 0 <= i0 <= 99 and 0 <= i1 <= 99 }
|
||||
; CHECK-NEXT: WAW dependences:
|
||||
; CHECK-NEXT: { Stmt_S2[i0] -> Stmt_S0[1 + i0] : 0 <= i0 <= 98; Stmt_S0[i0] -> Stmt_S1[i0, o1] : 0 <= i0 <= 99 and 0 <= o1 <= 99; Stmt_S1[i0, i1] -> Stmt_S2[i0] : 0 <= i0 <= 99 and 0 <= i1 <= 99 }
|
||||
; CHECK-NEXT: Reduction dependences:
|
||||
|
@ -3,7 +3,7 @@
|
||||
; CHECK: RAW dependences:
|
||||
; CHECK-NEXT: [N] -> { Stmt_S0[] -> Stmt_S1[o0] : N >= 11 and 0 <= o0 <= 1023; Stmt_S1[i0] -> Stmt_S2[] : N >= 11 and 0 <= i0 <= 1023 }
|
||||
; CHECK-NEXT: WAR dependences:
|
||||
; CHECK-NEXT: [N] -> { }
|
||||
; CHECK-NEXT: [N] -> { Stmt_S1[i0] -> Stmt_S2[] : N >= 11 and 0 <= i0 <= 1023 }
|
||||
; CHECK-NEXT: WAW dependences:
|
||||
; CHECK-NEXT: [N] -> { Stmt_S0[] -> Stmt_S1[o0] : N >= 11 and 0 <= o0 <= 1023; Stmt_S1[i0] -> Stmt_S2[] : N >= 11 and 0 <= i0 <= 1023 }
|
||||
; CHECK-NEXT: Reduction dependences:
|
||||
|
Loading…
x
Reference in New Issue
Block a user