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[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*

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This commit is contained in:
Fangrui Song 2020-02-13 21:58:16 -08:00
parent 16bf89267e
commit bcd24b2d43
74 changed files with 419 additions and 420 deletions
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2
llvm/include/llvm/CodeGen/AsmPrinter.h
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@ -430,7 +430,7 @@ public:
virtual void emitBasicBlockEnd(const MachineBasicBlock &MBB);
/// Targets should implement this to emit instructions.
virtual void EmitInstruction(const MachineInstr *) {
virtual void emitInstruction(const MachineInstr *) {
llvm_unreachable("EmitInstruction not implemented");
}

12
llvm/include/llvm/MC/MCObjectStreamer.h
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@ -50,10 +50,10 @@ class MCObjectStreamer : public MCStreamer {
SmallVector<PendingMCFixup, 2> PendingFixups;
virtual void EmitInstToData(const MCInst &Inst, const MCSubtargetInfo&) = 0;
void EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) override;
void EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) override;
MCSymbol *EmitCFILabel() override;
void EmitInstructionImpl(const MCInst &Inst, const MCSubtargetInfo &STI);
void emitCFIStartProcImpl(MCDwarfFrameInfo &Frame) override;
void emitCFIEndProcImpl(MCDwarfFrameInfo &Frame) override;
MCSymbol *emitCFILabel() override;
void emitInstructionImpl(const MCInst &Inst, const MCSubtargetInfo &STI);
void resolvePendingFixups();
protected:
@ -70,7 +70,7 @@ public:
bool isIntegratedAssemblerRequired() const override { return true; }
void EmitFrames(MCAsmBackend *MAB);
void EmitCFISections(bool EH, bool Debug) override;
void emitCFISections(bool EH, bool Debug) override;
MCFragment *getCurrentFragment() const;
@ -123,7 +123,7 @@ public:
void emitSLEB128Value(const MCExpr *Value) override;
void EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol) override;
void ChangeSection(MCSection *Section, const MCExpr *Subsection) override;
void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
/// Emit an instruction to a special fragment, because this instruction
/// can change its size during relaxation.

56
llvm/include/llvm/MC/MCStreamer.h
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@ -233,8 +233,8 @@ class MCStreamer {
protected:
MCStreamer(MCContext &Ctx);
virtual void EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame);
virtual void EmitCFIEndProcImpl(MCDwarfFrameInfo &CurFrame);
virtual void emitCFIStartProcImpl(MCDwarfFrameInfo &Frame);
virtual void emitCFIEndProcImpl(MCDwarfFrameInfo &CurFrame);
WinEH::FrameInfo *getCurrentWinFrameInfo() {
return CurrentWinFrameInfo;
@ -279,7 +279,7 @@ public:
/// When emitting an object file, create and emit a real label. When emitting
/// textual assembly, this should do nothing to avoid polluting our output.
virtual MCSymbol *EmitCFILabel();
virtual MCSymbol *emitCFILabel();
/// Retreive the current frame info if one is available and it is not yet
/// closed. Otherwise, issue an error and return null.
@ -847,7 +847,7 @@ public:
Optional<StringRef> Source,
unsigned CUID = 0);
virtual void EmitCFIBKeyFrame();
virtual void emitCFIBKeyFrame();
/// This implements the DWARF2 '.loc fileno lineno ...' assembler
/// directive.
@ -937,29 +937,29 @@ public:
const MCSymbol *Lo);
virtual MCSymbol *getDwarfLineTableSymbol(unsigned CUID);
virtual void EmitCFISections(bool EH, bool Debug);
void EmitCFIStartProc(bool IsSimple, SMLoc Loc = SMLoc());
void EmitCFIEndProc();
virtual void EmitCFIDefCfa(int64_t Register, int64_t Offset);
virtual void EmitCFIDefCfaOffset(int64_t Offset);
virtual void EmitCFIDefCfaRegister(int64_t Register);
virtual void EmitCFIOffset(int64_t Register, int64_t Offset);
virtual void EmitCFIPersonality(const MCSymbol *Sym, unsigned Encoding);
virtual void EmitCFILsda(const MCSymbol *Sym, unsigned Encoding);
virtual void EmitCFIRememberState();
virtual void EmitCFIRestoreState();
virtual void EmitCFISameValue(int64_t Register);
virtual void EmitCFIRestore(int64_t Register);
virtual void EmitCFIRelOffset(int64_t Register, int64_t Offset);
virtual void EmitCFIAdjustCfaOffset(int64_t Adjustment);
virtual void EmitCFIEscape(StringRef Values);
virtual void EmitCFIReturnColumn(int64_t Register);
virtual void EmitCFIGnuArgsSize(int64_t Size);
virtual void EmitCFISignalFrame();
virtual void EmitCFIUndefined(int64_t Register);
virtual void EmitCFIRegister(int64_t Register1, int64_t Register2);
virtual void EmitCFIWindowSave();
virtual void EmitCFINegateRAState();
virtual void emitCFISections(bool EH, bool Debug);
void emitCFIStartProc(bool IsSimple, SMLoc Loc = SMLoc());
void emitCFIEndProc();
virtual void emitCFIDefCfa(int64_t Register, int64_t Offset);
virtual void emitCFIDefCfaOffset(int64_t Offset);
virtual void emitCFIDefCfaRegister(int64_t Register);
virtual void emitCFIOffset(int64_t Register, int64_t Offset);
virtual void emitCFIPersonality(const MCSymbol *Sym, unsigned Encoding);
virtual void emitCFILsda(const MCSymbol *Sym, unsigned Encoding);
virtual void emitCFIRememberState();
virtual void emitCFIRestoreState();
virtual void emitCFISameValue(int64_t Register);
virtual void emitCFIRestore(int64_t Register);
virtual void emitCFIRelOffset(int64_t Register, int64_t Offset);
virtual void emitCFIAdjustCfaOffset(int64_t Adjustment);
virtual void emitCFIEscape(StringRef Values);
virtual void emitCFIReturnColumn(int64_t Register);
virtual void emitCFIGnuArgsSize(int64_t Size);
virtual void emitCFISignalFrame();
virtual void emitCFIUndefined(int64_t Register);
virtual void emitCFIRegister(int64_t Register1, int64_t Register2);
virtual void emitCFIWindowSave();
virtual void emitCFINegateRAState();
virtual void EmitWinCFIStartProc(const MCSymbol *Symbol, SMLoc Loc = SMLoc());
virtual void EmitWinCFIEndProc(SMLoc Loc = SMLoc());
@ -1010,7 +1010,7 @@ public:
virtual void EmitAddrsigSym(const MCSymbol *Sym) {}
/// Emit the given \p Instruction into the current section.
virtual void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI);
virtual void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI);
/// Set the bundle alignment mode from now on in the section.
/// The argument is the power of 2 to which the alignment is set. The

4
llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
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@ -46,12 +46,12 @@ void ARMException::beginFunction(const MachineFunction *MF) {
if (MoveType == AsmPrinter::CFI_M_Debug) {
if (!hasEmittedCFISections) {
if (Asm->needsOnlyDebugCFIMoves())
Asm->OutStreamer->EmitCFISections(false, true);
Asm->OutStreamer->emitCFISections(false, true);
hasEmittedCFISections = true;
}
shouldEmitCFI = true;
Asm->OutStreamer->EmitCFIStartProc(false);
Asm->OutStreamer->emitCFIStartProc(false);
}
}

8
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
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@ -231,7 +231,7 @@ const MCSubtargetInfo &AsmPrinter::getSubtargetInfo() const {
}
void AsmPrinter::EmitToStreamer(MCStreamer &S, const MCInst &Inst) {
S.EmitInstruction(Inst, getSubtargetInfo());
S.emitInstruction(Inst, getSubtargetInfo());
}
void AsmPrinter::emitInitialRawDwarfLocDirective(const MachineFunction &MF) {
@ -1141,13 +1141,13 @@ void AsmPrinter::emitFunctionBody() {
case TargetOpcode::DBG_VALUE:
if (isVerbose()) {
if (!emitDebugValueComment(&MI, *this))
EmitInstruction(&MI);
emitInstruction(&MI);
}
break;
case TargetOpcode::DBG_LABEL:
if (isVerbose()) {
if (!emitDebugLabelComment(&MI, *this))
EmitInstruction(&MI);
emitInstruction(&MI);
}
break;
case TargetOpcode::IMPLICIT_DEF:
@ -1157,7 +1157,7 @@ void AsmPrinter::emitFunctionBody() {
if (isVerbose()) emitKill(&MI, *this);
break;
default:
EmitInstruction(&MI);
emitInstruction(&MI);
break;
}

24
llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
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@ -210,40 +210,40 @@ void AsmPrinter::emitCFIInstruction(const MCCFIInstruction &Inst) const {
default:
llvm_unreachable("Unexpected instruction");
case MCCFIInstruction::OpDefCfaOffset:
OutStreamer->EmitCFIDefCfaOffset(Inst.getOffset());
OutStreamer->emitCFIDefCfaOffset(Inst.getOffset());
break;
case MCCFIInstruction::OpAdjustCfaOffset:
OutStreamer->EmitCFIAdjustCfaOffset(Inst.getOffset());
OutStreamer->emitCFIAdjustCfaOffset(Inst.getOffset());
break;
case MCCFIInstruction::OpDefCfa:
OutStreamer->EmitCFIDefCfa(Inst.getRegister(), Inst.getOffset());
OutStreamer->emitCFIDefCfa(Inst.getRegister(), Inst.getOffset());
break;
case MCCFIInstruction::OpDefCfaRegister:
OutStreamer->EmitCFIDefCfaRegister(Inst.getRegister());
OutStreamer->emitCFIDefCfaRegister(Inst.getRegister());
break;
case MCCFIInstruction::OpOffset:
OutStreamer->EmitCFIOffset(Inst.getRegister(), Inst.getOffset());
OutStreamer->emitCFIOffset(Inst.getRegister(), Inst.getOffset());
break;
case MCCFIInstruction::OpRegister:
OutStreamer->EmitCFIRegister(Inst.getRegister(), Inst.getRegister2());
OutStreamer->emitCFIRegister(Inst.getRegister(), Inst.getRegister2());
break;
case MCCFIInstruction::OpWindowSave:
OutStreamer->EmitCFIWindowSave();
OutStreamer->emitCFIWindowSave();
break;
case MCCFIInstruction::OpNegateRAState:
OutStreamer->EmitCFINegateRAState();
OutStreamer->emitCFINegateRAState();
break;
case MCCFIInstruction::OpSameValue:
OutStreamer->EmitCFISameValue(Inst.getRegister());
OutStreamer->emitCFISameValue(Inst.getRegister());
break;
case MCCFIInstruction::OpGnuArgsSize:
OutStreamer->EmitCFIGnuArgsSize(Inst.getOffset());
OutStreamer->emitCFIGnuArgsSize(Inst.getOffset());
break;
case MCCFIInstruction::OpEscape:
OutStreamer->EmitCFIEscape(Inst.getValues());
OutStreamer->emitCFIEscape(Inst.getValues());
break;
case MCCFIInstruction::OpRestore:
OutStreamer->EmitCFIRestore(Inst.getRegister());
OutStreamer->emitCFIRestore(Inst.getRegister());
break;
}
}

12
llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp
View File

@ -48,7 +48,7 @@ void DwarfCFIExceptionBase::markFunctionEnd() {
void DwarfCFIExceptionBase::endFragment() {
if (shouldEmitCFI)
Asm->OutStreamer->EmitCFIEndProc();
Asm->OutStreamer->emitCFIEndProc();
}
DwarfCFIException::DwarfCFIException(AsmPrinter *A)
@ -133,13 +133,13 @@ void DwarfCFIException::beginFragment(const MachineBasicBlock *MBB,
if (!hasEmittedCFISections) {
if (Asm->needsOnlyDebugCFIMoves())
Asm->OutStreamer->EmitCFISections(false, true);
Asm->OutStreamer->emitCFISections(false, true);
else if (Asm->TM.Options.ForceDwarfFrameSection)
Asm->OutStreamer->EmitCFISections(true, true);
Asm->OutStreamer->emitCFISections(true, true);
hasEmittedCFISections = true;
}
Asm->OutStreamer->EmitCFIStartProc(/*IsSimple=*/false);
Asm->OutStreamer->emitCFIStartProc(/*IsSimple=*/false);
// Indicate personality routine, if any.
if (!shouldEmitPersonality)
@ -157,11 +157,11 @@ void DwarfCFIException::beginFragment(const MachineBasicBlock *MBB,
const TargetLoweringObjectFile &TLOF = Asm->getObjFileLowering();
unsigned PerEncoding = TLOF.getPersonalityEncoding();
const MCSymbol *Sym = TLOF.getCFIPersonalitySymbol(P, Asm->TM, MMI);
Asm->OutStreamer->EmitCFIPersonality(Sym, PerEncoding);
Asm->OutStreamer->emitCFIPersonality(Sym, PerEncoding);
// Provide LSDA information.
if (shouldEmitLSDA)
Asm->OutStreamer->EmitCFILsda(ESP(Asm), TLOF.getLSDAEncoding());
Asm->OutStreamer->emitCFILsda(ESP(Asm), TLOF.getLSDAEncoding());
}
/// endFunction - Gather and emit post-function exception information.

146
llvm/lib/MC/MCAsmStreamer.cpp
View File

@ -58,8 +58,8 @@ class MCAsmStreamer final : public MCStreamer {
unsigned UseDwarfDirectory : 1;
void EmitRegisterName(int64_t Register);
void EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) override;
void EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) override;
void emitCFIStartProcImpl(MCDwarfFrameInfo &Frame) override;
void emitCFIEndProcImpl(MCDwarfFrameInfo &Frame) override;
public:
MCAsmStreamer(MCContext &Context, std::unique_ptr<formatted_raw_ostream> os,
@ -288,28 +288,28 @@ public:
void EmitCVFPOData(const MCSymbol *ProcSym, SMLoc L) override;
void EmitIdent(StringRef IdentString) override;
void EmitCFIBKeyFrame() override;
void EmitCFISections(bool EH, bool Debug) override;
void EmitCFIDefCfa(int64_t Register, int64_t Offset) override;
void EmitCFIDefCfaOffset(int64_t Offset) override;
void EmitCFIDefCfaRegister(int64_t Register) override;
void EmitCFIOffset(int64_t Register, int64_t Offset) override;
void EmitCFIPersonality(const MCSymbol *Sym, unsigned Encoding) override;
void EmitCFILsda(const MCSymbol *Sym, unsigned Encoding) override;
void EmitCFIRememberState() override;
void EmitCFIRestoreState() override;
void EmitCFIRestore(int64_t Register) override;
void EmitCFISameValue(int64_t Register) override;
void EmitCFIRelOffset(int64_t Register, int64_t Offset) override;
void EmitCFIAdjustCfaOffset(int64_t Adjustment) override;
void EmitCFIEscape(StringRef Values) override;
void EmitCFIGnuArgsSize(int64_t Size) override;
void EmitCFISignalFrame() override;
void EmitCFIUndefined(int64_t Register) override;
void EmitCFIRegister(int64_t Register1, int64_t Register2) override;
void EmitCFIWindowSave() override;
void EmitCFINegateRAState() override;
void EmitCFIReturnColumn(int64_t Register) override;
void emitCFIBKeyFrame() override;
void emitCFISections(bool EH, bool Debug) override;
void emitCFIDefCfa(int64_t Register, int64_t Offset) override;
void emitCFIDefCfaOffset(int64_t Offset) override;
void emitCFIDefCfaRegister(int64_t Register) override;
void emitCFIOffset(int64_t Register, int64_t Offset) override;
void emitCFIPersonality(const MCSymbol *Sym, unsigned Encoding) override;
void emitCFILsda(const MCSymbol *Sym, unsigned Encoding) override;
void emitCFIRememberState() override;
void emitCFIRestoreState() override;
void emitCFIRestore(int64_t Register) override;
void emitCFISameValue(int64_t Register) override;
void emitCFIRelOffset(int64_t Register, int64_t Offset) override;
void emitCFIAdjustCfaOffset(int64_t Adjustment) override;
void emitCFIEscape(StringRef Values) override;
void emitCFIGnuArgsSize(int64_t Size) override;
void emitCFISignalFrame() override;
void emitCFIUndefined(int64_t Register) override;
void emitCFIRegister(int64_t Register1, int64_t Register2) override;
void emitCFIWindowSave() override;
void emitCFINegateRAState() override;
void emitCFIReturnColumn(int64_t Register) override;
void EmitWinCFIStartProc(const MCSymbol *Symbol, SMLoc Loc) override;
void EmitWinCFIEndProc(SMLoc Loc) override;
@ -334,7 +334,7 @@ public:
void emitCGProfileEntry(const MCSymbolRefExpr *From,
const MCSymbolRefExpr *To, uint64_t Count) override;
void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
void EmitBundleAlignMode(unsigned AlignPow2) override;
void EmitBundleLock(bool AlignToEnd) override;
@ -1523,8 +1523,8 @@ void MCAsmStreamer::EmitIdent(StringRef IdentString) {
EmitEOL();
}
void MCAsmStreamer::EmitCFISections(bool EH, bool Debug) {
MCStreamer::EmitCFISections(EH, Debug);
void MCAsmStreamer::emitCFISections(bool EH, bool Debug) {
MCStreamer::emitCFISections(EH, Debug);
OS << "\t.cfi_sections ";
if (EH) {
OS << ".eh_frame";
@ -1537,15 +1537,15 @@ void MCAsmStreamer::EmitCFISections(bool EH, bool Debug) {
EmitEOL();
}
void MCAsmStreamer::EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) {
void MCAsmStreamer::emitCFIStartProcImpl(MCDwarfFrameInfo &Frame) {
OS << "\t.cfi_startproc";
if (Frame.IsSimple)
OS << " simple";
EmitEOL();
}
void MCAsmStreamer::EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) {
MCStreamer::EmitCFIEndProcImpl(Frame);
void MCAsmStreamer::emitCFIEndProcImpl(MCDwarfFrameInfo &Frame) {
MCStreamer::emitCFIEndProcImpl(Frame);
OS << "\t.cfi_endproc";
EmitEOL();
}
@ -1564,16 +1564,16 @@ void MCAsmStreamer::EmitRegisterName(int64_t Register) {
OS << Register;
}
void MCAsmStreamer::EmitCFIDefCfa(int64_t Register, int64_t Offset) {
MCStreamer::EmitCFIDefCfa(Register, Offset);
void MCAsmStreamer::emitCFIDefCfa(int64_t Register, int64_t Offset) {
MCStreamer::emitCFIDefCfa(Register, Offset);
OS << "\t.cfi_def_cfa ";
EmitRegisterName(Register);
OS << ", " << Offset;
EmitEOL();
}
void MCAsmStreamer::EmitCFIDefCfaOffset(int64_t Offset) {
MCStreamer::EmitCFIDefCfaOffset(Offset);
void MCAsmStreamer::emitCFIDefCfaOffset(int64_t Offset) {
MCStreamer::emitCFIDefCfaOffset(Offset);
OS << "\t.cfi_def_cfa_offset " << Offset;
EmitEOL();
}
@ -1588,14 +1588,14 @@ static void PrintCFIEscape(llvm::formatted_raw_ostream &OS, StringRef Values) {
}
}
void MCAsmStreamer::EmitCFIEscape(StringRef Values) {
MCStreamer::EmitCFIEscape(Values);
void MCAsmStreamer::emitCFIEscape(StringRef Values) {
MCStreamer::emitCFIEscape(Values);
PrintCFIEscape(OS, Values);
EmitEOL();
}
void MCAsmStreamer::EmitCFIGnuArgsSize(int64_t Size) {
MCStreamer::EmitCFIGnuArgsSize(Size);
void MCAsmStreamer::emitCFIGnuArgsSize(int64_t Size) {
MCStreamer::emitCFIGnuArgsSize(Size);
uint8_t Buffer[16] = { dwarf::DW_CFA_GNU_args_size };
unsigned Len = encodeULEB128(Size, Buffer + 1) + 1;
@ -1604,114 +1604,114 @@ void MCAsmStreamer::EmitCFIGnuArgsSize(int64_t Size) {
EmitEOL();
}
void MCAsmStreamer::EmitCFIDefCfaRegister(int64_t Register) {
MCStreamer::EmitCFIDefCfaRegister(Register);
void MCAsmStreamer::emitCFIDefCfaRegister(int64_t Register) {
MCStreamer::emitCFIDefCfaRegister(Register);
OS << "\t.cfi_def_cfa_register ";
EmitRegisterName(Register);
EmitEOL();
}
void MCAsmStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) {
this->MCStreamer::EmitCFIOffset(Register, Offset);
void MCAsmStreamer::emitCFIOffset(int64_t Register, int64_t Offset) {
this->MCStreamer::emitCFIOffset(Register, Offset);
OS << "\t.cfi_offset ";
EmitRegisterName(Register);
OS << ", " << Offset;
EmitEOL();
}
void MCAsmStreamer::EmitCFIPersonality(const MCSymbol *Sym,
void MCAsmStreamer::emitCFIPersonality(const MCSymbol *Sym,
unsigned Encoding) {
MCStreamer::EmitCFIPersonality(Sym, Encoding);
MCStreamer::emitCFIPersonality(Sym, Encoding);
OS << "\t.cfi_personality " << Encoding << ", ";
Sym->print(OS, MAI);
EmitEOL();
}
void MCAsmStreamer::EmitCFILsda(const MCSymbol *Sym, unsigned Encoding) {
MCStreamer::EmitCFILsda(Sym, Encoding);
void MCAsmStreamer::emitCFILsda(const MCSymbol *Sym, unsigned Encoding) {
MCStreamer::emitCFILsda(Sym, Encoding);
OS << "\t.cfi_lsda " << Encoding << ", ";
Sym->print(OS, MAI);
EmitEOL();
}
void MCAsmStreamer::EmitCFIRememberState() {
MCStreamer::EmitCFIRememberState();
void MCAsmStreamer::emitCFIRememberState() {
MCStreamer::emitCFIRememberState();
OS << "\t.cfi_remember_state";
EmitEOL();
}
void MCAsmStreamer::EmitCFIRestoreState() {
MCStreamer::EmitCFIRestoreState();
void MCAsmStreamer::emitCFIRestoreState() {
MCStreamer::emitCFIRestoreState();
OS << "\t.cfi_restore_state";
EmitEOL();
}
void MCAsmStreamer::EmitCFIRestore(int64_t Register) {
MCStreamer::EmitCFIRestore(Register);
void MCAsmStreamer::emitCFIRestore(int64_t Register) {
MCStreamer::emitCFIRestore(Register);
OS << "\t.cfi_restore ";
EmitRegisterName(Register);
EmitEOL();
}
void MCAsmStreamer::EmitCFISameValue(int64_t Register) {
MCStreamer::EmitCFISameValue(Register);
void MCAsmStreamer::emitCFISameValue(int64_t Register) {
MCStreamer::emitCFISameValue(Register);
OS << "\t.cfi_same_value ";
EmitRegisterName(Register);
EmitEOL();
}
void MCAsmStreamer::EmitCFIRelOffset(int64_t Register, int64_t Offset) {
MCStreamer::EmitCFIRelOffset(Register, Offset);
void MCAsmStreamer::emitCFIRelOffset(int64_t Register, int64_t Offset) {
MCStreamer::emitCFIRelOffset(Register, Offset);
OS << "\t.cfi_rel_offset ";
EmitRegisterName(Register);
OS << ", " << Offset;
EmitEOL();
}
void MCAsmStreamer::EmitCFIAdjustCfaOffset(int64_t Adjustment) {
MCStreamer::EmitCFIAdjustCfaOffset(Adjustment);
void MCAsmStreamer::emitCFIAdjustCfaOffset(int64_t Adjustment) {
MCStreamer::emitCFIAdjustCfaOffset(Adjustment);
OS << "\t.cfi_adjust_cfa_offset " << Adjustment;
EmitEOL();
}
void MCAsmStreamer::EmitCFISignalFrame() {
MCStreamer::EmitCFISignalFrame();
void MCAsmStreamer::emitCFISignalFrame() {
MCStreamer::emitCFISignalFrame();
OS << "\t.cfi_signal_frame";
EmitEOL();
}
void MCAsmStreamer::EmitCFIUndefined(int64_t Register) {
MCStreamer::EmitCFIUndefined(Register);
void MCAsmStreamer::emitCFIUndefined(int64_t Register) {
MCStreamer::emitCFIUndefined(Register);
OS << "\t.cfi_undefined " << Register;
EmitEOL();
}
void MCAsmStreamer::EmitCFIRegister(int64_t Register1, int64_t Register2) {
MCStreamer::EmitCFIRegister(Register1, Register2);
void MCAsmStreamer::emitCFIRegister(int64_t Register1, int64_t Register2) {
MCStreamer::emitCFIRegister(Register1, Register2);
OS << "\t.cfi_register " << Register1 << ", " << Register2;
EmitEOL();
}
void MCAsmStreamer::EmitCFIWindowSave() {
MCStreamer::EmitCFIWindowSave();
void MCAsmStreamer::emitCFIWindowSave() {
MCStreamer::emitCFIWindowSave();
OS << "\t.cfi_window_save";
EmitEOL();
}
void MCAsmStreamer::EmitCFINegateRAState() {
MCStreamer::EmitCFINegateRAState();
void MCAsmStreamer::emitCFINegateRAState() {
MCStreamer::emitCFINegateRAState();
OS << "\t.cfi_negate_ra_state";
EmitEOL();
}
void MCAsmStreamer::EmitCFIReturnColumn(int64_t Register) {
MCStreamer::EmitCFIReturnColumn(Register);
void MCAsmStreamer::emitCFIReturnColumn(int64_t Register) {
MCStreamer::emitCFIReturnColumn(Register);
OS << "\t.cfi_return_column " << Register;
EmitEOL();
}
void MCAsmStreamer::EmitCFIBKeyFrame() {
MCStreamer::EmitCFIBKeyFrame();
void MCAsmStreamer::emitCFIBKeyFrame() {
MCStreamer::emitCFIBKeyFrame();
OS << "\t.cfi_b_key_frame";
EmitEOL();
}
@ -1947,7 +1947,7 @@ void MCAsmStreamer::AddEncodingComment(const MCInst &Inst,
}
}
void MCAsmStreamer::EmitInstruction(const MCInst &Inst,
void MCAsmStreamer::emitInstruction(const MCInst &Inst,
const MCSubtargetInfo &STI) {
assert(getCurrentSectionOnly() &&
"Cannot emit contents before setting section!");

14
llvm/lib/MC/MCDwarf.cpp
View File

@ -1315,9 +1315,9 @@ public:
const MCSymbol &EmitCIE(const MCDwarfFrameInfo &F);
void EmitFDE(const MCSymbol &cieStart, const MCDwarfFrameInfo &frame,
bool LastInSection, const MCSymbol &SectionStart);
void EmitCFIInstructions(ArrayRef<MCCFIInstruction> Instrs,
void emitCFIInstructions(ArrayRef<MCCFIInstruction> Instrs,
MCSymbol *BaseLabel);
void EmitCFIInstruction(const MCCFIInstruction &Instr);
void emitCFIInstruction(const MCCFIInstruction &Instr);
};
} // end anonymous namespace
@ -1326,7 +1326,7 @@ static void emitEncodingByte(MCObjectStreamer &Streamer, unsigned Encoding) {
Streamer.EmitIntValue(Encoding, 1);
}
void FrameEmitterImpl::EmitCFIInstruction(const MCCFIInstruction &Instr) {
void FrameEmitterImpl::emitCFIInstruction(const MCCFIInstruction &Instr) {
int dataAlignmentFactor = getDataAlignmentFactor(Streamer);
auto *MRI = Streamer.getContext().getRegisterInfo();
@ -1458,7 +1458,7 @@ void FrameEmitterImpl::EmitCFIInstruction(const MCCFIInstruction &Instr) {
}
/// Emit frame instructions to describe the layout of the frame.
void FrameEmitterImpl::EmitCFIInstructions(ArrayRef<MCCFIInstruction> Instrs,
void FrameEmitterImpl::emitCFIInstructions(ArrayRef<MCCFIInstruction> Instrs,
MCSymbol *BaseLabel) {
for (const MCCFIInstruction &Instr : Instrs) {
MCSymbol *Label = Instr.getLabel();
@ -1474,7 +1474,7 @@ void FrameEmitterImpl::EmitCFIInstructions(ArrayRef<MCCFIInstruction> Instrs,
}
}
EmitCFIInstruction(Instr);
emitCFIInstruction(Instr);
}
}
@ -1661,7 +1661,7 @@ const MCSymbol &FrameEmitterImpl::EmitCIE(const MCDwarfFrameInfo &Frame) {
if (!Frame.IsSimple) {
const std::vector<MCCFIInstruction> &Instructions =
MAI->getInitialFrameState();
EmitCFIInstructions(Instructions, nullptr);
emitCFIInstructions(Instructions, nullptr);
}
InitialCFAOffset = CFAOffset;
@ -1731,7 +1731,7 @@ void FrameEmitterImpl::EmitFDE(const MCSymbol &cieStart,
}
// Call Frame Instructions
EmitCFIInstructions(frame.Instructions, frame.Begin);
emitCFIInstructions(frame.Instructions, frame.Begin);
// Padding
// The size of a .eh_frame section has to be a multiple of the alignment

18
llvm/lib/MC/MCObjectStreamer.cpp
View File

@ -219,8 +219,8 @@ void MCObjectStreamer::visitUsedSymbol(const MCSymbol &Sym) {
Assembler->registerSymbol(Sym);
}
void MCObjectStreamer::EmitCFISections(bool EH, bool Debug) {
MCStreamer::EmitCFISections(EH, Debug);
void MCObjectStreamer::emitCFISections(bool EH, bool Debug) {
MCStreamer::emitCFISections(EH, Debug);
EmitEHFrame = EH;
EmitDebugFrame = Debug;
}
@ -250,19 +250,19 @@ void MCObjectStreamer::EmitValueImpl(const MCExpr *Value, unsigned Size,
DF->getContents().resize(DF->getContents().size() + Size, 0);
}
MCSymbol *MCObjectStreamer::EmitCFILabel() {
MCSymbol *MCObjectStreamer::emitCFILabel() {
MCSymbol *Label = getContext().createTempSymbol("cfi", true);
EmitLabel(Label);
return Label;
}
void MCObjectStreamer::EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) {
void MCObjectStreamer::emitCFIStartProcImpl(MCDwarfFrameInfo &Frame) {
// We need to create a local symbol to avoid relocations.
Frame.Begin = getContext().createTempSymbol();
EmitLabel(Frame.Begin);
}
void MCObjectStreamer::EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) {
void MCObjectStreamer::emitCFIEndProcImpl(MCDwarfFrameInfo &Frame) {
Frame.End = getContext().createTempSymbol();
EmitLabel(Frame.End);
}
@ -365,16 +365,16 @@ bool MCObjectStreamer::mayHaveInstructions(MCSection &Sec) const {
return Sec.hasInstructions();
}
void MCObjectStreamer::EmitInstruction(const MCInst &Inst,
void MCObjectStreamer::emitInstruction(const MCInst &Inst,
const MCSubtargetInfo &STI) {
getAssembler().getBackend().alignBranchesBegin(*this, Inst);
EmitInstructionImpl(Inst, STI);
emitInstructionImpl(Inst, STI);
getAssembler().getBackend().alignBranchesEnd(*this, Inst);
}
void MCObjectStreamer::EmitInstructionImpl(const MCInst &Inst,
void MCObjectStreamer::emitInstructionImpl(const MCInst &Inst,
const MCSubtargetInfo &STI) {
MCStreamer::EmitInstruction(Inst, STI);
MCStreamer::emitInstruction(Inst, STI);
MCSection *Sec = getCurrentSectionOnly();
Sec->setHasInstructions(true);

42
llvm/lib/MC/MCParser/AsmParser.cpp
View File

@ -4050,7 +4050,7 @@ bool AsmParser::parseDirectiveCFISections() {
Debug = true;
}
getStreamer().EmitCFISections(EH, Debug);
getStreamer().emitCFISections(EH, Debug);
return false;
}
@ -4070,14 +4070,14 @@ bool AsmParser::parseDirectiveCFIStartProc() {
// expansion which can *ONLY* happen if Clang's cc1as is the API consumer.
// Tools like llvm-mc on the other hand are not affected by it, and report
// correct context information.
getStreamer().EmitCFIStartProc(!Simple.empty(), Lexer.getLoc());
getStreamer().emitCFIStartProc(!Simple.empty(), Lexer.getLoc());
return false;
}
/// parseDirectiveCFIEndProc
/// ::= .cfi_endproc
bool AsmParser::parseDirectiveCFIEndProc() {
getStreamer().EmitCFIEndProc();
getStreamer().emitCFIEndProc();
return false;
}
@ -4105,7 +4105,7 @@ bool AsmParser::parseDirectiveCFIDefCfa(SMLoc DirectiveLoc) {
parseAbsoluteExpression(Offset))
return true;
getStreamer().EmitCFIDefCfa(Register, Offset);
getStreamer().emitCFIDefCfa(Register, Offset);
return false;
}
@ -4116,7 +4116,7 @@ bool AsmParser::parseDirectiveCFIDefCfaOffset() {
if (parseAbsoluteExpression(Offset))
return true;
getStreamer().EmitCFIDefCfaOffset(Offset);
getStreamer().emitCFIDefCfaOffset(Offset);
return false;
}
@ -4129,14 +4129,14 @@ bool AsmParser::parseDirectiveCFIRegister(SMLoc DirectiveLoc) {
parseRegisterOrRegisterNumber(Register2, DirectiveLoc))
return true;
getStreamer().EmitCFIRegister(Register1, Register2);
getStreamer().emitCFIRegister(Register1, Register2);
return false;
}
/// parseDirectiveCFIWindowSave
/// ::= .cfi_window_save
bool AsmParser::parseDirectiveCFIWindowSave() {
getStreamer().EmitCFIWindowSave();
getStreamer().emitCFIWindowSave();
return false;
}
@ -4147,7 +4147,7 @@ bool AsmParser::parseDirectiveCFIAdjustCfaOffset() {
if (parseAbsoluteExpression(Adjustment))
return true;
getStreamer().EmitCFIAdjustCfaOffset(Adjustment);
getStreamer().emitCFIAdjustCfaOffset(Adjustment);
return false;
}
@ -4158,7 +4158,7 @@ bool AsmParser::parseDirectiveCFIDefCfaRegister(SMLoc DirectiveLoc) {
if (parseRegisterOrRegisterNumber(Register, DirectiveLoc))
return true;
getStreamer().EmitCFIDefCfaRegister(Register);
getStreamer().emitCFIDefCfaRegister(Register);
return false;
}
@ -4173,7 +4173,7 @@ bool AsmParser::parseDirectiveCFIOffset(SMLoc DirectiveLoc) {
parseAbsoluteExpression(Offset))
return true;
getStreamer().EmitCFIOffset(Register, Offset);
getStreamer().emitCFIOffset(Register, Offset);
return false;
}
@ -4187,7 +4187,7 @@ bool AsmParser::parseDirectiveCFIRelOffset(SMLoc DirectiveLoc) {
parseAbsoluteExpression(Offset))
return true;
getStreamer().EmitCFIRelOffset(Register, Offset);
getStreamer().emitCFIRelOffset(Register, Offset);
return false;
}
@ -4233,23 +4233,23 @@ bool AsmParser::parseDirectiveCFIPersonalityOrLsda(bool IsPersonality) {
MCSymbol *Sym = getContext().getOrCreateSymbol(Name);
if (IsPersonality)
getStreamer().EmitCFIPersonality(Sym, Encoding);
getStreamer().emitCFIPersonality(Sym, Encoding);
else
getStreamer().EmitCFILsda(Sym, Encoding);
getStreamer().emitCFILsda(Sym, Encoding);
return false;
}
/// parseDirectiveCFIRememberState
/// ::= .cfi_remember_state
bool AsmParser::parseDirectiveCFIRememberState() {
getStreamer().EmitCFIRememberState();
getStreamer().emitCFIRememberState();
return false;
}
/// parseDirectiveCFIRestoreState
/// ::= .cfi_remember_state
bool AsmParser::parseDirectiveCFIRestoreState() {
getStreamer().EmitCFIRestoreState();
getStreamer().emitCFIRestoreState();
return false;
}
@ -4261,7 +4261,7 @@ bool AsmParser::parseDirectiveCFISameValue(SMLoc DirectiveLoc) {
if (parseRegisterOrRegisterNumber(Register, DirectiveLoc))
return true;
getStreamer().EmitCFISameValue(Register);
getStreamer().emitCFISameValue(Register);
return false;
}
@ -4272,7 +4272,7 @@ bool AsmParser::parseDirectiveCFIRestore(SMLoc DirectiveLoc) {
if (parseRegisterOrRegisterNumber(Register, DirectiveLoc))
return true;
getStreamer().EmitCFIRestore(Register);
getStreamer().emitCFIRestore(Register);
return false;
}
@ -4295,7 +4295,7 @@ bool AsmParser::parseDirectiveCFIEscape() {
Values.push_back((uint8_t)CurrValue);
}
getStreamer().EmitCFIEscape(Values);
getStreamer().emitCFIEscape(Values);
return false;
}
@ -4305,7 +4305,7 @@ bool AsmParser::parseDirectiveCFIReturnColumn(SMLoc DirectiveLoc) {
int64_t Register = 0;
if (parseRegisterOrRegisterNumber(Register, DirectiveLoc))
return true;
getStreamer().EmitCFIReturnColumn(Register);
getStreamer().emitCFIReturnColumn(Register);
return false;
}
@ -4316,7 +4316,7 @@ bool AsmParser::parseDirectiveCFISignalFrame() {
"unexpected token in '.cfi_signal_frame'"))
return true;
getStreamer().EmitCFISignalFrame();
getStreamer().emitCFISignalFrame();
return false;
}
@ -4328,7 +4328,7 @@ bool AsmParser::parseDirectiveCFIUndefined(SMLoc DirectiveLoc) {
if (parseRegisterOrRegisterNumber(Register, DirectiveLoc))
return true;
getStreamer().EmitCFIUndefined(Register);
getStreamer().emitCFIUndefined(Register);
return false;
}

116
llvm/lib/MC/MCStreamer.cpp
View File

@ -228,7 +228,7 @@ void MCStreamer::emitDwarfFile0Directive(StringRef Directory,
Source);
}
void MCStreamer::EmitCFIBKeyFrame() {
void MCStreamer::emitCFIBKeyFrame() {
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
if (!CurFrame)
return;
@ -414,18 +414,18 @@ void MCStreamer::EmitLabel(MCSymbol *Symbol, SMLoc Loc) {
TS->emitLabel(Symbol);
}
void MCStreamer::EmitCFISections(bool EH, bool Debug) {
void MCStreamer::emitCFISections(bool EH, bool Debug) {
assert(EH || Debug);
}
void MCStreamer::EmitCFIStartProc(bool IsSimple, SMLoc Loc) {
void MCStreamer::emitCFIStartProc(bool IsSimple, SMLoc Loc) {
if (hasUnfinishedDwarfFrameInfo())
return getContext().reportError(
Loc, "starting new .cfi frame before finishing the previous one");
MCDwarfFrameInfo Frame;
Frame.IsSimple = IsSimple;
EmitCFIStartProcImpl(Frame);
emitCFIStartProcImpl(Frame);
const MCAsmInfo* MAI = Context.getAsmInfo();
if (MAI) {
@ -440,30 +440,30 @@ void MCStreamer::EmitCFIStartProc(bool IsSimple, SMLoc Loc) {
DwarfFrameInfos.push_back(Frame);
}
void MCStreamer::EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) {
void MCStreamer::emitCFIStartProcImpl(MCDwarfFrameInfo &Frame) {
}
void MCStreamer::EmitCFIEndProc() {
void MCStreamer::emitCFIEndProc() {
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
if (!CurFrame)
return;
EmitCFIEndProcImpl(*CurFrame);
emitCFIEndProcImpl(*CurFrame);
}
void MCStreamer::EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) {
void MCStreamer::emitCFIEndProcImpl(MCDwarfFrameInfo &Frame) {
// Put a dummy non-null value in Frame.End to mark that this frame has been
// closed.
Frame.End = (MCSymbol *)1;
}
MCSymbol *MCStreamer::EmitCFILabel() {
MCSymbol *MCStreamer::emitCFILabel() {
// Return a dummy non-null value so that label fields appear filled in when
// generating textual assembly.
return (MCSymbol *)1;
}
void MCStreamer::EmitCFIDefCfa(int64_t Register, int64_t Offset) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIDefCfa(int64_t Register, int64_t Offset) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createDefCfa(Label, Register, Offset);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -473,8 +473,8 @@ void MCStreamer::EmitCFIDefCfa(int64_t Register, int64_t Offset) {
CurFrame->CurrentCfaRegister = static_cast<unsigned>(Register);
}
void MCStreamer::EmitCFIDefCfaOffset(int64_t Offset) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIDefCfaOffset(int64_t Offset) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createDefCfaOffset(Label, Offset);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -483,8 +483,8 @@ void MCStreamer::EmitCFIDefCfaOffset(int64_t Offset) {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIAdjustCfaOffset(int64_t Adjustment) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIAdjustCfaOffset(int64_t Adjustment) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createAdjustCfaOffset(Label, Adjustment);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -493,8 +493,8 @@ void MCStreamer::EmitCFIAdjustCfaOffset(int64_t Adjustment) {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIDefCfaRegister(int64_t Register) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIDefCfaRegister(int64_t Register) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createDefCfaRegister(Label, Register);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -504,8 +504,8 @@ void MCStreamer::EmitCFIDefCfaRegister(int64_t Register) {
CurFrame->CurrentCfaRegister = static_cast<unsigned>(Register);
}
void MCStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIOffset(int64_t Register, int64_t Offset) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createOffset(Label, Register, Offset);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -514,8 +514,8 @@ void MCStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIRelOffset(int64_t Register, int64_t Offset) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIRelOffset(int64_t Register, int64_t Offset) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createRelOffset(Label, Register, Offset);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -524,7 +524,7 @@ void MCStreamer::EmitCFIRelOffset(int64_t Register, int64_t Offset) {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIPersonality(const MCSymbol *Sym,
void MCStreamer::emitCFIPersonality(const MCSymbol *Sym,
unsigned Encoding) {
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
if (!CurFrame)
@ -533,7 +533,7 @@ void MCStreamer::EmitCFIPersonality(const MCSymbol *Sym,
CurFrame->PersonalityEncoding = Encoding;
}
void MCStreamer::EmitCFILsda(const MCSymbol *Sym, unsigned Encoding) {
void MCStreamer::emitCFILsda(const MCSymbol *Sym, unsigned Encoding) {
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
if (!CurFrame)
return;
@ -541,8 +541,8 @@ void MCStreamer::EmitCFILsda(const MCSymbol *Sym, unsigned Encoding) {
CurFrame->LsdaEncoding = Encoding;
}
void MCStreamer::EmitCFIRememberState() {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIRememberState() {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction = MCCFIInstruction::createRememberState(Label);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
if (!CurFrame)
@ -550,9 +550,9 @@ void MCStreamer::EmitCFIRememberState() {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIRestoreState() {
void MCStreamer::emitCFIRestoreState() {
// FIXME: Error if there is no matching cfi_remember_state.
MCSymbol *Label = EmitCFILabel();
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction = MCCFIInstruction::createRestoreState(Label);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
if (!CurFrame)
@ -560,8 +560,8 @@ void MCStreamer::EmitCFIRestoreState() {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFISameValue(int64_t Register) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFISameValue(int64_t Register) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createSameValue(Label, Register);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -570,8 +570,8 @@ void MCStreamer::EmitCFISameValue(int64_t Register) {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIRestore(int64_t Register) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIRestore(int64_t Register) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createRestore(Label, Register);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -580,8 +580,8 @@ void MCStreamer::EmitCFIRestore(int64_t Register) {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIEscape(StringRef Values) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIEscape(StringRef Values) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction = MCCFIInstruction::createEscape(Label, Values);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
if (!CurFrame)
@ -589,8 +589,8 @@ void MCStreamer::EmitCFIEscape(StringRef Values) {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIGnuArgsSize(int64_t Size) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIGnuArgsSize(int64_t Size) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createGnuArgsSize(Label, Size);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -599,15 +599,15 @@ void MCStreamer::EmitCFIGnuArgsSize(int64_t Size) {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFISignalFrame() {
void MCStreamer::emitCFISignalFrame() {
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
if (!CurFrame)
return;
CurFrame->IsSignalFrame = true;
}
void MCStreamer::EmitCFIUndefined(int64_t Register) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIUndefined(int64_t Register) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createUndefined(Label, Register);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -616,8 +616,8 @@ void MCStreamer::EmitCFIUndefined(int64_t Register) {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIRegister(int64_t Register1, int64_t Register2) {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIRegister(int64_t Register1, int64_t Register2) {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createRegister(Label, Register1, Register2);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -626,8 +626,8 @@ void MCStreamer::EmitCFIRegister(int64_t Register1, int64_t Register2) {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIWindowSave() {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFIWindowSave() {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction =
MCCFIInstruction::createWindowSave(Label);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
@ -636,8 +636,8 @@ void MCStreamer::EmitCFIWindowSave() {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFINegateRAState() {
MCSymbol *Label = EmitCFILabel();
void MCStreamer::emitCFINegateRAState() {
MCSymbol *Label = emitCFILabel();
MCCFIInstruction Instruction = MCCFIInstruction::createNegateRAState(Label);
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
if (!CurFrame)
@ -645,7 +645,7 @@ void MCStreamer::EmitCFINegateRAState() {
CurFrame->Instructions.push_back(Instruction);
}
void MCStreamer::EmitCFIReturnColumn(int64_t Register) {
void MCStreamer::emitCFIReturnColumn(int64_t Register) {
MCDwarfFrameInfo *CurFrame = getCurrentDwarfFrameInfo();
if (!CurFrame)
return;
@ -676,7 +676,7 @@ void MCStreamer::EmitWinCFIStartProc(const MCSymbol *Symbol, SMLoc Loc) {
getContext().reportError(
Loc, "Starting a function before ending the previous one!");
MCSymbol *StartProc = EmitCFILabel();
MCSymbol *StartProc = emitCFILabel();
WinFrameInfos.emplace_back(
std::make_unique<WinEH::FrameInfo>(Symbol, StartProc));
@ -691,7 +691,7 @@ void MCStreamer::EmitWinCFIEndProc(SMLoc Loc) {
if (CurFrame->ChainedParent)
getContext().reportError(Loc, "Not all chained regions terminated!");
MCSymbol *Label = EmitCFILabel();
MCSymbol *Label = emitCFILabel();
CurFrame->End = Label;
}
@ -702,7 +702,7 @@ void MCStreamer::EmitWinCFIFuncletOrFuncEnd(SMLoc Loc) {
if (CurFrame->ChainedParent)
getContext().reportError(Loc, "Not all chained regions terminated!");
MCSymbol *Label = EmitCFILabel();
MCSymbol *Label = emitCFILabel();
CurFrame->FuncletOrFuncEnd = Label;
}
@ -711,7 +711,7 @@ void MCStreamer::EmitWinCFIStartChained(SMLoc Loc) {
if (!CurFrame)
return;
MCSymbol *StartProc = EmitCFILabel();
MCSymbol *StartProc = emitCFILabel();
WinFrameInfos.emplace_back(std::make_unique<WinEH::FrameInfo>(
CurFrame->Function, StartProc, CurFrame));
@ -727,7 +727,7 @@ void MCStreamer::EmitWinCFIEndChained(SMLoc Loc) {
return getContext().reportError(
Loc, "End of a chained region outside a chained region!");
MCSymbol *Label = EmitCFILabel();
MCSymbol *Label = emitCFILabel();
CurFrame->End = Label;
CurrentWinFrameInfo = const_cast<WinEH::FrameInfo *>(CurFrame->ChainedParent);
@ -820,7 +820,7 @@ void MCStreamer::EmitWinCFIPushReg(MCRegister Register, SMLoc Loc) {
if (!CurFrame)
return;
MCSymbol *Label = EmitCFILabel();
MCSymbol *Label = emitCFILabel();
WinEH::Instruction Inst = Win64EH::Instruction::PushNonVol(
Label, encodeSEHRegNum(Context, Register));
@ -841,7 +841,7 @@ void MCStreamer::EmitWinCFISetFrame(MCRegister Register, unsigned Offset,
return getContext().reportError(
Loc, "frame offset must be less than or equal to 240");
MCSymbol *Label = EmitCFILabel();
MCSymbol *Label = emitCFILabel();
WinEH::Instruction Inst = Win64EH::Instruction::SetFPReg(
Label, encodeSEHRegNum(getContext(), Register), Offset);
@ -860,7 +860,7 @@ void MCStreamer::EmitWinCFIAllocStack(unsigned Size, SMLoc Loc) {
return getContext().reportError(
Loc, "stack allocation size is not a multiple of 8");
MCSymbol *Label = EmitCFILabel();
MCSymbol *Label = emitCFILabel();
WinEH::Instruction Inst = Win64EH::Instruction::Alloc(Label, Size);
CurFrame->Instructions.push_back(Inst);
@ -876,7 +876,7 @@ void MCStreamer::EmitWinCFISaveReg(MCRegister Register, unsigned Offset,
return getContext().reportError(
Loc, "register save offset is not 8 byte aligned");
MCSymbol *Label = EmitCFILabel();
MCSymbol *Label = emitCFILabel();
WinEH::Instruction Inst = Win64EH::Instruction::SaveNonVol(
Label, encodeSEHRegNum(Context, Register), Offset);
@ -891,7 +891,7 @@ void MCStreamer::EmitWinCFISaveXMM(MCRegister Register, unsigned Offset,
if (Offset & 0x0F)
return getContext().reportError(Loc, "offset is not a multiple of 16");
MCSymbol *Label = EmitCFILabel();
MCSymbol *Label = emitCFILabel();
WinEH::Instruction Inst = Win64EH::Instruction::SaveXMM(
Label, encodeSEHRegNum(Context, Register), Offset);
@ -906,7 +906,7 @@ void MCStreamer::EmitWinCFIPushFrame(bool Code, SMLoc Loc) {
return getContext().reportError(
Loc, "If present, PushMachFrame must be the first UOP");
MCSymbol *Label = EmitCFILabel();
MCSymbol *Label = emitCFILabel();
WinEH::Instruction Inst = Win64EH::Instruction::PushMachFrame(Label, Code);
CurFrame->Instructions.push_back(Inst);
@ -917,7 +917,7 @@ void MCStreamer::EmitWinCFIEndProlog(SMLoc Loc) {
if (!CurFrame)
return;
MCSymbol *Label = EmitCFILabel();
MCSymbol *Label = emitCFILabel();
CurFrame->PrologEnd = Label;
}
@ -1011,7 +1011,7 @@ void MCStreamer::visitUsedExpr(const MCExpr &Expr) {
}
}
void MCStreamer::EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &) {
void MCStreamer::emitInstruction(const MCInst &Inst, const MCSubtargetInfo &) {
// Scan for values.
for (unsigned i = Inst.getNumOperands(); i--;)
if (Inst.getOperand(i).isExpr())

4
llvm/lib/Object/RecordStreamer.cpp
View File

@ -81,9 +81,9 @@ RecordStreamer::const_iterator RecordStreamer::begin() {
RecordStreamer::const_iterator RecordStreamer::end() { return Symbols.end(); }
void RecordStreamer::EmitInstruction(const MCInst &Inst,
void RecordStreamer::emitInstruction(const MCInst &Inst,
const MCSubtargetInfo &STI) {
MCStreamer::EmitInstruction(Inst, STI);
MCStreamer::emitInstruction(Inst, STI);
}
void RecordStreamer::EmitLabel(MCSymbol *Symbol, SMLoc Loc) {

2
llvm/lib/Object/RecordStreamer.h
View File

@ -46,7 +46,7 @@ private:
public:
RecordStreamer(MCContext &Context, const Module &M);
void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
void EmitLabel(MCSymbol *Symbol, SMLoc Loc = SMLoc()) override;
void EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) override;
bool EmitSymbolAttribute(MCSymbol *Symbol, MCSymbolAttr Attribute) override;

50
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
View File

@ -112,7 +112,7 @@ public:
bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
const MachineInstr *MI);
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
AsmPrinter::getAnalysisUsage(AU);
@ -368,20 +368,20 @@ void AArch64AsmPrinter::EmitHwasanMemaccessSymbols(Module &M) {
OutStreamer->EmitSymbolAttribute(Sym, MCSA_Hidden);
OutStreamer->EmitLabel(Sym);
OutStreamer->EmitInstruction(MCInstBuilder(AArch64::UBFMXri)
OutStreamer->emitInstruction(MCInstBuilder(AArch64::UBFMXri)
.addReg(AArch64::X16)
.addReg(Reg)
.addImm(4)
.addImm(55),
*STI);
OutStreamer->EmitInstruction(MCInstBuilder(AArch64::LDRBBroX)
OutStreamer->emitInstruction(MCInstBuilder(AArch64::LDRBBroX)
.addReg(AArch64::W16)
.addReg(AArch64::X9)
.addReg(AArch64::X16)
.addImm(0)
.addImm(0),
*STI);
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::SUBSXrs)
.addReg(AArch64::XZR)
.addReg(AArch64::X16)
@ -389,7 +389,7 @@ void AArch64AsmPrinter::EmitHwasanMemaccessSymbols(Module &M) {
.addImm(AArch64_AM::getShifterImm(AArch64_AM::LSR, 56)),
*STI);
MCSymbol *HandleMismatchOrPartialSym = OutContext.createTempSymbol();
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::Bcc)
.addImm(AArch64CC::NE)
.addExpr(MCSymbolRefExpr::create(HandleMismatchOrPartialSym,
@ -397,25 +397,25 @@ void AArch64AsmPrinter::EmitHwasanMemaccessSymbols(Module &M) {
*STI);
MCSymbol *ReturnSym = OutContext.createTempSymbol();
OutStreamer->EmitLabel(ReturnSym);
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::RET).addReg(AArch64::LR), *STI);
OutStreamer->EmitLabel(HandleMismatchOrPartialSym);
if (IsShort) {
OutStreamer->EmitInstruction(MCInstBuilder(AArch64::SUBSWri)
OutStreamer->emitInstruction(MCInstBuilder(AArch64::SUBSWri)
.addReg(AArch64::WZR)
.addReg(AArch64::W16)
.addImm(15)
.addImm(0),
*STI);
MCSymbol *HandleMismatchSym = OutContext.createTempSymbol();
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::Bcc)
.addImm(AArch64CC::HI)
.addExpr(MCSymbolRefExpr::create(HandleMismatchSym, OutContext)),
*STI);
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::ANDXri)
.addReg(AArch64::X17)
.addReg(Reg)
@ -423,43 +423,43 @@ void AArch64AsmPrinter::EmitHwasanMemaccessSymbols(Module &M) {
*STI);
unsigned Size = 1 << (AccessInfo & 0xf);
if (Size != 1)
OutStreamer->EmitInstruction(MCInstBuilder(AArch64::ADDXri)
OutStreamer->emitInstruction(MCInstBuilder(AArch64::ADDXri)
.addReg(AArch64::X17)
.addReg(AArch64::X17)
.addImm(Size - 1)
.addImm(0),
*STI);
OutStreamer->EmitInstruction(MCInstBuilder(AArch64::SUBSWrs)
OutStreamer->emitInstruction(MCInstBuilder(AArch64::SUBSWrs)
.addReg(AArch64::WZR)
.addReg(AArch64::W16)
.addReg(AArch64::W17)
.addImm(0),
*STI);
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::Bcc)
.addImm(AArch64CC::LS)
.addExpr(MCSymbolRefExpr::create(HandleMismatchSym, OutContext)),
*STI);
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::ORRXri)
.addReg(AArch64::X16)
.addReg(Reg)
.addImm(AArch64_AM::encodeLogicalImmediate(0xf, 64)),
*STI);
OutStreamer->EmitInstruction(MCInstBuilder(AArch64::LDRBBui)
OutStreamer->emitInstruction(MCInstBuilder(AArch64::LDRBBui)
.addReg(AArch64::W16)
.addReg(AArch64::X16)
.addImm(0),
*STI);
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::SUBSXrs)
.addReg(AArch64::XZR)
.addReg(AArch64::X16)
.addReg(Reg)
.addImm(AArch64_AM::getShifterImm(AArch64_AM::LSR, 56)),
*STI);
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::Bcc)
.addImm(AArch64CC::EQ)
.addExpr(MCSymbolRefExpr::create(ReturnSym, OutContext)),
@ -468,14 +468,14 @@ void AArch64AsmPrinter::EmitHwasanMemaccessSymbols(Module &M) {
OutStreamer->EmitLabel(HandleMismatchSym);
}
OutStreamer->EmitInstruction(MCInstBuilder(AArch64::STPXpre)
OutStreamer->emitInstruction(MCInstBuilder(AArch64::STPXpre)
.addReg(AArch64::SP)
.addReg(AArch64::X0)
.addReg(AArch64::X1)
.addReg(AArch64::SP)
.addImm(-32),
*STI);
OutStreamer->EmitInstruction(MCInstBuilder(AArch64::STPXi)
OutStreamer->emitInstruction(MCInstBuilder(AArch64::STPXi)
.addReg(AArch64::FP)
.addReg(AArch64::LR)
.addReg(AArch64::SP)
@ -483,13 +483,13 @@ void AArch64AsmPrinter::EmitHwasanMemaccessSymbols(Module &M) {
*STI);
if (Reg != AArch64::X0)
OutStreamer->EmitInstruction(MCInstBuilder(AArch64::ORRXrs)
OutStreamer->emitInstruction(MCInstBuilder(AArch64::ORRXrs)
.addReg(AArch64::X0)
.addReg(AArch64::XZR)
.addReg(Reg)
.addImm(0),
*STI);
OutStreamer->EmitInstruction(MCInstBuilder(AArch64::MOVZXi)
OutStreamer->emitInstruction(MCInstBuilder(AArch64::MOVZXi)
.addReg(AArch64::X1)
.addImm(AccessInfo)
.addImm(0),
@ -498,14 +498,14 @@ void AArch64AsmPrinter::EmitHwasanMemaccessSymbols(Module &M) {
// Intentionally load the GOT entry and branch to it, rather than possibly
// late binding the function, which may clobber the registers before we have
// a chance to save them.
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::ADRP)
.addReg(AArch64::X16)
.addExpr(AArch64MCExpr::create(
HwasanTagMismatchRef, AArch64MCExpr::VariantKind::VK_GOT_PAGE,
OutContext)),
*STI);
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::LDRXui)
.addReg(AArch64::X16)
.addReg(AArch64::X16)
@ -513,7 +513,7 @@ void AArch64AsmPrinter::EmitHwasanMemaccessSymbols(Module &M) {
HwasanTagMismatchRef, AArch64MCExpr::VariantKind::VK_GOT_LO12,
OutContext)),
*STI);
OutStreamer->EmitInstruction(
OutStreamer->emitInstruction(
MCInstBuilder(AArch64::BR).addReg(AArch64::X16), *STI);
}
}
@ -981,7 +981,7 @@ void AArch64AsmPrinter::EmitFMov0(const MachineInstr &MI) {
// instructions) auto-generated.
#include "AArch64GenMCPseudoLowering.inc"
void AArch64AsmPrinter::EmitInstruction(const MachineInstr *MI) {
void AArch64AsmPrinter::emitInstruction(const MachineInstr *MI) {
// Do any auto-generated pseudo lowerings.
if (emitPseudoExpansionLowering(*OutStreamer, MI))
return;
@ -1080,7 +1080,7 @@ void AArch64AsmPrinter::EmitInstruction(const MachineInstr *MI) {
if (needsCFIMoves() == CFI_M_None)
return;
OutStreamer->EmitCFIBKeyFrame();
OutStreamer->emitCFIBKeyFrame();
return;
}
}

8
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
View File

@ -4832,7 +4832,7 @@ bool AArch64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
return true;
Inst.setLoc(IDLoc);
Out.EmitInstruction(Inst, getSTI());
Out.emitInstruction(Inst, getSTI());
return false;
}
case Match_MissingFeature: {
@ -5322,7 +5322,7 @@ bool AArch64AsmParser::parseDirectiveTLSDescCall(SMLoc L) {
Inst.setOpcode(AArch64::TLSDESCCALL);
Inst.addOperand(MCOperand::createExpr(Expr));
getParser().getStreamer().EmitInstruction(Inst, getSTI());
getParser().getStreamer().emitInstruction(Inst, getSTI());
return false;
}
@ -5466,7 +5466,7 @@ bool AArch64AsmParser::parseDirectiveUnreq(SMLoc L) {
bool AArch64AsmParser::parseDirectiveCFINegateRAState() {
if (parseToken(AsmToken::EndOfStatement, "unexpected token in directive"))
return true;
getStreamer().EmitCFINegateRAState();
getStreamer().emitCFINegateRAState();
return false;
}
@ -5476,7 +5476,7 @@ bool AArch64AsmParser::parseDirectiveCFIBKeyFrame() {
if (parseToken(AsmToken::EndOfStatement,
"unexpected token in '.cfi_b_key_frame'"))
return true;
getStreamer().EmitCFIBKeyFrame();
getStreamer().emitCFIBKeyFrame();
return false;
}

4
llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
View File

@ -102,10 +102,10 @@ public:
/// This function is the one used to emit instruction data into the ELF
/// streamer. We override it to add the appropriate mapping symbol if
/// necessary.
void EmitInstruction(const MCInst &Inst,
void emitInstruction(const MCInst &Inst,
const MCSubtargetInfo &STI) override {
EmitA64MappingSymbol();
MCELFStreamer::EmitInstruction(Inst, STI);
MCELFStreamer::emitInstruction(Inst, STI);
}
/// Emit a 32-bit value as an instruction. This is only used for the .inst

8
llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFStreamer.cpp
View File

@ -68,7 +68,7 @@ void AArch64TargetWinCOFFStreamer::EmitARM64WinUnwindCode(unsigned UnwindCode,
WinEH::FrameInfo *CurFrame = S.EnsureValidWinFrameInfo(SMLoc());
if (!CurFrame)
return;
MCSymbol *Label = S.EmitCFILabel();
MCSymbol *Label = S.emitCFILabel();
auto Inst = WinEH::Instruction(UnwindCode, Label, Reg, Offset);
if (InEpilogCFI)
CurFrame->EpilogMap[CurrentEpilog].push_back(Inst);
@ -158,7 +158,7 @@ void AArch64TargetWinCOFFStreamer::EmitARM64WinCFIPrologEnd() {
if (!CurFrame)
return;
MCSymbol *Label = S.EmitCFILabel();
MCSymbol *Label = S.emitCFILabel();
CurFrame->PrologEnd = Label;
WinEH::Instruction Inst = WinEH::Instruction(Win64EH::UOP_End, Label, -1, 0);
auto it = CurFrame->Instructions.begin();
@ -172,7 +172,7 @@ void AArch64TargetWinCOFFStreamer::EmitARM64WinCFIEpilogStart() {
return;
InEpilogCFI = true;
CurrentEpilog = S.EmitCFILabel();
CurrentEpilog = S.emitCFILabel();
}
void AArch64TargetWinCOFFStreamer::EmitARM64WinCFIEpilogEnd() {
@ -182,7 +182,7 @@ void AArch64TargetWinCOFFStreamer::EmitARM64WinCFIEpilogEnd() {
return;
InEpilogCFI = false;
MCSymbol *Label = S.EmitCFILabel();
MCSymbol *Label = S.emitCFILabel();
WinEH::Instruction Inst = WinEH::Instruction(Win64EH::UOP_End, Label, -1, 0);
CurFrame->EpilogMap[CurrentEpilog].push_back(Inst);
CurrentEpilog = nullptr;

2
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
View File

@ -121,7 +121,7 @@ public:
const MachineInstr *MI);
/// Implemented in AMDGPUMCInstLower.cpp
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
void emitFunctionBodyStart() override;

8
llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
View File

@ -254,7 +254,7 @@ const MCExpr *AMDGPUAsmPrinter::lowerConstant(const Constant *CV) {
return AsmPrinter::lowerConstant(CV);
}
void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void AMDGPUAsmPrinter::emitInstruction(const MachineInstr *MI) {
if (emitPseudoExpansionLowering(*OutStreamer, MI))
return;
@ -272,7 +272,7 @@ void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
const MachineBasicBlock *MBB = MI->getParent();
MachineBasicBlock::const_instr_iterator I = ++MI->getIterator();
while (I != MBB->instr_end() && I->isInsideBundle()) {
EmitInstruction(&*I);
emitInstruction(&*I);
++I;
}
} else {
@ -381,7 +381,7 @@ void R600MCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
}
}
void R600AsmPrinter::EmitInstruction(const MachineInstr *MI) {
void R600AsmPrinter::emitInstruction(const MachineInstr *MI) {
const R600Subtarget &STI = MF->getSubtarget<R600Subtarget>();
R600MCInstLower MCInstLowering(OutContext, STI, *this);
@ -396,7 +396,7 @@ void R600AsmPrinter::EmitInstruction(const MachineInstr *MI) {
const MachineBasicBlock *MBB = MI->getParent();
MachineBasicBlock::const_instr_iterator I = ++MI->getIterator();
while (I != MBB->instr_end() && I->isInsideBundle()) {
EmitInstruction(&*I);
emitInstruction(&*I);
++I;
}
} else {

2
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
View File

@ -3606,7 +3606,7 @@ bool AMDGPUAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
return true;
}
Inst.setLoc(IDLoc);
Out.EmitInstruction(Inst, getSTI());
Out.emitInstruction(Inst, getSTI());
return false;
case Match_MissingFeature:

2
llvm/lib/Target/AMDGPU/R600AsmPrinter.h
View File

@ -26,7 +26,7 @@ public:
StringRef getPassName() const override;
bool runOnMachineFunction(MachineFunction &MF) override;
/// Implemented in AMDGPUMCInstLower.cpp
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
/// Lower the specified LLVM Constant to an MCExpr.
/// The AsmPrinter::lowerConstantof does not know how to lower
/// addrspacecast, therefore they should be lowered by this function.

4
llvm/lib/Target/ARC/ARCAsmPrinter.cpp
View File

@ -41,12 +41,12 @@ public:
MCInstLowering(&OutContext, *this) {}
StringRef getPassName() const override { return "ARC Assembly Printer"; }
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
};
} // end anonymous namespace
void ARCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void ARCAsmPrinter::emitInstruction(const MachineInstr *MI) {
SmallString<128> Str;
raw_svector_ostream O(Str);

4
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
View File

@ -100,7 +100,7 @@ void ARMAsmPrinter::emitGlobalVariable(const GlobalVariable *GV) {
AsmPrinter::emitGlobalVariable(GV);
}
/// runOnMachineFunction - This uses the EmitInstruction()
/// runOnMachineFunction - This uses the emitInstruction()
/// method to print assembly for each instruction.
///
bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
@ -1242,7 +1242,7 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) {
// instructions) auto-generated.
#include "ARMGenMCPseudoLowering.inc"
void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void ARMAsmPrinter::emitInstruction(const MachineInstr *MI) {
const DataLayout &DL = getDataLayout();
MCTargetStreamer &TS = *OutStreamer->getTargetStreamer();
ARMTargetStreamer &ATS = static_cast<ARMTargetStreamer &>(TS);

2
llvm/lib/Target/ARM/ARMAsmPrinter.h
View File

@ -87,7 +87,7 @@ public:
void emitJumpTableAddrs(const MachineInstr *MI);
void emitJumpTableInsts(const MachineInstr *MI);
void emitJumpTableTBInst(const MachineInstr *MI, unsigned OffsetWidth);
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
bool runOnMachineFunction(MachineFunction &F) override;
void emitConstantPool() override {

6
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -245,12 +245,12 @@ class ARMAsmParser : public MCTargetAsmParser {
ITInst.setOpcode(ARM::t2IT);
ITInst.addOperand(MCOperand::createImm(ITState.Cond));
ITInst.addOperand(MCOperand::createImm(ITState.Mask));
Out.EmitInstruction(ITInst, getSTI());
Out.emitInstruction(ITInst, getSTI());
// Emit the conditonal instructions
assert(PendingConditionalInsts.size() <= 4);
for (const MCInst &Inst : PendingConditionalInsts) {
Out.EmitInstruction(Inst, getSTI());
Out.emitInstruction(Inst, getSTI());
}
PendingConditionalInsts.clear();
@ -10521,7 +10521,7 @@ bool ARMAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
if (isITBlockFull() || isITBlockTerminator(Inst))
flushPendingInstructions(Out);
} else {
Out.EmitInstruction(Inst, getSTI());
Out.emitInstruction(Inst, getSTI());
}
return false;
case Match_NearMisses:

4
llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
View File

@ -474,14 +474,14 @@ public:
/// This function is the one used to emit instruction data into the ELF
/// streamer. We override it to add the appropriate mapping symbol if
/// necessary.
void EmitInstruction(const MCInst &Inst,
void emitInstruction(const MCInst &Inst,
const MCSubtargetInfo &STI) override {
if (IsThumb)
EmitThumbMappingSymbol();
else
EmitARMMappingSymbol();
MCELFStreamer::EmitInstruction(Inst, STI);
MCELFStreamer::emitInstruction(Inst, STI);
}
void emitInst(uint32_t Inst, char Suffix) {

4
llvm/lib/Target/AVR/AVRAsmPrinter.cpp
View File

@ -51,7 +51,7 @@ public:
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
const char *ExtraCode, raw_ostream &O) override;
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
private:
const MCRegisterInfo &MRI;
@ -168,7 +168,7 @@ bool AVRAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
return false;
}
void AVRAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void AVRAsmPrinter::emitInstruction(const MachineInstr *MI) {
AVRMCInstLower MCInstLowering(OutContext, *this);
MCInst I;

2
llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
View File

@ -309,7 +309,7 @@ bool AVRAsmParser::missingFeature(llvm::SMLoc const &Loc,
bool AVRAsmParser::emit(MCInst &Inst, SMLoc const &Loc, MCStreamer &Out) const {
Inst.setLoc(Loc);
Out.EmitInstruction(Inst, STI);
Out.emitInstruction(Inst, STI);
return false;
}

2
llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
View File

@ -297,7 +297,7 @@ bool BPFAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
break;
case Match_Success:
Inst.setLoc(IDLoc);
Out.EmitInstruction(Inst, getSTI());
Out.emitInstruction(Inst, getSTI());
return false;
case Match_MissingFeature:
return Error(IDLoc, "instruction use requires an option to be enabled");

4
llvm/lib/Target/BPF/BPFAsmPrinter.cpp
View File

@ -48,7 +48,7 @@ public:
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
const char *ExtraCode, raw_ostream &O) override;
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
private:
BTFDebug *BTF;
@ -137,7 +137,7 @@ bool BPFAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
return false;
}
void BPFAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void BPFAsmPrinter::emitInstruction(const MachineInstr *MI) {
MCInst TmpInst;
if (!BTF || !BTF->InstLower(MI, TmpInst)) {

2
llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
View File

@ -492,7 +492,7 @@ bool HexagonAsmParser::finishBundle(SMLoc IDLoc, MCStreamer &Out) {
assert(HexagonMCInstrInfo::isBundle(MCB));
Out.EmitInstruction(MCB, STI);
Out.emitInstruction(MCB, STI);
} else
return true; // Error

4
llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
View File

@ -740,7 +740,7 @@ void HexagonAsmPrinter::HexagonProcessInstruction(MCInst &Inst,
}
/// Print out a single Hexagon MI to the current output stream.
void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void HexagonAsmPrinter::emitInstruction(const MachineInstr *MI) {
MCInst MCB;
MCB.setOpcode(Hexagon::BUNDLE);
MCB.addOperand(MCOperand::createImm(0));
@ -768,7 +768,7 @@ void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
assert(Ok); (void)Ok;
if (HexagonMCInstrInfo::bundleSize(MCB) == 0)
return;
OutStreamer->EmitInstruction(MCB, getSubtargetInfo());
OutStreamer->emitInstruction(MCB, getSubtargetInfo());
}
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonAsmPrinter() {

2
llvm/lib/Target/Hexagon/HexagonAsmPrinter.h
View File

@ -46,7 +46,7 @@ class TargetMachine;
bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB)
const override;
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
void HexagonProcessInstruction(MCInst &Inst, const MachineInstr &MBB);
void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);

4
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.cpp
View File

@ -58,7 +58,7 @@ HexagonMCELFStreamer::HexagonMCELFStreamer(
: MCELFStreamer(Context, std::move(TAB), std::move(OW), std::move(Emitter)),
MCII(createHexagonMCInstrInfo()) {}
void HexagonMCELFStreamer::EmitInstruction(const MCInst &MCB,
void HexagonMCELFStreamer::emitInstruction(const MCInst &MCB,
const MCSubtargetInfo &STI) {
assert(MCB.getOpcode() == Hexagon::BUNDLE);
assert(HexagonMCInstrInfo::bundleSize(MCB) <= HEXAGON_PACKET_SIZE);
@ -71,7 +71,7 @@ void HexagonMCELFStreamer::EmitInstruction(const MCInst &MCB,
EmitSymbol(*MCI);
}
MCObjectStreamer::EmitInstruction(MCB, STI);
MCObjectStreamer::emitInstruction(MCB, STI);
}
void HexagonMCELFStreamer::EmitSymbol(const MCInst &Inst) {

2
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCELFStreamer.h
View File

@ -30,7 +30,7 @@ public:
std::unique_ptr<MCCodeEmitter> Emitter,
MCAssembler *Assembler);
void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
void EmitSymbol(const MCInst &Inst);
void HexagonMCEmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size,
unsigned ByteAlignment,

2
llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
View File

@ -659,7 +659,7 @@ bool LanaiAsmParser::MatchAndEmitInstruction(SMLoc IdLoc, unsigned &Opcode,
switch (MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm)) {
case Match_Success:
Out.EmitInstruction(Inst, SubtargetInfo);
Out.emitInstruction(Inst, SubtargetInfo);
Opcode = Inst.getOpcode();
return false;
case Match_MissingFeature:

14
llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
View File

@ -51,7 +51,7 @@ public:
void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
const char *ExtraCode, raw_ostream &O) override;
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
bool isBlockOnlyReachableByFallthrough(
const MachineBasicBlock *MBB) const override;
@ -155,7 +155,7 @@ void LanaiAsmPrinter::emitCallInstruction(const MachineInstr *MI) {
// Insert save rca instruction immediately before the call.
// TODO: We should generate a pc-relative mov instruction here instead
// of pc + 16 (should be mov .+16 %rca).
OutStreamer->EmitInstruction(MCInstBuilder(Lanai::ADD_I_LO)
OutStreamer->emitInstruction(MCInstBuilder(Lanai::ADD_I_LO)
.addReg(Lanai::RCA)
.addReg(Lanai::PC)
.addImm(16),
@ -163,7 +163,7 @@ void LanaiAsmPrinter::emitCallInstruction(const MachineInstr *MI) {
// Push rca onto the stack.
// st %rca, [--%sp]
OutStreamer->EmitInstruction(MCInstBuilder(Lanai::SW_RI)
OutStreamer->emitInstruction(MCInstBuilder(Lanai::SW_RI)
.addReg(Lanai::RCA)
.addReg(Lanai::SP)
.addImm(-4)
@ -175,9 +175,9 @@ void LanaiAsmPrinter::emitCallInstruction(const MachineInstr *MI) {
MCInst TmpInst;
MCInstLowering.Lower(MI, TmpInst);
TmpInst.setOpcode(Lanai::BT);
OutStreamer->EmitInstruction(TmpInst, STI);
OutStreamer->emitInstruction(TmpInst, STI);
} else {
OutStreamer->EmitInstruction(MCInstBuilder(Lanai::ADD_R)
OutStreamer->emitInstruction(MCInstBuilder(Lanai::ADD_R)
.addReg(Lanai::PC)
.addReg(MI->getOperand(0).getReg())
.addReg(Lanai::R0)
@ -191,10 +191,10 @@ void LanaiAsmPrinter::customEmitInstruction(const MachineInstr *MI) {
MCSubtargetInfo STI = getSubtargetInfo();
MCInst TmpInst;
MCInstLowering.Lower(MI, TmpInst);
OutStreamer->EmitInstruction(TmpInst, STI);
OutStreamer->emitInstruction(TmpInst, STI);
}
void LanaiAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void LanaiAsmPrinter::emitInstruction(const MachineInstr *MI) {
MachineBasicBlock::const_instr_iterator I = MI->getIterator();
MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();

2
llvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
View File

@ -263,7 +263,7 @@ bool MSP430AsmParser::MatchAndEmitInstruction(SMLoc Loc, unsigned &Opcode,
switch (MatchResult) {
case Match_Success:
Inst.setLoc(Loc);
Out.EmitInstruction(Inst, STI);
Out.emitInstruction(Inst, STI);
return false;
case Match_MnemonicFail:
return Error(Loc, "invalid instruction mnemonic");

4
llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
View File

@ -57,7 +57,7 @@ namespace {
const char *ExtraCode, raw_ostream &O) override;
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
const char *ExtraCode, raw_ostream &O) override;
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
void EmitInterruptVectorSection(MachineFunction &ISR);
};
@ -148,7 +148,7 @@ bool MSP430AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
}
//===----------------------------------------------------------------------===//
void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
void MSP430AsmPrinter::emitInstruction(const MachineInstr *MI) {
MSP430MCInstLower MCInstLowering(OutContext, *this);
MCInst TmpInst;

8
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
View File

@ -2313,7 +2313,7 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
tryExpandInstruction(Inst, IDLoc, Out, STI);
switch (ExpandResult) {
case MER_NotAMacro:
Out.EmitInstruction(Inst, *STI);
Out.emitInstruction(Inst, *STI);
break;
case MER_Success:
break;
@ -2640,7 +2640,7 @@ bool MipsAsmParser::expandJalWithRegs(MCInst &Inst, SMLoc IDLoc,
const MCOperand SecondRegOp = Inst.getOperand(1);
JalrInst.addOperand(SecondRegOp);
}
Out.EmitInstruction(JalrInst, *STI);
Out.emitInstruction(JalrInst, *STI);
// If .set reorder is active and branch instruction has a delay slot,
// emit a NOP after it.
@ -3571,7 +3571,7 @@ bool MipsAsmParser::expandUncondBranchMMPseudo(MCInst &Inst, SMLoc IDLoc,
Inst.addOperand(MCOperand::createImm(Offset.getImm()));
}
}
Out.EmitInstruction(Inst, *STI);
Out.emitInstruction(Inst, *STI);
// If .set reorder is active and branch instruction has a delay slot,
// emit a NOP after it.
@ -3858,7 +3858,7 @@ bool MipsAsmParser::expandLoadStoreMultiple(MCInst &Inst, SMLoc IDLoc,
}
Inst.setOpcode(NewOpcode);
Out.EmitInstruction(Inst, *STI);
Out.emitInstruction(Inst, *STI);
return false;
}

10
llvm/lib/Target/Mips/MCTargetDesc/MipsELFStreamer.cpp
View File

@ -33,9 +33,9 @@ MipsELFStreamer::MipsELFStreamer(MCContext &Context,
std::unique_ptr<MipsRegInfoRecord>(RegInfoRecord));
}
void MipsELFStreamer::EmitInstruction(const MCInst &Inst,
void MipsELFStreamer::emitInstruction(const MCInst &Inst,
const MCSubtargetInfo &STI) {
MCELFStreamer::EmitInstruction(Inst, STI);
MCELFStreamer::emitInstruction(Inst, STI);
MCContext &Context = getContext();
const MCRegisterInfo *MCRegInfo = Context.getRegisterInfo();
@ -53,18 +53,18 @@ void MipsELFStreamer::EmitInstruction(const MCInst &Inst,
createPendingLabelRelocs();
}
void MipsELFStreamer::EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) {
void MipsELFStreamer::emitCFIStartProcImpl(MCDwarfFrameInfo &Frame) {
Frame.Begin = getContext().createTempSymbol();
MCELFStreamer::EmitLabel(Frame.Begin);
}
MCSymbol *MipsELFStreamer::EmitCFILabel() {
MCSymbol *MipsELFStreamer::emitCFILabel() {
MCSymbol *Label = getContext().createTempSymbol("cfi", true);
MCELFStreamer::EmitLabel(Label);
return Label;
}
void MipsELFStreamer::EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) {
void MipsELFStreamer::emitCFIEndProcImpl(MCDwarfFrameInfo &Frame) {
Frame.End = getContext().createTempSymbol();
MCELFStreamer::EmitLabel(Frame.End);
}

8
llvm/lib/Target/Mips/MCTargetDesc/MipsELFStreamer.h
View File

@ -41,7 +41,7 @@ public:
/// \p Inst is actually emitted. For example, we can inspect the operands and
/// gather sufficient information that allows us to reason about the register
/// usage for the translation unit.
void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
/// Overriding this function allows us to record all labels that should be
/// marked as microMIPS. Based on this data marking is done in
@ -61,9 +61,9 @@ public:
// Overriding these functions allows us to avoid recording of these labels
// in EmitLabel and later marking them as microMIPS.
void EmitCFIStartProcImpl(MCDwarfFrameInfo &Frame) override;
void EmitCFIEndProcImpl(MCDwarfFrameInfo &Frame) override;
MCSymbol *EmitCFILabel() override;
void emitCFIStartProcImpl(MCDwarfFrameInfo &Frame) override;
void emitCFIEndProcImpl(MCDwarfFrameInfo &Frame) override;
MCSymbol *emitCFILabel() override;
/// Emits all the option records stored up until the point it's called.
void EmitMipsOptionRecords();

8
llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
View File

@ -129,7 +129,7 @@ void MipsMCCodeEmitter::EmitByte(unsigned char C, raw_ostream &OS) const {
OS << (char)C;
}
void MipsMCCodeEmitter::EmitInstruction(uint64_t Val, unsigned Size,
void MipsMCCodeEmitter::emitInstruction(uint64_t Val, unsigned Size,
const MCSubtargetInfo &STI,
raw_ostream &OS) const {
// Output the instruction encoding in little endian byte order.
@ -137,8 +137,8 @@ void MipsMCCodeEmitter::EmitInstruction(uint64_t Val, unsigned Size,
// mips32r2: 4 | 3 | 2 | 1
// microMIPS: 2 | 1 | 4 | 3
if (IsLittleEndian && Size == 4 && isMicroMips(STI)) {
EmitInstruction(Val >> 16, 2, STI, OS);
EmitInstruction(Val, 2, STI, OS);
emitInstruction(Val >> 16, 2, STI, OS);
emitInstruction(Val, 2, STI, OS);
} else {
for (unsigned i = 0; i < Size; ++i) {
unsigned Shift = IsLittleEndian ? i * 8 : (Size - 1 - i) * 8;
@ -226,7 +226,7 @@ encodeInstruction(const MCInst &MI, raw_ostream &OS,
if (!Size)
llvm_unreachable("Desc.getSize() returns 0");
EmitInstruction(Binary, Size, STI, OS);
emitInstruction(Binary, Size, STI, OS);
}
/// getBranchTargetOpValue - Return binary encoding of the branch

2
llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
View File

@ -44,7 +44,7 @@ public:
void EmitByte(unsigned char C, raw_ostream &OS) const;
void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
void emitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
raw_ostream &OS) const;
void encodeInstruction(const MCInst &MI, raw_ostream &OS,

14
llvm/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp
View File

@ -105,7 +105,7 @@ private:
MaskInst.addOperand(MCOperand::createReg(AddrReg));
MaskInst.addOperand(MCOperand::createReg(AddrReg));
MaskInst.addOperand(MCOperand::createReg(MaskReg));
MipsELFStreamer::EmitInstruction(MaskInst, STI);
MipsELFStreamer::emitInstruction(MaskInst, STI);
}
// Sandbox indirect branch or return instruction by inserting mask operation
@ -115,7 +115,7 @@ private:
EmitBundleLock(false);
emitMask(AddrReg, IndirectBranchMaskReg, STI);
MipsELFStreamer::EmitInstruction(MI, STI);
MipsELFStreamer::emitInstruction(MI, STI);
EmitBundleUnlock();
}
@ -130,7 +130,7 @@ private:
unsigned BaseReg = MI.getOperand(AddrIdx).getReg();
emitMask(BaseReg, LoadStoreStackMaskReg, STI);
}
MipsELFStreamer::EmitInstruction(MI, STI);
MipsELFStreamer::emitInstruction(MI, STI);
if (MaskAfter) {
// Sandbox SP change.
unsigned SPReg = MI.getOperand(0).getReg();
@ -143,7 +143,7 @@ private:
public:
/// This function is the one used to emit instruction data into the ELF
/// streamer. We override it to mask dangerous instructions.
void EmitInstruction(const MCInst &Inst,
void emitInstruction(const MCInst &Inst,
const MCSubtargetInfo &STI) override {
// Sandbox indirect jumps.
if (isIndirectJump(Inst)) {
@ -186,20 +186,20 @@ public:
unsigned TargetReg = Inst.getOperand(1).getReg();
emitMask(TargetReg, IndirectBranchMaskReg, STI);
}
MipsELFStreamer::EmitInstruction(Inst, STI);
MipsELFStreamer::emitInstruction(Inst, STI);
PendingCall = true;
return;
}
if (PendingCall) {
// Finish the sandboxing sequence by emitting branch delay.
MipsELFStreamer::EmitInstruction(Inst, STI);
MipsELFStreamer::emitInstruction(Inst, STI);
EmitBundleUnlock();
PendingCall = false;
return;
}
// None of the sandboxing applies, just emit the instruction.
MipsELFStreamer::EmitInstruction(Inst, STI);
MipsELFStreamer::emitInstruction(Inst, STI);
}
};

20
llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
View File

@ -169,7 +169,7 @@ void MipsTargetStreamer::emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc,
TmpInst.setOpcode(Opcode);
TmpInst.addOperand(MCOperand::createReg(Reg0));
TmpInst.setLoc(IDLoc);
getStreamer().EmitInstruction(TmpInst, *STI);
getStreamer().emitInstruction(TmpInst, *STI);
}
void MipsTargetStreamer::emitRX(unsigned Opcode, unsigned Reg0, MCOperand Op1,
@ -179,7 +179,7 @@ void MipsTargetStreamer::emitRX(unsigned Opcode, unsigned Reg0, MCOperand Op1,
TmpInst.addOperand(MCOperand::createReg(Reg0));
TmpInst.addOperand(Op1);
TmpInst.setLoc(IDLoc);
getStreamer().EmitInstruction(TmpInst, *STI);
getStreamer().emitInstruction(TmpInst, *STI);
}
void MipsTargetStreamer::emitRI(unsigned Opcode, unsigned Reg0, int32_t Imm,
@ -199,7 +199,7 @@ void MipsTargetStreamer::emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2,
TmpInst.addOperand(MCOperand::createImm(Imm1));
TmpInst.addOperand(MCOperand::createImm(Imm2));
TmpInst.setLoc(IDLoc);
getStreamer().EmitInstruction(TmpInst, *STI);
getStreamer().emitInstruction(TmpInst, *STI);
}
void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1,
@ -211,7 +211,7 @@ void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1,
TmpInst.addOperand(MCOperand::createReg(Reg1));
TmpInst.addOperand(Op2);
TmpInst.setLoc(IDLoc);
getStreamer().EmitInstruction(TmpInst, *STI);
getStreamer().emitInstruction(TmpInst, *STI);
}
void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1,
@ -230,7 +230,7 @@ void MipsTargetStreamer::emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1,
TmpInst.addOperand(MCOperand::createReg(Reg2));
TmpInst.addOperand(Op3);
TmpInst.setLoc(IDLoc);
getStreamer().EmitInstruction(TmpInst, *STI);
getStreamer().emitInstruction(TmpInst, *STI);
}
void MipsTargetStreamer::emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1,
@ -251,7 +251,7 @@ void MipsTargetStreamer::emitRRIII(unsigned Opcode, unsigned Reg0,
TmpInst.addOperand(MCOperand::createImm(Imm1));
TmpInst.addOperand(MCOperand::createImm(Imm2));
TmpInst.setLoc(IDLoc);
getStreamer().EmitInstruction(TmpInst, *STI);
getStreamer().emitInstruction(TmpInst, *STI);
}
void MipsTargetStreamer::emitAddu(unsigned DstReg, unsigned SrcReg,
@ -1139,7 +1139,7 @@ void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
MCA.getContext()),
MCA.getContext());
TmpInst.addOperand(MCOperand::createExpr(HiSym));
getStreamer().EmitInstruction(TmpInst, STI);
getStreamer().emitInstruction(TmpInst, STI);
TmpInst.clear();
@ -1152,7 +1152,7 @@ void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
MCA.getContext()),
MCA.getContext());
TmpInst.addOperand(MCOperand::createExpr(LoSym));
getStreamer().EmitInstruction(TmpInst, STI);
getStreamer().emitInstruction(TmpInst, STI);
TmpInst.clear();
@ -1160,7 +1160,7 @@ void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
TmpInst.addOperand(MCOperand::createReg(GPReg));
TmpInst.addOperand(MCOperand::createReg(GPReg));
TmpInst.addOperand(MCOperand::createReg(RegNo));
getStreamer().EmitInstruction(TmpInst, STI);
getStreamer().emitInstruction(TmpInst, STI);
forbidModuleDirective();
}
@ -1269,7 +1269,7 @@ void MipsTargetELFStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
Inst.addOperand(MCOperand::createReg(Mips::SP));
Inst.addOperand(MCOperand::createImm(SaveLocation));
}
getStreamer().EmitInstruction(Inst, STI);
getStreamer().emitInstruction(Inst, STI);
forbidModuleDirective();
}

12
llvm/lib/Target/Mips/MipsAsmPrinter.cpp
View File

@ -185,7 +185,7 @@ static void emitDirectiveRelocJalr(const MachineInstr &MI,
}
}
void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void MipsAsmPrinter::emitInstruction(const MachineInstr *MI) {
MipsTargetStreamer &TS = getTargetStreamer();
unsigned Opc = MI->getOpcode();
TS.forbidModuleDirective();
@ -280,7 +280,7 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
//
if (I->isPseudo() && !Subtarget->inMips16Mode()
&& !isLongBranchPseudo(I->getOpcode()))
llvm_unreachable("Pseudo opcode found in EmitInstruction()");
llvm_unreachable("Pseudo opcode found in emitInstruction()");
MCInst TmpInst0;
MCInstLowering.Lower(&*I, TmpInst0);
@ -860,7 +860,7 @@ void MipsAsmPrinter::EmitJal(const MCSubtargetInfo &STI, MCSymbol *Symbol) {
I.setOpcode(Mips::JAL);
I.addOperand(
MCOperand::createExpr(MCSymbolRefExpr::create(Symbol, OutContext)));
OutStreamer->EmitInstruction(I, STI);
OutStreamer->emitInstruction(I, STI);
}
void MipsAsmPrinter::EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode,
@ -868,7 +868,7 @@ void MipsAsmPrinter::EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode,
MCInst I;
I.setOpcode(Opcode);
I.addOperand(MCOperand::createReg(Reg));
OutStreamer->EmitInstruction(I, STI);
OutStreamer->emitInstruction(I, STI);
}
void MipsAsmPrinter::EmitInstrRegReg(const MCSubtargetInfo &STI,
@ -888,7 +888,7 @@ void MipsAsmPrinter::EmitInstrRegReg(const MCSubtargetInfo &STI,
I.setOpcode(Opcode);
I.addOperand(MCOperand::createReg(Reg1));
I.addOperand(MCOperand::createReg(Reg2));
OutStreamer->EmitInstruction(I, STI);
OutStreamer->emitInstruction(I, STI);
}
void MipsAsmPrinter::EmitInstrRegRegReg(const MCSubtargetInfo &STI,
@ -899,7 +899,7 @@ void MipsAsmPrinter::EmitInstrRegRegReg(const MCSubtargetInfo &STI,
I.addOperand(MCOperand::createReg(Reg1));
I.addOperand(MCOperand::createReg(Reg2));
I.addOperand(MCOperand::createReg(Reg3));
OutStreamer->EmitInstruction(I, STI);
OutStreamer->emitInstruction(I, STI);
}
void MipsAsmPrinter::EmitMovFPIntPair(const MCSubtargetInfo &STI,

2
llvm/lib/Target/Mips/MipsAsmPrinter.h
View File

@ -134,7 +134,7 @@ public:
// we emit constant pools customly!
}
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
void printSavedRegsBitmask();
void emitFrameDirective();
const char *getCurrentABIString() const;

2
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
View File

@ -141,7 +141,7 @@ VisitGlobalVariableForEmission(const GlobalVariable *GV,
Visiting.erase(GV);
}
void NVPTXAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void NVPTXAsmPrinter::emitInstruction(const MachineInstr *MI) {
MCInst Inst;
lowerToMCInst(MI, Inst);
EmitToStreamer(*OutStreamer, Inst);

2
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
View File

@ -206,7 +206,7 @@ private:
void emitFunctionBodyEnd() override;
void emitImplicitDef(const MachineInstr *MI) const override;
void EmitInstruction(const MachineInstr *) override;
void emitInstruction(const MachineInstr *) override;
void lowerToMCInst(const MachineInstr *MI, MCInst &OutMI);
bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp);
MCOperand GetSymbolRef(const MCSymbol *Symbol);

2
llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
View File

@ -1155,7 +1155,7 @@ bool PPCAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
// Post-process instructions (typically extended mnemonics)
ProcessInstruction(Inst, Operands);
Inst.setLoc(IDLoc);
Out.EmitInstruction(Inst, getSTI());
Out.emitInstruction(Inst, getSTI());
return false;
case Match_MissingFeature:
return Error(IDLoc, "instruction use requires an option to be enabled");

6
llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
View File

@ -44,14 +44,14 @@ PPCELFStreamer::PPCELFStreamer(MCContext &Context,
std::move(Emitter)), LastLabel(NULL) {
}
void PPCELFStreamer::EmitInstruction(const MCInst &Inst,
void PPCELFStreamer::emitInstruction(const MCInst &Inst,
const MCSubtargetInfo &STI) {
PPCMCCodeEmitter *Emitter =
static_cast<PPCMCCodeEmitter*>(getAssembler().getEmitterPtr());
// Special handling is only for prefixed instructions.
if (!Emitter->isPrefixedInstruction(Inst)) {
MCELFStreamer::EmitInstruction(Inst, STI);
MCELFStreamer::emitInstruction(Inst, STI);
return;
}
@ -71,7 +71,7 @@ void PPCELFStreamer::EmitInstruction(const MCInst &Inst,
// Since the previous emit created a new fragment then adding this instruction
// also forces the addition of a new fragment. Inst is now the first
// instruction in that new fragment.
MCELFStreamer::EmitInstruction(Inst, STI);
MCELFStreamer::emitInstruction(Inst, STI);
// The above instruction is forced to start a new fragment because it
// comes after a code alignment fragment. Get that new fragment.

2
llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
View File

@ -37,7 +37,7 @@ public:
std::unique_ptr<MCObjectWriter> OW,
std::unique_ptr<MCCodeEmitter> Emitter);
void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
// EmitLabel updates LastLabel and LastLabelLoc when a new label is emitted.
void EmitLabel(MCSymbol *Symbol, SMLoc Loc = SMLoc()) override;

12
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
View File

@ -100,7 +100,7 @@ public:
return AsmPrinter::doInitialization(M);
}
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
/// This function is for PrintAsmOperand and PrintAsmMemoryOperand,
/// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only.
@ -144,7 +144,7 @@ public:
void emitFunctionBodyStart() override;
void emitFunctionBodyEnd() override;
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
};
class PPCAIXAsmPrinter : public PPCAsmPrinter {
@ -512,7 +512,7 @@ MCSymbol *PPCAsmPrinter::getMCSymbolForTOCPseudoMO(const MachineOperand &MO) {
/// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
/// the current output stream.
///
void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
MCInst TmpInst;
const bool IsPPC64 = Subtarget->isPPC64();
const bool IsAIX = Subtarget->isAIXABI();
@ -1149,13 +1149,13 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
EmitToStreamer(*OutStreamer, TmpInst);
}
void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void PPCLinuxAsmPrinter::emitInstruction(const MachineInstr *MI) {
if (!Subtarget->isPPC64())
return PPCAsmPrinter::EmitInstruction(MI);
return PPCAsmPrinter::emitInstruction(MI);
switch (MI->getOpcode()) {
default:
return PPCAsmPrinter::EmitInstruction(MI);
return PPCAsmPrinter::emitInstruction(MI);
case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {
// .begin:
// b .end # lis 0, FuncId[16..32]

2
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
View File

@ -1682,7 +1682,7 @@ void RISCVAsmParser::emitToStreamer(MCStreamer &S, const MCInst &Inst) {
bool Res = compressInst(CInst, Inst, getSTI(), S.getContext());
if (Res)
++RISCVNumInstrsCompressed;
S.EmitInstruction((Res ? CInst : Inst), getSTI());
S.emitInstruction((Res ? CInst : Inst), getSTI());
}
void RISCVAsmParser::emitLoadImm(Register DestReg, int64_t Value,

4
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
View File

@ -44,7 +44,7 @@ public:
StringRef getPassName() const override { return "RISCV Assembly Printer"; }
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
const char *ExtraCode, raw_ostream &OS) override;
@ -77,7 +77,7 @@ void RISCVAsmPrinter::EmitToStreamer(MCStreamer &S, const MCInst &Inst) {
// instructions) auto-generated.
#include "RISCVGenMCPseudoLowering.inc"
void RISCVAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void RISCVAsmPrinter::emitInstruction(const MachineInstr *MI) {
// Do any auto-generated pseudo lowerings.
if (emitPseudoExpansionLowering(*OutStreamer, MI))
return;

2
llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
View File

@ -602,7 +602,7 @@ bool SparcAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
}
for (const MCInst &I : Instructions) {
Out.EmitInstruction(I, getSTI());
Out.emitInstruction(I, getSTI());
}
return false;
}

11
llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
View File

@ -53,7 +53,7 @@ namespace {
const char *Modifier = nullptr);
void emitFunctionBodyStart() override;
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
static const char *getRegisterName(unsigned RegNo) {
return SparcInstPrinter::getRegisterName(RegNo);
@ -108,7 +108,7 @@ static void EmitCall(MCStreamer &OutStreamer,
MCInst CallInst;
CallInst.setOpcode(SP::CALL);
CallInst.addOperand(Callee);
OutStreamer.EmitInstruction(CallInst, STI);
OutStreamer.emitInstruction(CallInst, STI);
}
static void EmitSETHI(MCStreamer &OutStreamer,
@ -119,7 +119,7 @@ static void EmitSETHI(MCStreamer &OutStreamer,
SETHIInst.setOpcode(SP::SETHIi);
SETHIInst.addOperand(RD);
SETHIInst.addOperand(Imm);
OutStreamer.EmitInstruction(SETHIInst, STI);
OutStreamer.emitInstruction(SETHIInst, STI);
}
static void EmitBinary(MCStreamer &OutStreamer, unsigned Opcode,
@ -131,7 +131,7 @@ static void EmitBinary(MCStreamer &OutStreamer, unsigned Opcode,
Inst.addOperand(RD);
Inst.addOperand(RS1);
Inst.addOperand(Src2);
OutStreamer.EmitInstruction(Inst, STI);
OutStreamer.emitInstruction(Inst, STI);
}
static void EmitOR(MCStreamer &OutStreamer,
@ -249,8 +249,7 @@ void SparcAsmPrinter::LowerGETPCXAndEmitMCInsts(const MachineInstr *MI,
EmitADD(*OutStreamer, MCRegOP, RegO7, MCRegOP, STI);
}
void SparcAsmPrinter::EmitInstruction(const MachineInstr *MI)
{
void SparcAsmPrinter::emitInstruction(const MachineInstr *MI) {
switch (MI->getOpcode()) {
default: break;

4
llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
View File

@ -1135,7 +1135,7 @@ bool SystemZAsmParser::ParseDirectiveInsn(SMLoc L) {
}
// Emit as a regular instruction.
Parser.getStreamer().EmitInstruction(Inst, getSTI());
Parser.getStreamer().emitInstruction(Inst, getSTI());
return false;
}
@ -1288,7 +1288,7 @@ bool SystemZAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
switch (MatchResult) {
case Match_Success:
Inst.setLoc(IDLoc);
Out.EmitInstruction(Inst, getSTI());
Out.emitInstruction(Inst, getSTI());
return false;
case Match_MissingFeature: {

22
llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
View File

@ -124,7 +124,7 @@ static MCInst lowerSubvectorStore(const MachineInstr *MI, unsigned Opcode) {
.addImm(0);
}
void SystemZAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void SystemZAsmPrinter::emitInstruction(const MachineInstr *MI) {
SystemZMCInstLower Lower(MF->getContext(), *this);
MCInst LoweredMI;
switch (MI->getOpcode()) {
@ -522,7 +522,6 @@ void SystemZAsmPrinter::EmitInstruction(const MachineInstr *MI) {
EmitToStreamer(*OutStreamer, LoweredMI);
}
// Emit the largest nop instruction smaller than or equal to NumBytes
// bytes. Return the size of nop emitted.
static unsigned EmitNop(MCContext &OutContext, MCStreamer &OutStreamer,
@ -532,22 +531,22 @@ static unsigned EmitNop(MCContext &OutContext, MCStreamer &OutStreamer,
return 0;
}
else if (NumBytes < 4) {
OutStreamer.EmitInstruction(MCInstBuilder(SystemZ::BCRAsm)
.addImm(0).addReg(SystemZ::R0D), STI);
OutStreamer.emitInstruction(
MCInstBuilder(SystemZ::BCRAsm).addImm(0).addReg(SystemZ::R0D), STI);
return 2;
}
else if (NumBytes < 6) {
OutStreamer.EmitInstruction(MCInstBuilder(SystemZ::BCAsm)
.addImm(0).addReg(0).addImm(0).addReg(0),
STI);
OutStreamer.emitInstruction(
MCInstBuilder(SystemZ::BCAsm).addImm(0).addReg(0).addImm(0).addReg(0),
STI);
return 4;
}
else {
MCSymbol *DotSym = OutContext.createTempSymbol();
const MCSymbolRefExpr *Dot = MCSymbolRefExpr::create(DotSym, OutContext);
OutStreamer.EmitLabel(DotSym);
OutStreamer.EmitInstruction(MCInstBuilder(SystemZ::BRCLAsm)
.addImm(0).addExpr(Dot), STI);
OutStreamer.emitInstruction(
MCInstBuilder(SystemZ::BRCLAsm).addImm(0).addExpr(Dot), STI);
return 6;
}
}
@ -573,8 +572,9 @@ void SystemZAsmPrinter::LowerFENTRY_CALL(const MachineInstr &MI,
MCSymbol *fentry = Ctx.getOrCreateSymbol("__fentry__");
const MCSymbolRefExpr *Op =
MCSymbolRefExpr::create(fentry, MCSymbolRefExpr::VK_PLT, Ctx);
OutStreamer->EmitInstruction(MCInstBuilder(SystemZ::BRASL)
.addReg(SystemZ::R0D).addExpr(Op), getSubtargetInfo());
OutStreamer->emitInstruction(
MCInstBuilder(SystemZ::BRASL).addReg(SystemZ::R0D).addExpr(Op),
getSubtargetInfo());
}
void SystemZAsmPrinter::LowerSTACKMAP(const MachineInstr &MI) {

2
llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
View File

@ -32,7 +32,7 @@ public:
// Override AsmPrinter.
StringRef getPassName() const override { return "SystemZ Assembly Printer"; }
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
void emitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override;
void emitEndOfAsmFile(Module &M) override;
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,

4
llvm/lib/Target/VE/VEAsmPrinter.cpp
View File

@ -46,7 +46,7 @@ public:
StringRef getPassName() const override { return "VE Assembly Printer"; }
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
static const char *getRegisterName(unsigned RegNo) {
return VEInstPrinter::getRegisterName(RegNo);
@ -54,7 +54,7 @@ public:
};
} // end of anonymous namespace
void VEAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void VEAsmPrinter::emitInstruction(const MachineInstr *MI) {
switch (MI->getOpcode()) {
default:

2
llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
View File

@ -839,7 +839,7 @@ public:
if (Op0.getImm() == -1)
Op0.setImm(Align);
}
Out.EmitInstruction(Inst, getSTI());
Out.emitInstruction(Inst, getSTI());
if (CurrentState == EndFunction) {
onEndOfFunction();
} else {

2
llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
View File

@ -315,7 +315,7 @@ void WebAssemblyAsmPrinter::emitFunctionBodyStart() {
AsmPrinter::emitFunctionBodyStart();
}
void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void WebAssemblyAsmPrinter::emitInstruction(const MachineInstr *MI) {
LLVM_DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n');
switch (MI->getOpcode()) {

2
llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.h
View File

@ -63,7 +63,7 @@ public:
void emitJumpTableInfo() override;
void emitConstantPool() override;
void emitFunctionBodyStart() override;
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
const char *ExtraCode, raw_ostream &OS) override;
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,

16
llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -930,9 +930,9 @@ private:
bool validateInstruction(MCInst &Inst, const OperandVector &Ops);
bool processInstruction(MCInst &Inst, const OperandVector &Ops);
/// Wrapper around MCStreamer::EmitInstruction(). Possibly adds
/// Wrapper around MCStreamer::emitInstruction(). Possibly adds
/// instrumentation around Inst.
void EmitInstruction(MCInst &Inst, OperandVector &Operands, MCStreamer &Out);
void emitInstruction(MCInst &Inst, OperandVector &Operands, MCStreamer &Out);
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
OperandVector &Operands, MCStreamer &Out,
@ -3149,9 +3149,9 @@ bool X86AsmParser::validateInstruction(MCInst &Inst, const OperandVector &Ops) {
static const char *getSubtargetFeatureName(uint64_t Val);
void X86AsmParser::EmitInstruction(MCInst &Inst, OperandVector &Operands,
void X86AsmParser::emitInstruction(MCInst &Inst, OperandVector &Operands,
MCStreamer &Out) {
Out.EmitInstruction(Inst, getSTI());
Out.emitInstruction(Inst, getSTI());
}
bool X86AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
@ -3186,7 +3186,7 @@ void X86AsmParser::MatchFPUWaitAlias(SMLoc IDLoc, X86Operand &Op,
Inst.setOpcode(X86::WAIT);
Inst.setLoc(IDLoc);
if (!MatchingInlineAsm)
EmitInstruction(Inst, Operands, Out);
emitInstruction(Inst, Operands, Out);
Operands[0] = X86Operand::CreateToken(Repl, IDLoc);
}
}
@ -3293,7 +3293,7 @@ bool X86AsmParser::MatchAndEmitATTInstruction(SMLoc IDLoc, unsigned &Opcode,
Inst.setLoc(IDLoc);
if (!MatchingInlineAsm)
EmitInstruction(Inst, Operands, Out);
emitInstruction(Inst, Operands, Out);
Opcode = Inst.getOpcode();
return false;
case Match_InvalidImmUnsignedi4: {
@ -3362,7 +3362,7 @@ bool X86AsmParser::MatchAndEmitATTInstruction(SMLoc IDLoc, unsigned &Opcode,
if (NumSuccessfulMatches == 1) {
Inst.setLoc(IDLoc);
if (!MatchingInlineAsm)
EmitInstruction(Inst, Operands, Out);
emitInstruction(Inst, Operands, Out);
Opcode = Inst.getOpcode();
return false;
}
@ -3615,7 +3615,7 @@ bool X86AsmParser::MatchAndEmitIntelInstruction(SMLoc IDLoc, unsigned &Opcode,
;
Inst.setLoc(IDLoc);
if (!MatchingInlineAsm)
EmitInstruction(Inst, Operands, Out);
emitInstruction(Inst, Operands, Out);
Opcode = Inst.getOpcode();
return false;
} else if (NumSuccessfulMatches > 1) {

2
llvm/lib/Target/X86/X86AsmPrinter.h
View File

@ -127,7 +127,7 @@ public:
void emitEndOfAsmFile(Module &M) override;
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
void emitBasicBlockEnd(const MachineBasicBlock &MBB) override {
AsmPrinter::emitBasicBlockEnd(MBB);

28
llvm/lib/Target/X86/X86MCInstLower.cpp
View File

@ -121,7 +121,7 @@ void X86AsmPrinter::StackMapShadowTracker::emitShadowPadding(
}
void X86AsmPrinter::EmitAndCountInstruction(MCInst &Inst) {
OutStreamer->EmitInstruction(Inst, getSubtargetInfo());
OutStreamer->emitInstruction(Inst, getSubtargetInfo());
SMShadowTracker.count(Inst, getSubtargetInfo(), CodeEmitter.get());
}
@ -1077,7 +1077,7 @@ static unsigned EmitNop(MCStreamer &OS, unsigned NumBytes, bool Is64Bit,
const MCSubtargetInfo &STI) {
if (!Is64Bit) {
// TODO Do additional checking if the CPU supports multi-byte nops.
OS.EmitInstruction(MCInstBuilder(X86::NOOP), STI);
OS.emitInstruction(MCInstBuilder(X86::NOOP), STI);
return 1;
}
@ -1156,14 +1156,14 @@ static unsigned EmitNop(MCStreamer &OS, unsigned NumBytes, bool Is64Bit,
switch (Opc) {
default: llvm_unreachable("Unexpected opcode");
case X86::NOOP:
OS.EmitInstruction(MCInstBuilder(Opc), STI);
OS.emitInstruction(MCInstBuilder(Opc), STI);
break;
case X86::XCHG16ar:
OS.EmitInstruction(MCInstBuilder(Opc).addReg(X86::AX).addReg(X86::AX), STI);
OS.emitInstruction(MCInstBuilder(Opc).addReg(X86::AX).addReg(X86::AX), STI);
break;
case X86::NOOPL:
case X86::NOOPW:
OS.EmitInstruction(MCInstBuilder(Opc)
OS.emitInstruction(MCInstBuilder(Opc)
.addReg(BaseReg)
.addImm(ScaleVal)
.addReg(IndexReg)
@ -1238,7 +1238,7 @@ void X86AsmPrinter::LowerSTATEPOINT(const MachineInstr &MI,
MCInst CallInst;
CallInst.setOpcode(CallOpcode);
CallInst.addOperand(CallTargetMCOp);
OutStreamer->EmitInstruction(CallInst, getSubtargetInfo());
OutStreamer->emitInstruction(CallInst, getSubtargetInfo());
}
// Record our statepoint node in the same section used by STACKMAP
@ -1283,7 +1283,7 @@ void X86AsmPrinter::LowerFAULTING_OP(const MachineInstr &FaultingMI,
MI.addOperand(MaybeOperand.getValue());
OutStreamer->AddComment("on-fault: " + HandlerLabel->getName());
OutStreamer->EmitInstruction(MI, getSubtargetInfo());
OutStreamer->emitInstruction(MI, getSubtargetInfo());
}
void X86AsmPrinter::LowerFENTRY_CALL(const MachineInstr &MI,
@ -1335,7 +1335,7 @@ void X86AsmPrinter::LowerPATCHABLE_OP(const MachineInstr &MI,
}
}
OutStreamer->EmitInstruction(MCI, getSubtargetInfo());
OutStreamer->emitInstruction(MCI, getSubtargetInfo());
}
// Lower a stackmap of the form:
@ -1681,7 +1681,7 @@ void X86AsmPrinter::LowerPATCHABLE_RET(const MachineInstr &MI,
for (auto &MO : make_range(MI.operands_begin() + 1, MI.operands_end()))
if (auto MaybeOperand = MCIL.LowerMachineOperand(&MI, MO))
Ret.addOperand(MaybeOperand.getValue());
OutStreamer->EmitInstruction(Ret, getSubtargetInfo());
OutStreamer->emitInstruction(Ret, getSubtargetInfo());
EmitNops(*OutStreamer, 10, Subtarget->is64Bit(), getSubtargetInfo());
recordSled(CurSled, MI, SledKind::FUNCTION_EXIT);
}
@ -1720,7 +1720,7 @@ void X86AsmPrinter::LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI,
for (auto &MO : make_range(MI.operands_begin() + 1, MI.operands_end()))
if (auto MaybeOperand = MCIL.LowerMachineOperand(&MI, MO))
TC.addOperand(MaybeOperand.getValue());
OutStreamer->EmitInstruction(TC, getSubtargetInfo());
OutStreamer->emitInstruction(TC, getSubtargetInfo());
}
// Returns instruction preceding MBBI in MachineFunction.
@ -1964,7 +1964,7 @@ static unsigned getRegisterWidth(const MCOperandInfo &Info) {
llvm_unreachable("Unknown register class!");
}
void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
void X86AsmPrinter::emitInstruction(const MachineInstr *MI) {
X86MCInstLower MCInstLowering(*MF, *this);
const X86RegisterInfo *RI =
MF->getSubtarget<X86Subtarget>().getRegisterInfo();
@ -2137,7 +2137,7 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
int stackGrowth = -RI->getSlotSize();
if (HasActiveDwarfFrame && !hasFP) {
OutStreamer->EmitCFIAdjustCfaOffset(-stackGrowth);
OutStreamer->emitCFIAdjustCfaOffset(-stackGrowth);
}
// Emit the label.
@ -2148,7 +2148,7 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
MCInstBuilder(X86::POP32r).addReg(MI->getOperand(0).getReg()));
if (HasActiveDwarfFrame && !hasFP) {
OutStreamer->EmitCFIAdjustCfaOffset(stackGrowth);
OutStreamer->emitCFIAdjustCfaOffset(stackGrowth);
}
return;
}
@ -2655,7 +2655,7 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
// after it.
SMShadowTracker.emitShadowPadding(*OutStreamer, getSubtargetInfo());
// Then emit the call
OutStreamer->EmitInstruction(TmpInst, getSubtargetInfo());
OutStreamer->emitInstruction(TmpInst, getSubtargetInfo());
return;
}

4
llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
View File

@ -75,7 +75,7 @@ namespace {
void emitGlobalVariable(const GlobalVariable *GV) override;
void emitFunctionEntryLabel() override;
void EmitInstruction(const MachineInstr *MI) override;
void emitInstruction(const MachineInstr *MI) override;
void emitFunctionBodyStart() override;
void emitFunctionBodyEnd() override;
};
@ -255,7 +255,7 @@ bool XCoreAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
return false;
}
void XCoreAsmPrinter::EmitInstruction(const MachineInstr *MI) {
void XCoreAsmPrinter::emitInstruction(const MachineInstr *MI) {
SmallString<128> Str;
raw_svector_ostream O(Str);

2
llvm/tools/llvm-exegesis/lib/SnippetFile.cpp
View File

@ -35,7 +35,7 @@ public:
// Implementation of the MCStreamer interface. We only care about
// instructions.
void EmitInstruction(const MCInst &Instruction,
void emitInstruction(const MCInst &Instruction,
const MCSubtargetInfo &STI) override {
Result->Key.Instructions.push_back(Instruction);
}

2
llvm/tools/llvm-mc/Disassembler.cpp
View File

@ -68,7 +68,7 @@ static bool PrintInsts(const MCDisassembler &DisAsm,
LLVM_FALLTHROUGH;
case MCDisassembler::Success:
Streamer.EmitInstruction(Inst, STI);
Streamer.emitInstruction(Inst, STI);
break;
}
}

4
llvm/tools/llvm-mca/CodeRegionGenerator.cpp
View File

@ -47,8 +47,8 @@ public:
: MCStreamer(Context), Regions(R) {}
// We only want to intercept the emission of new instructions.
virtual void EmitInstruction(const MCInst &Inst,
const MCSubtargetInfo &/* unused */) override {
virtual void emitInstruction(const MCInst &Inst,
const MCSubtargetInfo & /* unused */) override {
Regions.addInstruction(Inst);
}

2
llvm/tools/llvm-ml/Disassembler.cpp
View File

@ -64,7 +64,7 @@ static bool PrintInsts(const MCDisassembler &DisAsm, const ByteArrayTy &Bytes,
LLVM_FALLTHROUGH;
case MCDisassembler::Success:
Streamer.EmitInstruction(Inst, STI);
Streamer.emitInstruction(Inst, STI);
break;
}
}