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[MLIR][GPU] Expose GpuParallelLoopMapping as non-test pass.
Reviewed By: bondhugula, herhut Differential Revision: https://reviews.llvm.org/D126199
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@ -60,13 +60,5 @@ ParallelLoopDimMapping getParallelLoopDimMappingAttr(Processor processor,
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LogicalResult setMappingAttr(scf::ParallelOp ploopOp,
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ArrayRef<ParallelLoopDimMapping> mapping);
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} // namespace gpu
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/// Maps the parallel loops found in the given function to workgroups. The first
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/// loop encountered will be mapped to the global workgroup and the second loop
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/// encountered to the local workgroup. Within each mapping, the first three
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/// dimensions are mapped to x/y/z hardware ids and all following dimensions are
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/// mapped to sequential loops.
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void greedilyMapParallelSCFToGPU(Region ®ion);
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} // namespace mlir
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#endif // MLIR_DIALECT_GPU_PARALLELLOOPMAPPER_H
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@ -39,6 +39,13 @@ createGpuKernelOutliningPass(StringRef dataLayoutStr = StringRef());
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/// Rewrites a function region so that GPU ops execute asynchronously.
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std::unique_ptr<OperationPass<func::FuncOp>> createGpuAsyncRegionPass();
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/// Maps the parallel loops found in the given function to workgroups. The first
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/// loop encountered will be mapped to the global workgroup and the second loop
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/// encountered to the local workgroup. Within each mapping, the first three
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/// dimensions are mapped to x/y/z hardware ids and all following dimensions are
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/// mapped to sequential loops.
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std::unique_ptr<OperationPass<func::FuncOp>> createGpuMapParallelLoopsPass();
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/// Collect a set of patterns to rewrite all-reduce ops within the GPU dialect.
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void populateGpuAllReducePatterns(RewritePatternSet &patterns);
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@ -29,4 +29,11 @@ def GpuAsyncRegionPass : Pass<"gpu-async-region", "func::FuncOp"> {
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let dependentDialects = ["async::AsyncDialect"];
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}
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def GpuMapParallelLoopsPass
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: Pass<"gpu-map-parallel-loops", "mlir::func::FuncOp"> {
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let summary = "Greedily maps loops to GPU hardware dimensions.";
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let constructor = "mlir::createGpuMapParallelLoopsPass()";
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let description = "Greedily maps loops to GPU hardware dimensions.";
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}
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#endif // MLIR_DIALECT_GPU_PASSES
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@ -13,26 +13,25 @@
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#include "mlir/Dialect/GPU/ParallelLoopMapper.h"
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#include "PassDetail.h"
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#include "mlir/Dialect/GPU/GPUDialect.h"
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#include "mlir/Dialect/GPU/Passes.h"
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#include "mlir/Dialect/SCF/SCF.h"
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#include "mlir/IR/AffineMap.h"
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#include "mlir/Pass/Pass.h"
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using namespace mlir;
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using namespace mlir::gpu;
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using namespace mlir::scf;
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#include "mlir/Dialect/GPU/ParallelLoopMapperAttr.cpp.inc"
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#include "mlir/Dialect/GPU/ParallelLoopMapperEnums.cpp.inc"
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namespace mlir {
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namespace gpu {
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StringRef getMappingAttrName() { return "mapping"; }
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using scf::ParallelOp;
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ParallelLoopDimMapping getParallelLoopDimMappingAttr(Processor processor,
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AffineMap map,
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AffineMap bound) {
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StringRef gpu::getMappingAttrName() { return "mapping"; }
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gpu::ParallelLoopDimMapping
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gpu::getParallelLoopDimMappingAttr(Processor processor, AffineMap map,
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AffineMap bound) {
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MLIRContext *context = map.getContext();
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OpBuilder builder(context);
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return ParallelLoopDimMapping::get(
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@ -40,8 +39,8 @@ ParallelLoopDimMapping getParallelLoopDimMappingAttr(Processor processor,
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AffineMapAttr::get(map), AffineMapAttr::get(bound), context);
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}
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LogicalResult setMappingAttr(scf::ParallelOp ploopOp,
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ArrayRef<ParallelLoopDimMapping> mapping) {
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LogicalResult gpu::setMappingAttr(ParallelOp ploopOp,
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ArrayRef<ParallelLoopDimMapping> mapping) {
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// Verify that each processor is mapped to only once.
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llvm::DenseSet<gpu::Processor> specifiedMappings;
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for (auto dimAttr : mapping) {
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@ -56,20 +55,17 @@ LogicalResult setMappingAttr(scf::ParallelOp ploopOp,
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ArrayAttr::get(ploopOp.getContext(), mappingAsAttrs));
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return success();
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}
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} // namespace gpu
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} // namespace mlir
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namespace gpu {
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namespace {
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enum MappingLevel { MapGrid = 0, MapBlock = 1, Sequential = 2 };
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} // namespace
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static constexpr int kNumHardwareIds = 3;
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} // namespace
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/// Bounded increment on MappingLevel. Increments to the next
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/// level unless Sequential was already reached.
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MappingLevel &operator++(MappingLevel &mappingLevel) {
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static MappingLevel &operator++(MappingLevel &mappingLevel) {
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if (mappingLevel < Sequential) {
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mappingLevel = static_cast<MappingLevel>(mappingLevel + 1);
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}
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@ -82,8 +78,7 @@ MappingLevel &operator++(MappingLevel &mappingLevel) {
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/// TODO: Make this use x for the inner-most loop that is
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/// distributed to map to x, the next innermost to y and the next innermost to
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/// z.
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static gpu::Processor getHardwareIdForMapping(MappingLevel level,
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int dimension) {
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static Processor getHardwareIdForMapping(MappingLevel level, int dimension) {
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if (dimension >= kNumHardwareIds || level == Sequential)
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return Processor::Sequential;
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@ -145,6 +140,21 @@ static void mapParallelOp(ParallelOp parallelOp,
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}
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}
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void mlir::greedilyMapParallelSCFToGPU(Region ®ion) {
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region.walk([](ParallelOp parallelOp) { mapParallelOp(parallelOp); });
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namespace {
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struct GpuMapParallelLoopsPass
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: public GpuMapParallelLoopsPassBase<GpuMapParallelLoopsPass> {
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void runOnOperation() override {
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for (Region ®ion : getOperation()->getRegions()) {
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region.walk([](ParallelOp parallelOp) { mapParallelOp(parallelOp); });
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}
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}
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};
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} // namespace
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} // namespace gpu
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} // namespace mlir
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std::unique_ptr<mlir::OperationPass<mlir::func::FuncOp>>
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mlir::createGpuMapParallelLoopsPass() {
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return std::make_unique<gpu::GpuMapParallelLoopsPass>();
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}
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@ -1,4 +1,4 @@
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// RUN: mlir-opt -test-gpu-greedy-parallel-loop-mapping -split-input-file %s | FileCheck %s
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// RUN: mlir-opt -gpu-map-parallel-loops -split-input-file %s | FileCheck %s
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func.func @parallel_loop(%arg0 : index, %arg1 : index, %arg2 : index,
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%arg3 : index) {
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@ -3,7 +3,6 @@ add_mlir_library(MLIRGPUTestPasses
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TestConvertGPUKernelToCubin.cpp
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TestConvertGPUKernelToHsaco.cpp
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TestGpuMemoryPromotion.cpp
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TestGpuParallelLoopMapping.cpp
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TestGpuRewrite.cpp
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EXCLUDE_FROM_LIBMLIR
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@ -1,47 +0,0 @@
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//===- TestGPUParallelLoopMapping.cpp - Test pass for GPU loop mapping ----===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the pass testing the utilities for mapping parallel
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// loops to gpu hardware ids.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/GPU/ParallelLoopMapper.h"
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#include "mlir/Pass/Pass.h"
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using namespace mlir;
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namespace {
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/// Simple pass for testing the mapping of parallel loops to hardware ids using
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/// a greedy mapping strategy.
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struct TestGpuGreedyParallelLoopMappingPass
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: public PassWrapper<TestGpuGreedyParallelLoopMappingPass,
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OperationPass<>> {
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MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(
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TestGpuGreedyParallelLoopMappingPass)
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StringRef getArgument() const final {
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return "test-gpu-greedy-parallel-loop-mapping";
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}
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StringRef getDescription() const final {
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return "Greedily maps all parallel loops to gpu hardware ids.";
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}
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void runOnOperation() override {
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for (Region ®ion : getOperation()->getRegions())
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greedilyMapParallelSCFToGPU(region);
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}
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};
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} // namespace
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namespace mlir {
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namespace test {
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void registerTestGpuParallelLoopMappingPass() {
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PassRegistration<TestGpuGreedyParallelLoopMappingPass>();
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}
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} // namespace test
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} // namespace mlir
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@ -79,7 +79,6 @@ void registerTestDynamicPipelinePass();
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void registerTestExpandTanhPass();
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void registerTestComposeSubView();
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void registerTestMultiBuffering();
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void registerTestGpuParallelLoopMappingPass();
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void registerTestIRVisitorsPass();
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void registerTestGenericIRVisitorsPass();
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void registerTestGenericIRVisitorsInterruptPass();
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@ -176,7 +175,6 @@ void registerTestPasses() {
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mlir::test::registerTestExpandTanhPass();
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mlir::test::registerTestComposeSubView();
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mlir::test::registerTestMultiBuffering();
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mlir::test::registerTestGpuParallelLoopMappingPass();
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mlir::test::registerTestIRVisitorsPass();
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mlir::test::registerTestGenericIRVisitorsPass();
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mlir::test::registerTestInterfaces();
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