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[DAGCombiner] Better constant vector support for FCOPYSIGN.

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Enable constant folding when both operands are vectors of constants.

Turn into FNEG/FABS when the RHS is a splat constant vector.

llvm-svn: 345469
This commit is contained in:
Craig Topper 2018-10-28 01:32:49 +00:00
parent f206447dcd
commit c4b785ae1e
2 changed files with 6 additions and 18 deletions
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8
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -11590,15 +11590,15 @@ static inline bool CanCombineFCOPYSIGN_EXTEND_ROUND(SDNode *N) {
SDValue DAGCombiner::visitFCOPYSIGN(SDNode *N) {
SDValue N0 = N->getOperand(0);
SDValue N1 = N->getOperand(1);
ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
bool N0CFP = isConstantFPBuildVectorOrConstantFP(N0);
bool N1CFP = isConstantFPBuildVectorOrConstantFP(N1);
EVT VT = N->getValueType(0);
if (N0CFP && N1CFP) // Constant fold
return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), VT, N0, N1);
if (N1CFP) {
const APFloat &V = N1CFP->getValueAPF();
if (ConstantFPSDNode *N1C = isConstOrConstSplatFP(N->getOperand(1))) {
const APFloat &V = N1C->getValueAPF();
// copysign(x, c1) -> fabs(x) iff ispos(c1)
// copysign(x, c1) -> fneg(fabs(x)) iff isneg(c1)
if (!V.isNegative()) {

16
llvm/test/CodeGen/X86/sse1-fcopysign.ll
View File

@ -43,18 +43,12 @@ define float @f32_neg(float %a, float %b) nounwind {
define <4 x float> @v4f32_pos(<4 x float> %a, <4 x float> %b) nounwind {
; X86-LABEL: v4f32_pos:
; X86: # %bb.0:
; X86-NEXT: movaps {{.*#+}} xmm1 = [1,1,1,1]
; X86-NEXT: andps {{\.LCPI.*}}, %xmm1
; X86-NEXT: andps {{\.LCPI.*}}, %xmm0
; X86-NEXT: orps %xmm1, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: v4f32_pos:
; X64: # %bb.0:
; X64-NEXT: movaps {{.*#+}} xmm1 = [1,1,1,1]
; X64-NEXT: andps {{.*}}(%rip), %xmm1
; X64-NEXT: andps {{.*}}(%rip), %xmm0
; X64-NEXT: orps %xmm1, %xmm0
; X64-NEXT: retq
%tmp = tail call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>)
ret <4 x float> %tmp
@ -63,18 +57,12 @@ define <4 x float> @v4f32_pos(<4 x float> %a, <4 x float> %b) nounwind {
define <4 x float> @v4f32_neg(<4 x float> %a, <4 x float> %b) nounwind {
; X86-LABEL: v4f32_neg:
; X86: # %bb.0:
; X86-NEXT: movaps {{.*#+}} xmm1 = [-1,-1,-1,-1]
; X86-NEXT: andps {{\.LCPI.*}}, %xmm1
; X86-NEXT: andps {{\.LCPI.*}}, %xmm0
; X86-NEXT: orps %xmm1, %xmm0
; X86-NEXT: orps {{\.LCPI.*}}, %xmm0
; X86-NEXT: retl
;
; X64-LABEL: v4f32_neg:
; X64: # %bb.0:
; X64-NEXT: movaps {{.*#+}} xmm1 = [-1,-1,-1,-1]
; X64-NEXT: andps {{.*}}(%rip), %xmm1
; X64-NEXT: andps {{.*}}(%rip), %xmm0
; X64-NEXT: orps %xmm1, %xmm0
; X64-NEXT: orps {{.*}}(%rip), %xmm0
; X64-NEXT: retq
%tmp = tail call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> <float -1.0, float -1.0, float -1.0, float -1.0>)
ret <4 x float> %tmp