mirror of
https://github.com/capstone-engine/llvm-capstone.git
synced 2025-01-09 01:29:52 +00:00
Added support for dynamic detection of AVX, and
fixed a few bugs that revealed. Now the "register read" command should show AVX registers (ymm0-ymm15) on Mac OS X platforms that support them. When testing this on Mac OS X, run debugserver manually, like this: debugserver --native-regs localhost:1111 /path/to/executable Then lldb /path/to/executable ... (lldb) process connect connect://localhost:1111 llvm-svn: 135331
This commit is contained in:
parent
f5a8cc7ef8
commit
c4ffe37cf1
@ -28,7 +28,7 @@ namespace lldb_private {
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public:
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enum
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{
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kMaxRegisterByteSize = 16u
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kMaxRegisterByteSize = 32u
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};
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enum Type
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{
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@ -41,6 +41,7 @@
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26CE05C5115C36590022F371 /* CFBundle.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 2695DD910D3EBFF6007E4CA2 /* CFBundle.cpp */; };
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26CE05CF115C36F70022F371 /* CoreFoundation.framework in Frameworks */ = {isa = PBXBuildFile; fileRef = 26ACA3340D3E956300A2120B /* CoreFoundation.framework */; };
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26CE05F1115C387C0022F371 /* PseudoTerminal.cpp in Sources */ = {isa = PBXBuildFile; fileRef = AF67ABFF0D34604D0022D128 /* PseudoTerminal.cpp */; };
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4971AE7213D10F4F00649E37 /* HasAVX.s in Sources */ = {isa = PBXBuildFile; fileRef = 4971AE7113D10F4F00649E37 /* HasAVX.s */; };
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/* End PBXBuildFile section */
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/* Begin PBXFileReference section */
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@ -125,6 +126,8 @@
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26CF99A21142EB7400011AAB /* DNBArchImplX86_64.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = DNBArchImplX86_64.cpp; sourceTree = "<group>"; };
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26CF99A31142EB7400011AAB /* DNBArchImplX86_64.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = DNBArchImplX86_64.h; sourceTree = "<group>"; };
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26E6B9DA0D1329010037ECDD /* RNBDefs.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = RNBDefs.h; sourceTree = "<group>"; };
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4971AE7013D10F4F00649E37 /* HasAVX.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = HasAVX.h; sourceTree = "<group>"; };
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4971AE7113D10F4F00649E37 /* HasAVX.s */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.asm; path = HasAVX.s; sourceTree = "<group>"; };
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49F530111331519C008956F6 /* MachRegisterStatesI386.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MachRegisterStatesI386.h; sourceTree = "<group>"; };
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49F5301213316D7F008956F6 /* MachRegisterStatesX86_64.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = MachRegisterStatesX86_64.h; sourceTree = "<group>"; };
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AF67ABFF0D34604D0022D128 /* PseudoTerminal.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = PseudoTerminal.cpp; sourceTree = "<group>"; };
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@ -278,6 +281,8 @@
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26C637E90C71334A0024798E /* i386 */,
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26C637FA0C71334A0024798E /* ppc */,
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26CF99A11142EB7400011AAB /* x86_64 */,
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4971AE7013D10F4F00649E37 /* HasAVX.h */,
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4971AE7113D10F4F00649E37 /* HasAVX.s */,
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26C637E80C71334A0024798E /* dbgnub-mig.defs */,
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26C637ED0C71334A0024798E /* MachDYLD.h */,
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26C637EC0C71334A0024798E /* MachDYLD.cpp */,
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@ -452,6 +457,7 @@
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26CE05F1115C387C0022F371 /* PseudoTerminal.cpp in Sources */,
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2660D9CE1192280900958FBD /* StringExtractor.cpp in Sources */,
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264D5D581293835600ED4C01 /* DNBArch.cpp in Sources */,
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4971AE7213D10F4F00649E37 /* HasAVX.s in Sources */,
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);
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runOnlyForDeploymentPostprocessing = 0;
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};
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27
lldb/tools/debugserver/source/MacOSX/HasAVX.h
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27
lldb/tools/debugserver/source/MacOSX/HasAVX.h
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@ -0,0 +1,27 @@
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//===-- HasAVX.h ------------------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef HasAVX_h
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#define HasAVX_h
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#if defined (__i386__) || defined (__x86_64__)
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#ifdef __cplusplus
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extern "C" {
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#endif
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int HasAVX ();
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif
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32
lldb/tools/debugserver/source/MacOSX/HasAVX.s
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32
lldb/tools/debugserver/source/MacOSX/HasAVX.s
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@ -0,0 +1,32 @@
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//===-- HasAVX.s ---------------------------------------*- x86 Assembly -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#if defined (__i386__) || defined (__x86_64__)
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.globl _HasAVX
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_HasAVX:
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mov $1, %eax
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cpuid
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and $0x018000000, %ecx
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cmp $0x018000000, %ecx
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jne not_supported
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mov $0, %ecx
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.byte 0x0f, 0x01, 0xd0 // xgetbv, for those assemblers that don't know it
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and $0x06, %eax
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cmp $0x06, %eax
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jne not_supported
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mov $1, %eax
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jmp done
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not_supported:
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mov $0, %eax
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done:
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ret
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#endif
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@ -330,7 +330,7 @@ DNBArchImplI386::GetFPUState(bool force)
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{
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if (DEBUG_FPU_REGS)
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{
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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{
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m_state.context.fpu.avx.__fpu_reserved[0] = -1;
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m_state.context.fpu.avx.__fpu_reserved[1] = -1;
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@ -460,7 +460,7 @@ DNBArchImplI386::GetFPUState(bool force)
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}
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else
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{
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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{
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mach_msg_type_number_t count = e_regSetWordSizeAVX;
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m_state.SetError(e_regSetFPU, Read, ::thread_get_state(m_thread->ThreadID(), __i386_AVX_STATE, (thread_state_t)&m_state.context.fpu.avx, &count));
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@ -503,7 +503,7 @@ DNBArchImplI386::SetFPUState()
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}
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else
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{
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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m_state.SetError(e_regSetFPU, Write, ::thread_set_state(m_thread->ThreadID(), __i386_AVX_STATE, (thread_state_t)&m_state.context.fpu.avx, e_regSetWordSizeAVX));
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else
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m_state.SetError(e_regSetFPU, Write, ::thread_set_state(m_thread->ThreadID(), __i386_FLOAT_STATE, (thread_state_t)&m_state.context.fpu.no_avx, e_regSetWordSizeFPR));
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@ -813,7 +813,7 @@ const DNBRegisterSetInfo *
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DNBArchImplI386::GetRegisterSetInfo(nub_size_t *num_reg_sets)
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{
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*num_reg_sets = k_num_register_sets;
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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return g_reg_sets_avx;
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else
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return g_reg_sets_no_avx;
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@ -886,7 +886,7 @@ DNBArchImplI386::GetRegisterValue(int set, int reg, DNBRegisterValue *value)
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break;
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case e_regSetFPU:
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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{
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switch (reg)
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{
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@ -1033,7 +1033,7 @@ DNBArchImplI386::SetRegisterValue(int set, int reg, const DNBRegisterValue *valu
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break;
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case e_regSetFPU:
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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{
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switch (reg)
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{
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@ -17,6 +17,7 @@
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#if defined (__i386__) || defined (__x86_64__)
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#include "DNBArch.h"
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#include "../HasAVX.h"
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#include "MachRegisterStatesI386.h"
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class MachThread;
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@ -199,10 +200,10 @@ protected:
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GetRegisterSetInfo(nub_size_t *num_reg_sets);
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static bool
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HasAVX()
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CPUHasAVX()
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{
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if (s_has_avx == kAVXUnknown)
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s_has_avx = kAVXNotPresent;
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s_has_avx = (::HasAVX() ? kAVXPresent : kAVXNotPresent);
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return (s_has_avx == kAVXPresent);
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}
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if (force || m_state.GetError(e_regSetFPU, Read))
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{
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if (DEBUG_FPU_REGS) {
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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{
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m_state.context.fpu.avx.__fpu_reserved[0] = -1;
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m_state.context.fpu.avx.__fpu_reserved[1] = -1;
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@ -365,7 +365,7 @@ DNBArchImplX86_64::GetFPUState(bool force)
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}
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else
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{
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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{
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mach_msg_type_number_t count = e_regSetWordSizeAVX;
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m_state.SetError(e_regSetFPU, Read, ::thread_get_state(m_thread->ThreadID(), __x86_64_AVX_STATE, (thread_state_t)&m_state.context.fpu.avx, &count));
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@ -427,7 +427,7 @@ DNBArchImplX86_64::SetFPUState()
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}
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else
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{
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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{
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m_state.SetError(e_regSetFPU, Write, ::thread_set_state(m_thread->ThreadID(), __x86_64_AVX_STATE, (thread_state_t)&m_state.context.fpu.avx, e_regSetWordSizeAVX));
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return m_state.GetError(e_regSetFPU, Write);
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@ -1013,7 +1013,7 @@ DNBArchImplX86_64::GetRegisterSetInfo(nub_size_t *num_reg_sets)
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{
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*num_reg_sets = k_num_register_sets;
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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return g_reg_sets_avx;
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else
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return g_reg_sets_no_avx;
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@ -1085,7 +1085,7 @@ DNBArchImplX86_64::GetRegisterValue(int set, int reg, DNBRegisterValue *value)
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break;
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case e_regSetFPU:
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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{
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switch (reg)
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{
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@ -1264,7 +1264,7 @@ DNBArchImplX86_64::SetRegisterValue(int set, int reg, const DNBRegisterValue *va
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break;
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case e_regSetFPU:
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if (HasAVX() || FORCE_AVX_REGS)
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if (CPUHasAVX() || FORCE_AVX_REGS)
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{
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switch (reg)
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{
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#if defined (__i386__) || defined (__x86_64__)
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#include "DNBArch.h"
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#include "../HasAVX.h"
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#include "MachRegisterStatesX86_64.h"
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class MachThread;
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@ -206,10 +207,10 @@ protected:
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GetRegisterSetInfo(nub_size_t *num_reg_sets);
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static bool
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HasAVX()
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CPUHasAVX()
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{
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if (s_has_avx == kAVXUnknown)
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s_has_avx = kAVXNotPresent;
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s_has_avx = (::HasAVX() ? kAVXPresent : kAVXNotPresent);
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return (s_has_avx == kAVXPresent);
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}
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