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If the target says that an extending load is not legal, regardless of whether
it involves specific floating-point types, legalize should expand an extending load to a non-extending load followed by a separate extend operation. For example, we currently expand SEXTLOAD to EXTLOAD+SIGN_EXTEND_INREG (and assert that EXTLOAD should always be supported). Now we can expand that to LOAD+SIGN_EXTEND. This is needed to allow vector SIGN_EXTEND and ZERO_EXTEND to be used for NEON. llvm-svn: 111586
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@ -1314,17 +1314,22 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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}
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break;
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case TargetLowering::Expand:
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// f64 = EXTLOAD f32 should expand to LOAD, FP_EXTEND
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// f128 = EXTLOAD {f32,f64} too
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if ((SrcVT == MVT::f32 && (Node->getValueType(0) == MVT::f64 ||
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Node->getValueType(0) == MVT::f128)) ||
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(SrcVT == MVT::f64 && Node->getValueType(0) == MVT::f128)) {
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if (!TLI.isLoadExtLegal(ISD::EXTLOAD, SrcVT)) {
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SDValue Load = DAG.getLoad(SrcVT, dl, Tmp1, Tmp2, LD->getSrcValue(),
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LD->getSrcValueOffset(),
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LD->isVolatile(), LD->isNonTemporal(),
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LD->getAlignment());
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Result = DAG.getNode(ISD::FP_EXTEND, dl,
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Node->getValueType(0), Load);
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unsigned ExtendOp;
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switch (ExtType) {
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case ISD::EXTLOAD:
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ExtendOp = (SrcVT.isFloatingPoint() ?
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ISD::FP_EXTEND : ISD::ANY_EXTEND);
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break;
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case ISD::SEXTLOAD: ExtendOp = ISD::SIGN_EXTEND; break;
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case ISD::ZEXTLOAD: ExtendOp = ISD::ZERO_EXTEND; break;
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default: assert(0 && "Unexpected extend load type!");
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}
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Result = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load);
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Tmp1 = LegalizeOp(Result); // Relegalize new nodes.
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Tmp2 = LegalizeOp(Load.getValue(1));
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break;
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