If the target says that an extending load is not legal, regardless of whether

it involves specific floating-point types, legalize should expand an
extending load to a non-extending load followed by a separate extend operation.
For example, we currently expand SEXTLOAD to EXTLOAD+SIGN_EXTEND_INREG (and
assert that EXTLOAD should always be supported).  Now we can expand that to
LOAD+SIGN_EXTEND.  This is needed to allow vector SIGN_EXTEND and ZERO_EXTEND
to be used for NEON.

llvm-svn: 111586
This commit is contained in:
Bob Wilson 2010-08-19 23:52:39 +00:00
parent 56e56323c8
commit c56fef4eac

View File

@ -1314,17 +1314,22 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
}
break;
case TargetLowering::Expand:
// f64 = EXTLOAD f32 should expand to LOAD, FP_EXTEND
// f128 = EXTLOAD {f32,f64} too
if ((SrcVT == MVT::f32 && (Node->getValueType(0) == MVT::f64 ||
Node->getValueType(0) == MVT::f128)) ||
(SrcVT == MVT::f64 && Node->getValueType(0) == MVT::f128)) {
if (!TLI.isLoadExtLegal(ISD::EXTLOAD, SrcVT)) {
SDValue Load = DAG.getLoad(SrcVT, dl, Tmp1, Tmp2, LD->getSrcValue(),
LD->getSrcValueOffset(),
LD->isVolatile(), LD->isNonTemporal(),
LD->getAlignment());
Result = DAG.getNode(ISD::FP_EXTEND, dl,
Node->getValueType(0), Load);
unsigned ExtendOp;
switch (ExtType) {
case ISD::EXTLOAD:
ExtendOp = (SrcVT.isFloatingPoint() ?
ISD::FP_EXTEND : ISD::ANY_EXTEND);
break;
case ISD::SEXTLOAD: ExtendOp = ISD::SIGN_EXTEND; break;
case ISD::ZEXTLOAD: ExtendOp = ISD::ZERO_EXTEND; break;
default: assert(0 && "Unexpected extend load type!");
}
Result = DAG.getNode(ExtendOp, dl, Node->getValueType(0), Load);
Tmp1 = LegalizeOp(Result); // Relegalize new nodes.
Tmp2 = LegalizeOp(Load.getValue(1));
break;