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[COFF] Implement the remaining ARM64 relocations
Now only IMAGE_REL_ARM64_ABSOLUTE and IMAGE_REL_ARM64_TOKEN are unhandled. Also add range checks for the existing BRANCH26 relocation. Differential Revision: https://reviews.llvm.org/D46354 llvm-svn: 331505
This commit is contained in:
Martin Storsjo
parent
665c7a4479
commit
cc80776eff
@ -181,11 +181,11 @@ void SectionChunk::applyRelARM(uint8_t *Off, uint16_t Type, OutputSection *OS,
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// Interpret the existing immediate value as a byte offset to the
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// target symbol, then update the instruction with the immediate as
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// the page offset from the current instruction to the target.
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static void applyArm64Addr(uint8_t *Off, uint64_t S, uint64_t P) {
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static void applyArm64Addr(uint8_t *Off, uint64_t S, uint64_t P, int Shift) {
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uint32_t Orig = read32le(Off);
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uint64_t Imm = ((Orig >> 29) & 0x3) | ((Orig >> 3) & 0x1FFFFC);
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S += Imm;
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Imm = (S >> 12) - (P >> 12);
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Imm = (S >> Shift) - (P >> Shift);
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uint32_t ImmLo = (Imm & 0x3) << 29;
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uint32_t ImmHi = (Imm & 0x1FFFFC) << 3;
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uint64_t Mask = (0x3 << 29) | (0x1FFFFC << 3);
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@ -247,13 +247,34 @@ static void applySecRelLdr(const SectionChunk *Sec, uint8_t *Off,
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applyArm64Ldr(Off, (S - OS->getRVA()) & 0xfff);
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}
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static void applyArm64Branch26(uint8_t *Off, int64_t V) {
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if (!isInt<28>(V))
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fatal("relocation out of range");
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or32(Off, (V & 0x0FFFFFFC) >> 2);
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}
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static void applyArm64Branch19(uint8_t *Off, int64_t V) {
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if (!isInt<21>(V))
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fatal("relocation out of range");
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or32(Off, (V & 0x001FFFFC) << 3);
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}
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static void applyArm64Branch14(uint8_t *Off, int64_t V) {
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if (!isInt<16>(V))
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fatal("relocation out of range");
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or32(Off, (V & 0x0000FFFC) << 3);
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}
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void SectionChunk::applyRelARM64(uint8_t *Off, uint16_t Type, OutputSection *OS,
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uint64_t S, uint64_t P) const {
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switch (Type) {
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case IMAGE_REL_ARM64_PAGEBASE_REL21: applyArm64Addr(Off, S, P); break;
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case IMAGE_REL_ARM64_PAGEBASE_REL21: applyArm64Addr(Off, S, P, 12); break;
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case IMAGE_REL_ARM64_REL21: applyArm64Addr(Off, S, P, 0); break;
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case IMAGE_REL_ARM64_PAGEOFFSET_12A: applyArm64Imm(Off, S & 0xfff, 0); break;
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case IMAGE_REL_ARM64_PAGEOFFSET_12L: applyArm64Ldr(Off, S & 0xfff); break;
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case IMAGE_REL_ARM64_BRANCH26: or32(Off, ((S - P) & 0x0FFFFFFC) >> 2); break;
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case IMAGE_REL_ARM64_BRANCH26: applyArm64Branch26(Off, S - P); break;
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case IMAGE_REL_ARM64_BRANCH19: applyArm64Branch19(Off, S - P); break;
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case IMAGE_REL_ARM64_BRANCH14: applyArm64Branch14(Off, S - P); break;
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case IMAGE_REL_ARM64_ADDR32: add32(Off, S + Config->ImageBase); break;
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case IMAGE_REL_ARM64_ADDR32NB: add32(Off, S); break;
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case IMAGE_REL_ARM64_ADDR64: add64(Off, S + Config->ImageBase); break;
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@ -261,6 +282,7 @@ void SectionChunk::applyRelARM64(uint8_t *Off, uint16_t Type, OutputSection *OS,
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case IMAGE_REL_ARM64_SECREL_LOW12A: applySecRelLow12A(this, Off, OS, S); break;
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case IMAGE_REL_ARM64_SECREL_HIGH12A: applySecRelHigh12A(this, Off, OS, S); break;
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case IMAGE_REL_ARM64_SECREL_LOW12L: applySecRelLdr(this, Off, OS, S); break;
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case IMAGE_REL_ARM64_SECTION: applySecIdx(Off, OS); break;
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default:
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fatal("unsupported relocation type 0x" + Twine::utohexstr(Type));
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}
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@ -471,7 +493,7 @@ void ImportThunkChunkARM::writeTo(uint8_t *Buf) const {
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void ImportThunkChunkARM64::writeTo(uint8_t *Buf) const {
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int64_t Off = ImpSymbol->getRVA() & 0xfff;
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memcpy(Buf + OutputSectionOff, ImportThunkARM64, sizeof(ImportThunkARM64));
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applyArm64Addr(Buf + OutputSectionOff, ImpSymbol->getRVA(), RVA);
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applyArm64Addr(Buf + OutputSectionOff, ImpSymbol->getRVA(), RVA, 12);
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applyArm64Ldr(Buf + OutputSectionOff + 4, Off);
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}
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6
lld/test/COFF/Inputs/far-arm64-abs.s
Normal file
6
lld/test/COFF/Inputs/far-arm64-abs.s
Normal file
@ -0,0 +1,6 @@
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.global too_far26
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.global too_far19
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.global too_far14
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too_far26 = 0x08011000
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too_far19 = 0x00111000
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too_far14 = 0x00021000
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16
lld/test/COFF/arm64-branch-range.test
Normal file
16
lld/test/COFF/arm64-branch-range.test
Normal file
@ -0,0 +1,16 @@
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// REQUIRES: aarch64
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// RUN: echo -e '.globl _start\n _start:\n bl too_far26\n' > %t.main26.s
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// RUN: echo -e '.globl _start\n _start:\n b.ne too_far19\n' > %t.main19.s
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// RUN: echo -e '.globl _start\n _start:\n tbz x0, #0, too_far14\n' > %t.main14.s
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// RUN: llvm-mc -filetype=obj -triple=aarch64-windows %t.main26.s -o %t.main26.obj
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// RUN: llvm-mc -filetype=obj -triple=aarch64-windows %t.main19.s -o %t.main19.obj
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// RUN: llvm-mc -filetype=obj -triple=aarch64-windows %t.main14.s -o %t.main14.obj
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// RUN: llvm-mc -filetype=obj -triple=aarch64-windows %S/Inputs/far-arm64-abs.s -o %t.far.obj
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// RUN: not lld-link -base:0x10000 -entry:_start -subsystem:console %t.main26.obj %t.far.obj -out:%t.exe 2>&1 | FileCheck %s
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// RUN: not lld-link -base:0x10000 -entry:_start -subsystem:console %t.main19.obj %t.far.obj -out:%t.exe 2>&1 | FileCheck %s
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// RUN: not lld-link -base:0x10000 -entry:_start -subsystem:console %t.main14.obj %t.far.obj -out:%t.exe 2>&1 | FileCheck %s
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// CHECK: relocation out of range
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@ -41,12 +41,16 @@
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# BEFORE: 80: 00 00 00 91 add x0, x0, #0
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# BEFORE: 84: 00 00 40 91 add x0, x0, #0, lsl #12
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# BEFORE: 88: 00 00 40 f9 ldr x0, [x0]
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# BEFORE: 8c: 01 00 00 00 <unknown>
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# BEFORE: 90: 20 1a 09 30 adr x0, #74565
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# BEFORE: 94: 01 00 00 54 b.ne #0
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# BEFORE: 98: 00 00 00 36 tbz w0, #0, #0
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# AFTER: Disassembly of section .text:
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# AFTER: 140001000: fe 0f 1f f8 str x30, [sp, #-16]!
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# AFTER: 140001004: 00 00 00 b0 adrp x0, #4096
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# AFTER: 140001008: 00 18 00 91 add x0, x0, #6
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# AFTER: 14000100c: 20 00 00 94 bl #128
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# AFTER: 14000100c: 24 00 00 94 bl #144
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# AFTER: 140001010: 00 21 40 39 ldrb w0, [x8, #8]
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# AFTER: 140001014: 00 11 40 79 ldrh w0, [x8, #8]
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# AFTER: 140001018: 00 09 40 b9 ldr w0, [x8, #8]
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@ -78,9 +82,13 @@
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# AFTER: 140001080: 00 20 0e 91 add x0, x0, #904
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# AFTER: 140001084: 00 04 40 91 add x0, x0, #1, lsl #12
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# AFTER: 140001088: 00 c4 41 f9 ldr x0, [x0, #904]
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# AFTER: 14000108c: 10 00 00 b0 adrp x16, #4096
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# AFTER: 140001090: 10 2a 40 f9 ldr x16, [x16, #80]
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# AFTER: 140001094: 00 02 1f d6 br x16
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# AFTER: 14000108c: 03 00 00 00 <unknown>
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# AFTER: 140001090: e0 95 09 30 adr x0, #78525
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# AFTER: 140001094: 41 00 00 54 b.ne #8
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# AFTER: 140001098: 20 00 00 36 tbz w0, #0, #4
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# AFTER: 14000109c: 10 00 00 b0 adrp x16, #4096
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# AFTER: 1400010a0: 10 2a 40 f9 ldr x16, [x16, #80]
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# AFTER: 1400010a4: 00 02 1f d6 br x16
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--- !COFF
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header:
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@ -90,7 +98,7 @@ sections:
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- Name: .text
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Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
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Alignment: 4
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SectionData: FE0F1FF80000009000080091000000940001403900014079000140B9000140F90001003900010079000100B9000100F90001403D0001407D000140BD000140FD0001C03D0001003D0001007D000100BD000100FD0001803D000540F9201A01B000FC4FF9E0031F2AFE0741F8C0035FD6080000000000000001000000010000000000009100004091000040f9
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SectionData: FE0F1FF80000009000080091000000940001403900014079000140B9000140F90001003900010079000100B9000100F90001403D0001407D000140BD000140FD0001C03D0001003D0001007D000100BD000100FD0001803D000540F9201A01B000FC4FF9E0031F2AFE0741F8C0035FD6080000000000000001000000010000000000009100004091000040f901000000201a09300100005400000036
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Relocations:
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- VirtualAddress: 4
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SymbolName: .Lstr
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@ -182,6 +190,18 @@ sections:
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- VirtualAddress: 136
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SymbolName: .Lglobal5000
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Type: IMAGE_REL_ARM64_SECREL_LOW12L
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- VirtualAddress: 140
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SymbolName: .Lglobal
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Type: IMAGE_REL_ARM64_SECTION
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- VirtualAddress: 144
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SymbolName: .Lglobal
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Type: IMAGE_REL_ARM64_REL21
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- VirtualAddress: 148
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SymbolName: function
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Type: IMAGE_REL_ARM64_BRANCH19
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- VirtualAddress: 152
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SymbolName: function
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Type: IMAGE_REL_ARM64_BRANCH14
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- Name: .data
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Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_READ, IMAGE_SCN_MEM_WRITE ]
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Alignment: 4
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