[Debug] Look through bitcasts to find argument registers

On targets where f32 is not legal, we have to look through a BITCAST SDNode to
find the register that an argument is stored in when emitting debug info, or we
will not be able to emit a DW_AT_location for it.

Differential Revision: http://reviews.llvm.org/D13005

llvm-svn: 250056
This commit is contained in:
Oliver Stannard 2015-10-12 15:52:36 +00:00
parent 1c42afcbdc
commit cca893ffac
2 changed files with 58 additions and 19 deletions

View File

@ -4185,22 +4185,20 @@ static SDValue ExpandPowI(SDLoc DL, SDValue LHS, SDValue RHS,
return DAG.getNode(ISD::FPOWI, DL, LHS.getValueType(), LHS, RHS);
}
// getTruncatedArgReg - Find underlying register used for an truncated
// argument.
static unsigned getTruncatedArgReg(const SDValue &N) {
if (N.getOpcode() != ISD::TRUNCATE)
// getUnderlyingArgReg - Find underlying register used for a truncated or
// bitcasted argument.
static unsigned getUnderlyingArgReg(const SDValue &N) {
switch (N.getOpcode()) {
case ISD::CopyFromReg:
return cast<RegisterSDNode>(N.getOperand(1))->getReg();
case ISD::BITCAST:
case ISD::AssertZext:
case ISD::AssertSext:
case ISD::TRUNCATE:
return getUnderlyingArgReg(N.getOperand(0));
default:
return 0;
const SDValue &Ext = N.getOperand(0);
if (Ext.getOpcode() == ISD::AssertZext ||
Ext.getOpcode() == ISD::AssertSext) {
const SDValue &CFR = Ext.getOperand(0);
if (CFR.getOpcode() == ISD::CopyFromReg)
return cast<RegisterSDNode>(CFR.getOperand(1))->getReg();
if (CFR.getOpcode() == ISD::TRUNCATE)
return getTruncatedArgReg(CFR);
}
return 0;
}
/// EmitFuncArgumentDbgValue - If the DbgValueInst is a dbg_value of a function
@ -4228,11 +4226,7 @@ bool SelectionDAGBuilder::EmitFuncArgumentDbgValue(
Op = MachineOperand::CreateFI(FI);
if (!Op && N.getNode()) {
unsigned Reg;
if (N.getOpcode() == ISD::CopyFromReg)
Reg = cast<RegisterSDNode>(N.getOperand(1))->getReg();
else
Reg = getTruncatedArgReg(N);
unsigned Reg = getUnderlyingArgReg(N);
if (Reg && TargetRegisterInfo::isVirtualRegister(Reg)) {
MachineRegisterInfo &RegInfo = MF.getRegInfo();
unsigned PR = RegInfo.getLiveInPhysReg(Reg);

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@ -0,0 +1,45 @@
; RUN: %llc_dwarf -filetype=obj -mattr=+vfp2 -float-abi=hard < %s | llvm-dwarfdump -debug-dump=info - | FileCheck %s
; RUN: %llc_dwarf -filetype=obj -mattr=-vfp2 -float-abi=soft < %s | llvm-dwarfdump -debug-dump=info - | FileCheck %s
; REQUIRES: object-emission
; Generated by clang -O1 -g from the following C source:
; float foo(float p) {
; return p;
; }
; When using the soft-float calling convention, we have to look through a
; bitcast to find the register which contains the argument.
; CHECK: 0x{{[0-9a-f]*}}: DW_TAG_formal_parameter
; CHECK-NEXT: DW_AT_location
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "armv7--none-eabi"
define float @foo(float %p) {
entry:
tail call void @llvm.dbg.value(metadata float %p, i64 0, metadata !9, metadata !15), !dbg !16
ret float %p, !dbg !18
}
declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!10, !11}
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.8.0", isOptimized: true, runtimeVersion: 0, emissionKind: 1, enums: !2, subprograms: !3)
!1 = !DIFile(filename: "test.c", directory: "")
!2 = !{}
!3 = !{!4}
!4 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !5, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: true, function: float (float)* @foo, variables: !8)
!5 = !DISubroutineType(types: !6)
!6 = !{!7, !7}
!7 = !DIBasicType(name: "float", size: 32, align: 32, encoding: DW_ATE_float)
!8 = !{!9}
!9 = !DILocalVariable(name: "p", arg: 1, scope: !4, file: !1, line: 1, type: !7)
!10 = !{i32 2, !"Dwarf Version", i32 4}
!11 = !{i32 2, !"Debug Info Version", i32 3}
!15 = !DIExpression()
!16 = !DILocation(line: 1, column: 17, scope: !4)
!17 = !DILocation(line: 2, column: 12, scope: !4)
!18 = !DILocation(line: 2, column: 3, scope: !4)