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https://github.com/capstone-engine/llvm-capstone.git
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[AggressiveInstCombine] Add test with baseline CHECKs for aggressive inst combine for ICmp instruction.
This commit is contained in:
Ayman Musa
parent
377a1c80e9
commit
cd515a6538
212
llvm/test/Transforms/AggressiveInstCombine/trunc_select_cmp.ll
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212
llvm/test/Transforms/AggressiveInstCombine/trunc_select_cmp.ll
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -aggressive-instcombine -S | FileCheck %s
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; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
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define dso_local i16 @cmp_select_sext_const(i8 %a) {
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; CHECK-LABEL: @cmp_select_sext_const(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], 109
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 109, i32 [[CONV]]
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; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
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; CHECK-NEXT: ret i16 [[CONV4]]
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;
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entry:
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%conv = sext i8 %a to i32
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%cmp = icmp slt i32 %conv, 109
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%cond = select i1 %cmp, i32 109, i32 %conv
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%conv4 = trunc i32 %cond to i16
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ret i16 %conv4
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}
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define dso_local i16 @cmp_select_sext(i8 %a, i8 %b) {
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; CHECK-LABEL: @cmp_select_sext(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
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; CHECK-NEXT: [[CONV2:%.*]] = sext i8 [[B:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
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; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
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; CHECK-NEXT: ret i16 [[CONV4]]
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;
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entry:
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%conv = sext i8 %a to i32
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%conv2 = sext i8 %b to i32
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%cmp = icmp slt i32 %conv, %conv2
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%cond = select i1 %cmp, i32 %conv2, i32 %conv
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%conv4 = trunc i32 %cond to i16
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ret i16 %conv4
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}
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define dso_local i16 @cmp_select_zext(i8 %a, i8 %b) {
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; CHECK-LABEL: @cmp_select_zext(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
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; CHECK-NEXT: [[CONV2:%.*]] = zext i8 [[B:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
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; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
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; CHECK-NEXT: ret i16 [[CONV4]]
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;
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entry:
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%conv = zext i8 %a to i32
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%conv2 = zext i8 %b to i32
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%cmp = icmp slt i32 %conv, %conv2
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%cond = select i1 %cmp, i32 %conv2, i32 %conv
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%conv4 = trunc i32 %cond to i16
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ret i16 %conv4
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}
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define dso_local i16 @cmp_select_zext_sext(i8 %a, i8 %b) {
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; CHECK-LABEL: @cmp_select_zext_sext(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
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; CHECK-NEXT: [[CONV2:%.*]] = sext i8 [[B:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
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; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
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; CHECK-NEXT: ret i16 [[CONV4]]
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;
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entry:
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%conv = zext i8 %a to i32
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%conv2 = sext i8 %b to i32
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%cmp = icmp slt i32 %conv, %conv2
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%cond = select i1 %cmp, i32 %conv2, i32 %conv
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%conv4 = trunc i32 %cond to i16
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ret i16 %conv4
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}
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define dso_local i16 @cmp_select_zext_sext_diffOrigTy(i8 %a, i16 %b) {
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; CHECK-LABEL: @cmp_select_zext_sext_diffOrigTy(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
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; CHECK-NEXT: [[CONV2:%.*]] = sext i16 [[B:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
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; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
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; CHECK-NEXT: ret i16 [[CONV4]]
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;
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entry:
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%conv = zext i8 %a to i32
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%conv2 = sext i16 %b to i32
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%cmp = icmp slt i32 %conv, %conv2
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%cond = select i1 %cmp, i32 %conv2, i32 %conv
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%conv4 = trunc i32 %cond to i16
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ret i16 %conv4
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}
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define dso_local i16 @my_abs_sext(i8 %a) {
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; CHECK-LABEL: @my_abs_sext(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], 0
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[CONV]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[CONV]]
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; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
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; CHECK-NEXT: ret i16 [[CONV4]]
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;
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entry:
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%conv = sext i8 %a to i32
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%cmp = icmp slt i32 %conv, 0
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%sub = sub nsw i32 0, %conv
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%cond = select i1 %cmp, i32 %sub, i32 %conv
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%conv4 = trunc i32 %cond to i16
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ret i16 %conv4
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}
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define dso_local i16 @my_abs_zext(i8 %a) {
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; CHECK-LABEL: @my_abs_zext(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], 0
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[CONV]]
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[CONV]]
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; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
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; CHECK-NEXT: ret i16 [[CONV4]]
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;
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entry:
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%conv = zext i8 %a to i32
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%cmp = icmp slt i32 %conv, 0
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%sub = sub nsw i32 0, %conv
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%cond = select i1 %cmp, i32 %sub, i32 %conv
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%conv4 = trunc i32 %cond to i16
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ret i16 %conv4
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}
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define dso_local i16 @select_sext(i8 %a, i1 %cond) {
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; CHECK-LABEL: @select_sext(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i16
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; CHECK-NEXT: [[SUB:%.*]] = sub i16 0, [[CONV]]
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i16 [[SUB]], i16 [[CONV]]
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; CHECK-NEXT: ret i16 [[SEL]]
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;
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entry:
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%conv = sext i8 %a to i32
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%sub = sub nsw i32 0, %conv
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%sel = select i1 %cond, i32 %sub, i32 %conv
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%conv4 = trunc i32 %sel to i16
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ret i16 %conv4
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}
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define dso_local i16 @select_zext(i8 %a, i1 %cond) {
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; CHECK-LABEL: @select_zext(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i16
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; CHECK-NEXT: [[SUB:%.*]] = sub i16 0, [[CONV]]
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i16 [[SUB]], i16 [[CONV]]
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; CHECK-NEXT: ret i16 [[SEL]]
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;
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entry:
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%conv = zext i8 %a to i32
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%sub = sub nsw i32 0, %conv
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%sel = select i1 %cond, i32 %sub, i32 %conv
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%conv4 = trunc i32 %sel to i16
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ret i16 %conv4
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}
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define i16 @cmp_select_signed_const_i16Const_noTransformation(i8 %a) {
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; CHECK-LABEL: @cmp_select_signed_const_i16Const_noTransformation(
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; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], 32768
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 32768, i32 [[CONV]]
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; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
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; CHECK-NEXT: ret i16 [[CONV4]]
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;
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%conv = sext i8 %a to i32
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%cmp = icmp slt i32 %conv, 32768
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%cond = select i1 %cmp, i32 32768, i32 %conv
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%conv4 = trunc i32 %cond to i16
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ret i16 %conv4
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}
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define i16 @cmp_select_unsigned_const_i16Const(i8 %a) {
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; CHECK-LABEL: @cmp_select_unsigned_const_i16Const(
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; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[CONV]], 32768
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 32768, i32 [[CONV]]
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; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
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; CHECK-NEXT: ret i16 [[CONV4]]
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;
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%conv = zext i8 %a to i32
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%cmp = icmp ult i32 %conv, 32768
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%cond = select i1 %cmp, i32 32768, i32 %conv
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%conv4 = trunc i32 %cond to i16
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ret i16 %conv4
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}
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define i16 @cmp_select_unsigned_const_i16Const_noTransformation(i8 %a) {
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; CHECK-LABEL: @cmp_select_unsigned_const_i16Const_noTransformation(
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; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[CONV]], 65536
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; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 65536, i32 [[CONV]]
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; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
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; CHECK-NEXT: ret i16 [[CONV4]]
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;
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%conv = zext i8 %a to i32
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%cmp = icmp ult i32 %conv, 65536
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%cond = select i1 %cmp, i32 65536, i32 %conv
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%conv4 = trunc i32 %cond to i16
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ret i16 %conv4
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}
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