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[MIR] Fix cyclic dependency of MIR formatter

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Summary:
Move MIR formatter pointer from TargetMachine to TargetInstrInfo to
avoid cyclic dependency between target & codegen.

Reviewers: dsanders, bkramer, arsenm

Subscribers: wdng, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72485
This commit is contained in:
Peng Guo 2020-01-10 11:18:11 +01:00 committed by Benjamin Kramer
parent a1cc19b581
commit cfd8498401
9 changed files with 27 additions and 33 deletions
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4
llvm/include/llvm/CodeGen/MachineMemOperand.h
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@ -26,7 +26,6 @@ namespace llvm {
class FoldingSetNodeID;
class MDNode;
class MIRFormatter;
class raw_ostream;
class MachineFunction;
class ModuleSlotTracker;
@ -296,8 +295,7 @@ public:
/// @{
void print(raw_ostream &OS, ModuleSlotTracker &MST,
SmallVectorImpl<StringRef> &SSNs, const LLVMContext &Context,
const MachineFrameInfo *MFI, const TargetInstrInfo *TII,
const MIRFormatter *MIRF) const;
const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const;
/// @}
friend bool operator==(const MachineMemOperand &LHS,

8
llvm/include/llvm/CodeGen/TargetInstrInfo.h
View File

@ -1807,6 +1807,14 @@ public:
virtual Optional<ParamLoadedValue> describeLoadedValue(const MachineInstr &MI,
Register Reg) const;
/// Return MIR formatter to format/parse MIR operands. Target can override
/// this virtual function and return target specific MIR formatter.
virtual const MIRFormatter *getMIRFormatter() const {
if (!Formatter.get())
Formatter = std::make_unique<MIRFormatter>();
return Formatter.get();
}
private:
mutable std::unique_ptr<MIRFormatter> Formatter;
unsigned CallFrameSetupOpcode, CallFrameDestroyOpcode;

6
llvm/include/llvm/Target/TargetMachine.h
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@ -33,7 +33,6 @@ class MCInstrInfo;
class MCRegisterInfo;
class MCSubtargetInfo;
class MCSymbol;
class MIRFormatter;
class raw_pwrite_stream;
class PassManagerBuilder;
struct PerFunctionMIParsingState;
@ -95,7 +94,6 @@ protected: // Can only create subclasses.
std::unique_ptr<const MCRegisterInfo> MRI;
std::unique_ptr<const MCInstrInfo> MII;
std::unique_ptr<const MCSubtargetInfo> STI;
std::unique_ptr<const MIRFormatter> MIRF;
unsigned RequireStructuredCFG : 1;
unsigned O0WantsFastISel : 1;
@ -199,10 +197,6 @@ public:
return nullptr;
}
/// Return MIR formatter to format/parse MIR operands. Target can override
/// this virtual function and return target specific MIR formatter.
virtual const MIRFormatter *getMIRFormatter() const { return MIRF.get(); }
bool requiresStructuredCFG() const { return RequireStructuredCFG; }
void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }

6
llvm/lib/CodeGen/MIRParser/MIParser.cpp
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@ -2619,7 +2619,8 @@ bool MIParser::parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
} else
return parseTypedImmediateOperand(Dest);
case MIToken::dot: {
if (const auto *Formatter = MF.getTarget().getMIRFormatter()) {
const auto *TII = MF.getSubtarget().getInstrInfo();
if (const auto *Formatter = TII->getMIRFormatter()) {
return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);
}
LLVM_FALLTHROUGH;
@ -2879,7 +2880,8 @@ bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
break;
case MIToken::kw_custom: {
lex();
if (const auto *Formatter = MF.getTarget().getMIRFormatter()) {
const auto *TII = MF.getSubtarget().getInstrInfo();
if (const auto *Formatter = TII->getMIRFormatter()) {
if (Formatter->parseCustomPseudoSourceValue(
Token.stringValue(), MF, PFS, PSV,
[this](StringRef::iterator Loc, const Twine &Msg) -> bool {

3
llvm/lib/CodeGen/MIRPrinter.cpp
View File

@ -709,7 +709,6 @@ void MIPrinter::print(const MachineInstr &MI) {
const auto *TRI = SubTarget.getRegisterInfo();
assert(TRI && "Expected target register info");
const auto *TII = SubTarget.getInstrInfo();
const auto *MIRF = MF->getTarget().getMIRFormatter();
assert(TII && "Expected target instruction info");
if (MI.isCFIInstruction())
assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
@ -808,7 +807,7 @@ void MIPrinter::print(const MachineInstr &MI) {
for (const auto *Op : MI.memoperands()) {
if (NeedComma)
OS << ", ";
Op->print(OS, MST, SSNs, Context, &MFI, TII, MIRF);
Op->print(OS, MST, SSNs, Context, &MFI, TII);
NeedComma = true;
}
}

9
llvm/lib/CodeGen/MachineInstr.cpp
View File

@ -89,15 +89,13 @@ static void tryToGetTargetInfo(const MachineInstr &MI,
const TargetRegisterInfo *&TRI,
const MachineRegisterInfo *&MRI,
const TargetIntrinsicInfo *&IntrinsicInfo,
const TargetInstrInfo *&TII,
const MIRFormatter *&MIRF) {
const TargetInstrInfo *&TII) {
if (const MachineFunction *MF = getMFIfAvailable(MI)) {
TRI = MF->getSubtarget().getRegisterInfo();
MRI = &MF->getRegInfo();
IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
TII = MF->getSubtarget().getInstrInfo();
MIRF = MF->getTarget().getMIRFormatter();
}
}
@ -1479,8 +1477,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
const TargetRegisterInfo *TRI = nullptr;
const MachineRegisterInfo *MRI = nullptr;
const TargetIntrinsicInfo *IntrinsicInfo = nullptr;
const MIRFormatter *MIRF = nullptr;
tryToGetTargetInfo(*this, TRI, MRI, IntrinsicInfo, TII, MIRF);
tryToGetTargetInfo(*this, TRI, MRI, IntrinsicInfo, TII);
if (isCFIInstruction())
assert(getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
@ -1740,7 +1737,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
for (const MachineMemOperand *Op : memoperands()) {
if (NeedComma)
OS << ", ";
Op->print(OS, MST, SSNs, *Context, MFI, TII, MIRF);
Op->print(OS, MST, SSNs, *Context, MFI, TII);
NeedComma = true;
}
}

16
llvm/lib/CodeGen/MachineOperand.cpp
View File

@ -784,8 +784,11 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
}
case MachineOperand::MO_Immediate: {
const MIRFormatter *Formatter = nullptr;
if (const MachineFunction *MF = getMFIfAvailable(*this))
Formatter = MF->getTarget().getMIRFormatter();
if (const MachineFunction *MF = getMFIfAvailable(*this)) {
const auto *TII = MF->getSubtarget().getInstrInfo();
assert(TII && "expected instruction info");
Formatter = TII->getMIRFormatter();
}
if (Formatter)
Formatter->printImm(OS, *getParent(), OpIdx, getImm());
else
@ -1057,8 +1060,7 @@ void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
SmallVectorImpl<StringRef> &SSNs,
const LLVMContext &Context,
const MachineFrameInfo *MFI,
const TargetInstrInfo *TII,
const MIRFormatter* MIRF) const {
const TargetInstrInfo *TII) const {
OS << '(';
if (isVolatile())
OS << "volatile ";
@ -1133,15 +1135,13 @@ void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
OS, cast<ExternalSymbolPseudoSourceValue>(PVal)->getSymbol());
break;
default: {
const MIRFormatter *Formatter = TII->getMIRFormatter();
// FIXME: This is not necessarily the correct MIR serialization format for
// a custom pseudo source value, but at least it allows
// -print-machineinstrs to work on a target with custom pseudo source
// values.
OS << "custom \"";
if (MIRF)
MIRF->printCustomPseudoSourceValue(OS, MST, *PVal);
else
PVal->printCustom(OS);
Formatter->printCustomPseudoSourceValue(OS, MST, *PVal);
OS << '\"';
break;
}

3
llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
View File

@ -480,8 +480,7 @@ static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
if (MF)
MST.incorporateFunction(MF->getFunction());
SmallVector<StringRef, 0> SSNs;
MMO.print(OS, MST, SSNs, Ctx, MFI, TII,
MF ? MF->getTarget().getMIRFormatter() : nullptr);
MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
}
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,

5
llvm/lib/Target/TargetMachine.cpp
View File

@ -12,7 +12,6 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/CodeGen/MIRFormatter.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalAlias.h"
#include "llvm/IR/GlobalValue.h"
@ -38,9 +37,7 @@ TargetMachine::TargetMachine(const Target &T, StringRef DataLayoutString,
: TheTarget(T), DL(DataLayoutString), TargetTriple(TT), TargetCPU(CPU),
TargetFS(FS), AsmInfo(nullptr), MRI(nullptr), MII(nullptr), STI(nullptr),
RequireStructuredCFG(false), O0WantsFastISel(false),
DefaultOptions(Options), Options(Options) {
MIRF = std::make_unique<MIRFormatter>();
}
DefaultOptions(Options), Options(Options) {}
TargetMachine::~TargetMachine() = default;