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AMDGPU: Remove code to create pointer bitcasts in atomicrmw expansion
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3e16167c14
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@ -13351,37 +13351,36 @@ void SITargetLowering::emitExpandAtomicRMW(AtomicRMWInst *AI) const {
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assert(AI->getOperation() == AtomicRMWInst::FAdd &&
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"only fadd is supported for now");
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// Given: atomicrmw fadd float* %addr, float %val ordering
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// Given: atomicrmw fadd ptr %addr, float %val ordering
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//
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// With this expansion we produce the following code:
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// [...]
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// %int8ptr = bitcast float* %addr to i8*
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// br label %atomicrmw.check.shared
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//
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// atomicrmw.check.shared:
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// %is.shared = call i1 @llvm.amdgcn.is.shared(i8* %int8ptr)
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// %is.shared = call i1 @llvm.amdgcn.is.shared(ptr %addr)
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// br i1 %is.shared, label %atomicrmw.shared, label %atomicrmw.check.private
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//
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// atomicrmw.shared:
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// %cast.shared = addrspacecast float* %addr to float addrspace(3)*
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// %loaded.shared = atomicrmw fadd float addrspace(3)* %cast.shared,
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// %cast.shared = addrspacecast ptr %addr to ptr addrspace(3)
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// %loaded.shared = atomicrmw fadd ptr addrspace(3) %cast.shared,
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// float %val ordering
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// br label %atomicrmw.phi
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//
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// atomicrmw.check.private:
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// %is.private = call i1 @llvm.amdgcn.is.private(i8* %int8ptr)
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// %is.private = call i1 @llvm.amdgcn.is.private(ptr %int8ptr)
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// br i1 %is.private, label %atomicrmw.private, label %atomicrmw.global
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//
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// atomicrmw.private:
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// %cast.private = addrspacecast float* %addr to float addrspace(5)*
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// %loaded.private = load float, float addrspace(5)* %cast.private
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// %cast.private = addrspacecast ptr %addr to ptr addrspace(5)
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// %loaded.private = load float, ptr addrspace(5) %cast.private
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// %val.new = fadd float %loaded.private, %val
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// store float %val.new, float addrspace(5)* %cast.private
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// store float %val.new, ptr addrspace(5) %cast.private
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// br label %atomicrmw.phi
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//
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// atomicrmw.global:
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// %cast.global = addrspacecast float* %addr to float addrspace(1)*
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// %loaded.global = atomicrmw fadd float addrspace(1)* %cast.global,
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// %cast.global = addrspacecast ptr %addr to ptr addrspace(1)
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// %loaded.global = atomicrmw fadd ptr addrspace(1) %cast.global,
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// float %val ordering
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// br label %atomicrmw.phi
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//
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@ -13430,12 +13429,11 @@ void SITargetLowering::emitExpandAtomicRMW(AtomicRMWInst *AI) const {
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std::prev(BB->end())->eraseFromParent();
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Builder.SetInsertPoint(BB);
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Value *Int8Ptr = Builder.CreateBitCast(Addr, Builder.getInt8PtrTy());
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Builder.CreateBr(CheckSharedBB);
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Builder.SetInsertPoint(CheckSharedBB);
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CallInst *IsShared = Builder.CreateIntrinsic(Intrinsic::amdgcn_is_shared, {},
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{Int8Ptr}, nullptr, "is.shared");
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{Addr}, nullptr, "is.shared");
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Builder.CreateCondBr(IsShared, SharedBB, CheckPrivateBB);
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Builder.SetInsertPoint(SharedBB);
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@ -13447,7 +13445,7 @@ void SITargetLowering::emitExpandAtomicRMW(AtomicRMWInst *AI) const {
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Builder.SetInsertPoint(CheckPrivateBB);
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CallInst *IsPrivate = Builder.CreateIntrinsic(
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Intrinsic::amdgcn_is_private, {}, {Int8Ptr}, nullptr, "is.private");
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Intrinsic::amdgcn_is_private, {}, {Addr}, nullptr, "is.private");
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Builder.CreateCondBr(IsPrivate, PrivateBB, GlobalBB);
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Builder.SetInsertPoint(PrivateBB);
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