From bf6f83ed72f18c698ba48b18be1ab72f25dc818c Mon Sep 17 00:00:00 2001 From: Rot127 Date: Wed, 9 Aug 2023 06:49:33 -0500 Subject: [PATCH] Add support for PS S12 immediates. --- llvm/lib/Target/PowerPC/PPCInstrPairedSingle.td | 3 ++- llvm/utils/TableGen/PrinterCapstone.cpp | 8 +++++++- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/PowerPC/PPCInstrPairedSingle.td b/llvm/lib/Target/PowerPC/PPCInstrPairedSingle.td index 74abd681035f..19c18de43393 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrPairedSingle.td +++ b/llvm/lib/Target/PowerPC/PPCInstrPairedSingle.td @@ -16,12 +16,13 @@ def PPCDispRID12Operand : AsmOperandClass { } def dispRID12 : Operand { + let PrintMethod = "printS12ImmOperand"; let ParserMatchClass = PPCDispRID12Operand; let OperandType = "OPERAND_IMMEDIATE"; } def memrid12 : Operand { // Paired Single displacement where imm is 12 bits. - let PrintMethod = "printMemRegImm"; + let PrintMethod = "printMemRegImmPS"; let MIOperandInfo = (ops dispRID12:$imm, ptr_rc_nor0:$reg); let OperandType = "OPERAND_MEMORY"; } diff --git a/llvm/utils/TableGen/PrinterCapstone.cpp b/llvm/utils/TableGen/PrinterCapstone.cpp index a9e78764eb13..8f8cbb21fe55 100644 --- a/llvm/utils/TableGen/PrinterCapstone.cpp +++ b/llvm/utils/TableGen/PrinterCapstone.cpp @@ -3052,7 +3052,11 @@ void printOpPrintGroupEnum(StringRef const &TargetName, "SVELogicalImm_int16_t", "SVELogicalImm_int32_t", "SVELogicalImm_int64_t", - "ZPRasFPR_128"}; + "ZPRasFPR_128" + }; + static const std::set PPCExceptions = { + "S12ImmOperand", // PS S12 immediates. Used as memory disponent. + }; bool NoExceptions = false; const std::set *Exc; @@ -3060,6 +3064,8 @@ void printOpPrintGroupEnum(StringRef const &TargetName, Exc = &ARMExceptions; else if (TargetName == "AArch64") Exc = &AArch64Exceptions; + else if (TargetName == "PPC") + Exc = &PPCExceptions; else NoExceptions = true;