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https://github.com/capstone-engine/llvm-capstone.git
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This reverts commits r294826 and r294781 as they break linking on powerpc.
Revert "Fix -Wsign-compare - this might not be quite right, but preserves behavior" Revert "[XRay] Implement powerpc64le xray." This reverts commit r294826. This reverts commit r294781. llvm-svn: 294842
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8158816efe
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d8230247c9
@ -175,7 +175,7 @@ set(ALL_SAFESTACK_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM64} ${MIPS32} ${MIPS64})
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set(ALL_CFI_SUPPORTED_ARCH ${X86} ${X86_64} ${MIPS64})
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set(ALL_ESAN_SUPPORTED_ARCH ${X86_64} ${MIPS64})
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set(ALL_SCUDO_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64})
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set(ALL_XRAY_SUPPORTED_ARCH ${X86_64} ${ARM32} ${ARM64} ${PPC64})
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set(ALL_XRAY_SUPPORTED_ARCH ${X86_64} ${ARM32} ${ARM64})
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if(APPLE)
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include(CompilerRTDarwinUtils)
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@ -29,12 +29,6 @@ set(aarch64_SOURCES
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xray_trampoline_AArch64.S
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${XRAY_SOURCES})
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set(powerpc64le_SOURCES
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xray_powerpc64.cc
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xray_trampoline_powerpc64.cc
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xray_trampoline_powerpc64.S
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${XRAY_SOURCES})
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include_directories(..)
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include_directories(../../include)
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@ -116,7 +116,9 @@ XRayLogFlushStatus fdrLoggingFlush() XRAY_NEVER_INSTRUMENT {
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XRayFileHeader Header;
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Header.Version = 1;
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Header.Type = FileTypes::FDR_LOG;
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Header.CycleFrequency = getTSCFrequency();
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auto TSCFrequency = getTSCFrequency();
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Header.CycleFrequency =
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TSCFrequency == -1 ? 0 : static_cast<uint64_t>(TSCFrequency);
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// FIXME: Actually check whether we have 'constant_tsc' and 'nonstop_tsc'
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// before setting the values in the header.
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Header.ConstantTSC = 1;
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@ -86,7 +86,8 @@ static int __xray_OpenLogFile() XRAY_NEVER_INSTRUMENT {
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XRayFileHeader Header;
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Header.Version = 1;
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Header.Type = FileTypes::NAIVE_LOG;
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Header.CycleFrequency = TSCFrequency;
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Header.CycleFrequency =
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TSCFrequency == -1 ? 0 : static_cast<uint64_t>(TSCFrequency);
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// FIXME: Actually check whether we have 'constant_tsc' and 'nonstop_tsc'
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// before setting the values in the header.
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@ -35,8 +35,6 @@ static const int16_t cSledLength = 12;
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static const int16_t cSledLength = 32;
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#elif defined(__arm__)
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static const int16_t cSledLength = 28;
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#elif defined(__powerpc64__)
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static const int16_t cSledLength = 8;
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#else
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#error "Unsupported CPU Architecture"
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#endif /* CPU architecture */
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@ -1,95 +0,0 @@
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//===-- xray_AArch64.cc -----------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of XRay, a dynamic runtime instrumentation system.
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//
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// Implementation of powerpc64 and powerpc64le routines.
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//
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//===----------------------------------------------------------------------===//
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#include "sanitizer_common/sanitizer_common.h"
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#include "xray_defs.h"
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#include "xray_interface_internal.h"
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#include "xray_utils.h"
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#include <atomic>
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#include <cassert>
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#include <cstring>
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#ifndef __LITTLE_ENDIAN__
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#error powerpc64 big endian is not supported for now.
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#endif
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namespace {
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constexpr unsigned long long JumpOverInstNum = 7;
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void clearCache(void *Addr, size_t Len) {
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const size_t LineSize = 32;
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const intptr_t Mask = ~(LineSize - 1);
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const intptr_t StartLine = ((intptr_t)Addr) & Mask;
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const intptr_t EndLine = ((intptr_t)Addr + Len + LineSize - 1) & Mask;
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for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
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asm volatile("dcbf 0, %0" : : "r"(Line));
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asm volatile("sync");
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for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
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asm volatile("icbi 0, %0" : : "r"(Line));
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asm volatile("isync");
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}
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} // namespace
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extern "C" void __clear_cache(void *start, void *end);
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namespace __xray {
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bool patchFunctionEntry(const bool Enable, uint32_t FuncId,
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const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
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if (Enable) {
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// lis 0, FuncId[16..32]
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// li 0, FuncId[0..15]
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*reinterpret_cast<uint64_t *>(Sled.Address) =
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(0x3c000000ull + (FuncId >> 16)) +
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((0x60000000ull + (FuncId & 0xffff)) << 32);
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} else {
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// b +JumpOverInstNum instructions.
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*reinterpret_cast<uint32_t *>(Sled.Address) =
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0x48000000ull + (JumpOverInstNum << 2);
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}
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clearCache(reinterpret_cast<void *>(Sled.Address), 8);
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return true;
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}
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bool patchFunctionExit(const bool Enable, uint32_t FuncId,
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const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
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if (Enable) {
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// lis 0, FuncId[16..32]
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// li 0, FuncId[0..15]
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*reinterpret_cast<uint64_t *>(Sled.Address) =
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(0x3c000000ull + (FuncId >> 16)) +
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((0x60000000ull + (FuncId & 0xffff)) << 32);
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} else {
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// Copy the blr/b instruction after JumpOverInstNum instructions.
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*reinterpret_cast<uint32_t *>(Sled.Address) =
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*(reinterpret_cast<uint32_t *>(Sled.Address) + JumpOverInstNum);
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}
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clearCache(reinterpret_cast<void *>(Sled.Address), 8);
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return true;
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}
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bool patchFunctionTailExit(const bool Enable, const uint32_t FuncId,
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const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
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return patchFunctionExit(Enable, FuncId, Sled);
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}
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// FIXME: Maybe implement this better?
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bool probeRequiredCPUFeatures() XRAY_NEVER_INSTRUMENT { return true; }
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} // namespace __xray
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@ -1,37 +0,0 @@
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//===-- xray_x86_64.inc -----------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of XRay, a dynamic runtime instrumentation system.
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//
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//===----------------------------------------------------------------------===//
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#include <cstdint>
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#include <mutex>
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#include <sys/platform/ppc.h>
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#include "xray_defs.h"
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namespace __xray {
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ALWAYS_INLINE uint64_t readTSC(uint8_t &CPU) XRAY_NEVER_INSTRUMENT {
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CPU = 0;
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return __ppc_get_timebase();
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}
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inline uint64_t getTSCFrequency() XRAY_NEVER_INSTRUMENT {
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static std::mutex M;
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std::lock_guard<std::mutex> Guard(M);
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return __ppc_get_timebase_freq();
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}
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inline bool probeRequiredCPUFeatures() XRAY_NEVER_INSTRUMENT {
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return true;
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}
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} // namespace __xray
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@ -1,171 +0,0 @@
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.text
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.abiversion 2
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.globl __xray_FunctionEntry
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.p2align 4
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__xray_FunctionEntry:
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std 0, 16(1)
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stdu 1, -408(1)
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# Spill r3-r10, f1-f13, and vsr34-vsr45, which are parameter registers.
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# If this appears to be slow, the caller needs to pass in number of generic,
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# floating point, and vector parameters, so that we only spill those live ones.
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std 3, 32(1)
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ld 3, 400(1) # FuncId
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std 4, 40(1)
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std 5, 48(1)
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std 6, 56(1)
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std 7, 64(1)
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std 8, 72(1)
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std 9, 80(1)
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std 10, 88(1)
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addi 4, 1, 96
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stxsdx 1, 0, 4
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addi 4, 1, 104
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stxsdx 2, 0, 4
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addi 4, 1, 112
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stxsdx 3, 0, 4
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addi 4, 1, 120
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stxsdx 4, 0, 4
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addi 4, 1, 128
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stxsdx 5, 0, 4
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addi 4, 1, 136
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stxsdx 6, 0, 4
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addi 4, 1, 144
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stxsdx 7, 0, 4
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addi 4, 1, 152
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stxsdx 8, 0, 4
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addi 4, 1, 160
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stxsdx 9, 0, 4
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addi 4, 1, 168
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stxsdx 10, 0, 4
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addi 4, 1, 176
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stxsdx 11, 0, 4
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addi 4, 1, 184
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stxsdx 12, 0, 4
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addi 4, 1, 192
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stxsdx 13, 0, 4
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addi 4, 1, 200
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stxvd2x 34, 0, 4
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addi 4, 1, 216
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stxvd2x 35, 0, 4
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addi 4, 1, 232
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stxvd2x 36, 0, 4
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addi 4, 1, 248
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stxvd2x 37, 0, 4
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addi 4, 1, 264
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stxvd2x 38, 0, 4
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addi 4, 1, 280
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stxvd2x 39, 0, 4
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addi 4, 1, 296
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stxvd2x 40, 0, 4
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addi 4, 1, 312
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stxvd2x 41, 0, 4
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addi 4, 1, 328
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stxvd2x 42, 0, 4
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addi 4, 1, 344
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stxvd2x 43, 0, 4
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addi 4, 1, 360
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stxvd2x 44, 0, 4
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addi 4, 1, 376
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stxvd2x 45, 0, 4
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std 2, 392(1)
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mflr 0
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std 0, 400(1)
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li 4, 0
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bl _ZN6__xray23CallXRayPatchedFunctionEi13XRayEntryType
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nop
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addi 4, 1, 96
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lxsdx 1, 0, 4
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addi 4, 1, 104
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lxsdx 2, 0, 4
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addi 4, 1, 112
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lxsdx 3, 0, 4
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addi 4, 1, 120
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lxsdx 4, 0, 4
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addi 4, 1, 128
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lxsdx 5, 0, 4
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addi 4, 1, 136
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lxsdx 6, 0, 4
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addi 4, 1, 144
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lxsdx 7, 0, 4
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addi 4, 1, 152
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lxsdx 8, 0, 4
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addi 4, 1, 160
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lxsdx 9, 0, 4
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addi 4, 1, 168
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lxsdx 10, 0, 4
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addi 4, 1, 176
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lxsdx 11, 0, 4
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addi 4, 1, 184
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lxsdx 12, 0, 4
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addi 4, 1, 192
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lxsdx 13, 0, 4
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addi 4, 1, 200
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lxvd2x 34, 0, 4
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addi 4, 1, 216
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lxvd2x 35, 0, 4
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addi 4, 1, 232
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lxvd2x 36, 0, 4
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addi 4, 1, 248
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lxvd2x 37, 0, 4
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addi 4, 1, 264
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lxvd2x 38, 0, 4
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addi 4, 1, 280
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lxvd2x 39, 0, 4
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addi 4, 1, 296
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lxvd2x 40, 0, 4
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addi 4, 1, 312
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lxvd2x 41, 0, 4
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addi 4, 1, 328
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lxvd2x 42, 0, 4
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addi 4, 1, 344
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lxvd2x 43, 0, 4
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addi 4, 1, 360
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lxvd2x 44, 0, 4
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addi 4, 1, 376
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lxvd2x 45, 0, 4
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ld 0, 400(1)
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mtlr 0
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ld 2, 392(1)
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ld 3, 32(1)
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ld 4, 40(1)
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ld 5, 48(1)
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ld 6, 56(1)
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ld 7, 64(1)
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ld 8, 72(1)
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ld 9, 80(1)
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ld 10, 88(1)
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addi 1, 1, 408
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ld 0, 16(1)
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blr
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.globl __xray_FunctionExit
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.p2align 4
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__xray_FunctionExit:
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std 0, 16(1)
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ld 0, -8(1) # FuncId
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stdu 1, -72(1)
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# Spill r3, f1, and vsr34, the return value registers.
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std 3, 32(1)
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mr 3, 0
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addi 4, 1, 40
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stxsdx 1, 0, 4
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addi 4, 1, 48
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stxvd2x 34, 0, 4
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mflr 0
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std 0, 64(1)
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li 4, 1
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bl _ZN6__xray23CallXRayPatchedFunctionEi13XRayEntryType
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nop
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ld 0, 64(1)
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mtlr 0
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ld 3, 32(1)
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addi 4, 1, 40
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lxsdx 1, 0, 4
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addi 4, 1, 48
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lxvd2x 34, 0, 4
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addi 1, 1, 72
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ld 0, 16(1)
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blr
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@ -1,15 +0,0 @@
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#include <atomic>
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#include <xray/xray_interface.h>
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namespace __xray {
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extern std::atomic<void (*)(int32_t, XRayEntryType)> XRayPatchedFunction;
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// Implement this in C++ instead of assembly, to avoid dealing with ToC by hand.
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void CallXRayPatchedFunction(int32_t FuncId, XRayEntryType Type) {
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auto fptr = __xray::XRayPatchedFunction.load();
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if (fptr != nullptr)
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(*fptr)(FuncId, Type);
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}
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} // namespace __xray
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@ -15,8 +15,6 @@
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#if defined(__x86_64__)
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#include "xray_x86_64.inc"
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#elif defined(__powerpc64__)
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#include "xray_powerpc64.inc"
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#elif defined(__arm__) || defined(__aarch64__)
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// Emulated TSC.
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// There is no instruction like RDTSCP in user mode on ARM. ARM's CP15 does
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