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AMDGPU/GlobalISel: Fix missing scc imp-def on scalar and/or/xor
This commit is contained in:
Matt Arsenault
Matt Arsenault
parent
d688a6739d
commit
dff3f8d742
@ -290,6 +290,11 @@ bool AMDGPUInstructionSelector::selectG_AND_OR_XOR(MachineInstr &I) const {
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if (DstRB->getID() == AMDGPU::SGPRRegBankID) {
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unsigned InstOpc = getLogicalBitOpcode(I.getOpcode(), Size > 32);
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I.setDesc(TII.get(InstOpc));
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// Dead implicit-def of scc
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I.addOperand(MachineOperand::CreateReg(AMDGPU::SCC, true, // isDef
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true, // isImp
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false, // isKill
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true)); // isDead
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return constrainSelectedInstRegOperands(I, TII, TRI, RBI);
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}
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@ -55,14 +55,14 @@ body: |
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; WAVE64: liveins: $sgpr0, $sgpr1
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]]
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_AND_B32_]]
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; WAVE32-LABEL: name: and_s1_sgpr_sgpr_sgpr
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; WAVE32: liveins: $sgpr0, $sgpr1
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]]
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE32: S_ENDPGM 0, implicit [[S_AND_B32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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@ -120,14 +120,14 @@ body: |
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; WAVE64: liveins: $sgpr0, $sgpr1
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]]
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_AND_B32_]]
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; WAVE32-LABEL: name: and_s16_sgpr_sgpr_sgpr
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; WAVE32: liveins: $sgpr0, $sgpr1
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]]
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE32: S_ENDPGM 0, implicit [[S_AND_B32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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@ -182,14 +182,14 @@ body: |
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; WAVE64: liveins: $sgpr0, $sgpr1
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]]
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_AND_B32_]]
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; WAVE32-LABEL: name: and_s32_sgpr_sgpr_sgpr
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; WAVE32: liveins: $sgpr0, $sgpr1
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]]
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE32: S_ENDPGM 0, implicit [[S_AND_B32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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@ -211,14 +211,14 @@ body: |
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; WAVE64: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
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; WAVE64: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]]
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; WAVE64: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_AND_B64_]]
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; WAVE32-LABEL: name: and_s64_sgpr_sgpr_sgpr
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; WAVE32: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
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; WAVE32: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]]
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; WAVE32: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE32: S_ENDPGM 0, implicit [[S_AND_B64_]]
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s64) = COPY $sgpr2_sgpr3
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@ -240,14 +240,14 @@ body: |
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; WAVE64: liveins: $sgpr0, $sgpr1
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]]
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_AND_B32_]]
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; WAVE32-LABEL: name: and_v2s16_sgpr_sgpr_sgpr
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; WAVE32: liveins: $sgpr0, $sgpr1
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]]
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE32: S_ENDPGM 0, implicit [[S_AND_B32_]]
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%0:sgpr(<2 x s16>) = COPY $sgpr0
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%1:sgpr(<2 x s16>) = COPY $sgpr1
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@ -269,14 +269,14 @@ body: |
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; WAVE64: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
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; WAVE64: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]]
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; WAVE64: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_AND_B64_]]
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; WAVE32-LABEL: name: and_v2s32_sgpr_sgpr_sgpr
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; WAVE32: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
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; WAVE32: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]]
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; WAVE32: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE32: S_ENDPGM 0, implicit [[S_AND_B64_]]
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%0:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1
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%1:sgpr(<2 x s32>) = COPY $sgpr2_sgpr3
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@ -298,14 +298,14 @@ body: |
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; WAVE64: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
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; WAVE64: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]]
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; WAVE64: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_AND_B64_]]
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; WAVE32-LABEL: name: and_v4s16_sgpr_sgpr_sgpr
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; WAVE32: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
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; WAVE32: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]]
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; WAVE32: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE32: S_ENDPGM 0, implicit [[S_AND_B64_]]
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%0:sgpr(<4 x s16>) = COPY $sgpr0_sgpr1
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%1:sgpr(<4 x s16>) = COPY $sgpr2_sgpr3
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@ -431,11 +431,11 @@ tracksRegLiveness: true
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body: |
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bb.0:
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; WAVE64-LABEL: name: and_s1_sgpr_undef_sgpr_undef_sgpr
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 undef %1:sreg_32, undef %2:sreg_32
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 undef %1:sreg_32, undef %2:sreg_32, implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_AND_B32_]]
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; WAVE32-LABEL: name: and_s1_sgpr_undef_sgpr_undef_sgpr
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 undef %1:sreg_32, undef %2:sreg_32
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 undef %1:sreg_32, undef %2:sreg_32, implicit-def dead $scc
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; WAVE32: S_ENDPGM 0, implicit [[S_AND_B32_]]
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%2:sgpr(s1) = G_AND undef %0:sgpr(s1), undef %1:sgpr(s1)
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S_ENDPGM 0, implicit %2
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@ -515,7 +515,7 @@ body: |
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; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; WAVE64: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]]
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[S_MOV_B32_]]
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc
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; WAVE64: [[COPY2:%[0-9]+]]:sreg_64_xexec = COPY [[S_AND_B32_]]
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; WAVE64: [[COPY3:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY2]]
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; WAVE64: S_ENDPGM 0, implicit [[COPY3]]
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@ -568,7 +568,7 @@ body: |
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; WAVE32: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
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; WAVE32: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[COPY]], implicit $exec
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; WAVE32: [[V_CMP_NE_U32_e64_1:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[S_MOV_B32_]], implicit $exec
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_AND_B32 [[V_CMP_NE_U32_e64_]], [[V_CMP_NE_U32_e64_1]]
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_AND_B32 [[V_CMP_NE_U32_e64_]], [[V_CMP_NE_U32_e64_1]], implicit-def dead $scc
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[S_AND_B32_]]
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; WAVE32: S_ENDPGM 0, implicit [[COPY1]]
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%1:vgpr(s32) = COPY $vgpr0
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@ -598,14 +598,14 @@ body: |
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; WAVE64: liveins: $sgpr0, $sgpr1
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]]
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; WAVE64: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_AND_B32_]]
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; WAVE32-LABEL: name: and_s32_sgpr_sgpr_sgpr_result_reg_class
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; WAVE32: liveins: $sgpr0, $sgpr1
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]]
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; WAVE32: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE32: S_ENDPGM 0, implicit [[S_AND_B32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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@ -55,14 +55,14 @@ body: |
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; WAVE64: liveins: $sgpr0, $sgpr1
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]]
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; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_OR_B32_]]
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; WAVE32-LABEL: name: or_s1_sgpr_sgpr_sgpr
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; WAVE32: liveins: $sgpr0, $sgpr1
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]]
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; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE32: S_ENDPGM 0, implicit [[S_OR_B32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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@ -120,14 +120,14 @@ body: |
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; WAVE64: liveins: $sgpr0, $sgpr1
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]]
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; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_OR_B32_]]
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; WAVE32-LABEL: name: or_s16_sgpr_sgpr_sgpr
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; WAVE32: liveins: $sgpr0, $sgpr1
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]]
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; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE32: S_ENDPGM 0, implicit [[S_OR_B32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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@ -182,14 +182,14 @@ body: |
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; WAVE64: liveins: $sgpr0, $sgpr1
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; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]]
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; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; WAVE64: S_ENDPGM 0, implicit [[S_OR_B32_]]
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; WAVE32-LABEL: name: or_s32_sgpr_sgpr_sgpr
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; WAVE32: liveins: $sgpr0, $sgpr1
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; WAVE32: $vcc_hi = IMPLICIT_DEF
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; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
||||
; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_OR_B32_]]
|
||||
%0:sgpr(s32) = COPY $sgpr0
|
||||
%1:sgpr(s32) = COPY $sgpr1
|
||||
@ -211,14 +211,14 @@ body: |
|
||||
; WAVE64: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE64: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE64: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_OR_B64_]]
|
||||
; WAVE32-LABEL: name: or_s64_sgpr_sgpr_sgpr
|
||||
; WAVE32: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE32: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_OR_B64_]]
|
||||
%0:sgpr(s64) = COPY $sgpr0_sgpr1
|
||||
%1:sgpr(s64) = COPY $sgpr2_sgpr3
|
||||
@ -240,14 +240,14 @@ body: |
|
||||
; WAVE64: liveins: $sgpr0, $sgpr1
|
||||
; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
||||
; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]]
|
||||
; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_OR_B32_]]
|
||||
; WAVE32-LABEL: name: or_v2s16_sgpr_sgpr_sgpr
|
||||
; WAVE32: liveins: $sgpr0, $sgpr1
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
||||
; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_OR_B32_]]
|
||||
%0:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
%1:sgpr(<2 x s16>) = COPY $sgpr1
|
||||
@ -269,14 +269,14 @@ body: |
|
||||
; WAVE64: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE64: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE64: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_OR_B64_]]
|
||||
; WAVE32-LABEL: name: or_v2s32_sgpr_sgpr_sgpr
|
||||
; WAVE32: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE32: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_OR_B64_]]
|
||||
%0:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1
|
||||
%1:sgpr(<2 x s32>) = COPY $sgpr2_sgpr3
|
||||
@ -298,14 +298,14 @@ body: |
|
||||
; WAVE64: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE64: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE64: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_OR_B64_]]
|
||||
; WAVE32-LABEL: name: or_v4s16_sgpr_sgpr_sgpr
|
||||
; WAVE32: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE32: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_OR_B64_:%[0-9]+]]:sreg_64 = S_OR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_OR_B64_]]
|
||||
%0:sgpr(<4 x s16>) = COPY $sgpr0_sgpr1
|
||||
%1:sgpr(<4 x s16>) = COPY $sgpr2_sgpr3
|
||||
@ -431,11 +431,11 @@ tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
; WAVE64-LABEL: name: or_s1_sgpr_undef_sgpr_undef_sgpr
|
||||
; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 undef %1:sreg_32, undef %2:sreg_32
|
||||
; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 undef %1:sreg_32, undef %2:sreg_32, implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_OR_B32_]]
|
||||
; WAVE32-LABEL: name: or_s1_sgpr_undef_sgpr_undef_sgpr
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 undef %1:sreg_32, undef %2:sreg_32
|
||||
; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 undef %1:sreg_32, undef %2:sreg_32, implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_OR_B32_]]
|
||||
%2:sgpr(s1) = G_OR undef %0:sgpr(s1), undef %1:sgpr(s1)
|
||||
S_ENDPGM 0, implicit %2
|
||||
@ -515,7 +515,7 @@ body: |
|
||||
; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; WAVE64: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY1]], [[S_MOV_B32_]]
|
||||
; WAVE64: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc
|
||||
; WAVE64: [[COPY2:%[0-9]+]]:sreg_64_xexec = COPY [[S_OR_B32_]]
|
||||
; WAVE64: [[COPY3:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY2]]
|
||||
; WAVE64: S_ENDPGM 0, implicit [[COPY3]]
|
||||
@ -568,7 +568,7 @@ body: |
|
||||
; WAVE32: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
|
||||
; WAVE32: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[COPY]], implicit $exec
|
||||
; WAVE32: [[V_CMP_NE_U32_e64_1:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[S_MOV_B32_]], implicit $exec
|
||||
; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_OR_B32 [[V_CMP_NE_U32_e64_]], [[V_CMP_NE_U32_e64_1]]
|
||||
; WAVE32: [[S_OR_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_OR_B32 [[V_CMP_NE_U32_e64_]], [[V_CMP_NE_U32_e64_1]], implicit-def dead $scc
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[S_OR_B32_]]
|
||||
; WAVE32: S_ENDPGM 0, implicit [[COPY1]]
|
||||
%1:vgpr(s32) = COPY $vgpr0
|
||||
|
||||
@ -55,14 +55,14 @@ body: |
|
||||
; WAVE64: liveins: $sgpr0, $sgpr1
|
||||
; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]]
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_XOR_B32_]]
|
||||
; WAVE32-LABEL: name: xor_s1_sgpr_sgpr_sgpr
|
||||
; WAVE32: liveins: $sgpr0, $sgpr1
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_XOR_B32_]]
|
||||
%0:sgpr(s32) = COPY $sgpr0
|
||||
%1:sgpr(s32) = COPY $sgpr1
|
||||
@ -120,14 +120,14 @@ body: |
|
||||
; WAVE64: liveins: $sgpr0, $sgpr1
|
||||
; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]]
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_XOR_B32_]]
|
||||
; WAVE32-LABEL: name: xor_s16_sgpr_sgpr_sgpr
|
||||
; WAVE32: liveins: $sgpr0, $sgpr1
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_XOR_B32_]]
|
||||
%0:sgpr(s32) = COPY $sgpr0
|
||||
%1:sgpr(s32) = COPY $sgpr1
|
||||
@ -182,14 +182,14 @@ body: |
|
||||
; WAVE64: liveins: $sgpr0, $sgpr1
|
||||
; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]]
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_XOR_B32_]]
|
||||
; WAVE32-LABEL: name: xor_s32_sgpr_sgpr_sgpr
|
||||
; WAVE32: liveins: $sgpr0, $sgpr1
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_XOR_B32_]]
|
||||
%0:sgpr(s32) = COPY $sgpr0
|
||||
%1:sgpr(s32) = COPY $sgpr1
|
||||
@ -211,14 +211,14 @@ body: |
|
||||
; WAVE64: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE64: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE64: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_XOR_B64_]]
|
||||
; WAVE32-LABEL: name: xor_s64_sgpr_sgpr_sgpr
|
||||
; WAVE32: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE32: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_XOR_B64_]]
|
||||
%0:sgpr(s64) = COPY $sgpr0_sgpr1
|
||||
%1:sgpr(s64) = COPY $sgpr2_sgpr3
|
||||
@ -240,14 +240,14 @@ body: |
|
||||
; WAVE64: liveins: $sgpr0, $sgpr1
|
||||
; WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]]
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_XOR_B32_]]
|
||||
; WAVE32-LABEL: name: xor_v2s16_sgpr_sgpr_sgpr
|
||||
; WAVE32: liveins: $sgpr0, $sgpr1
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_XOR_B32_]]
|
||||
%0:sgpr(<2 x s16>) = COPY $sgpr0
|
||||
%1:sgpr(<2 x s16>) = COPY $sgpr1
|
||||
@ -269,14 +269,14 @@ body: |
|
||||
; WAVE64: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE64: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE64: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_XOR_B64_]]
|
||||
; WAVE32-LABEL: name: xor_v2s32_sgpr_sgpr_sgpr
|
||||
; WAVE32: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE32: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_XOR_B64_]]
|
||||
%0:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1
|
||||
%1:sgpr(<2 x s32>) = COPY $sgpr2_sgpr3
|
||||
@ -298,14 +298,14 @@ body: |
|
||||
; WAVE64: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE64: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE64: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE64: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_XOR_B64_]]
|
||||
; WAVE32-LABEL: name: xor_v4s16_sgpr_sgpr_sgpr
|
||||
; WAVE32: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; WAVE32: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]]
|
||||
; WAVE32: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_XOR_B64_]]
|
||||
%0:sgpr(<4 x s16>) = COPY $sgpr0_sgpr1
|
||||
%1:sgpr(<4 x s16>) = COPY $sgpr2_sgpr3
|
||||
@ -431,11 +431,11 @@ tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
; WAVE64-LABEL: name: xor_s1_sgpr_undef_sgpr_undef_sgpr
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 undef %1:sreg_32, undef %2:sreg_32
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 undef %1:sreg_32, undef %2:sreg_32, implicit-def dead $scc
|
||||
; WAVE64: S_ENDPGM 0, implicit [[S_XOR_B32_]]
|
||||
; WAVE32-LABEL: name: xor_s1_sgpr_undef_sgpr_undef_sgpr
|
||||
; WAVE32: $vcc_hi = IMPLICIT_DEF
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 undef %1:sreg_32, undef %2:sreg_32
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 undef %1:sreg_32, undef %2:sreg_32, implicit-def dead $scc
|
||||
; WAVE32: S_ENDPGM 0, implicit [[S_XOR_B32_]]
|
||||
%2:sgpr(s1) = G_XOR undef %0:sgpr(s1), undef %1:sgpr(s1)
|
||||
S_ENDPGM 0, implicit %2
|
||||
@ -515,7 +515,7 @@ body: |
|
||||
; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; WAVE64: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
|
||||
; WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY1]], [[S_MOV_B32_]]
|
||||
; WAVE64: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def dead $scc
|
||||
; WAVE64: [[COPY2:%[0-9]+]]:sreg_64_xexec = COPY [[S_XOR_B32_]]
|
||||
; WAVE64: [[COPY3:%[0-9]+]]:sreg_32_xm0 = COPY [[COPY2]]
|
||||
; WAVE64: S_ENDPGM 0, implicit [[COPY3]]
|
||||
@ -568,7 +568,7 @@ body: |
|
||||
; WAVE32: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
|
||||
; WAVE32: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[COPY]], implicit $exec
|
||||
; WAVE32: [[V_CMP_NE_U32_e64_1:%[0-9]+]]:sreg_32 = V_CMP_NE_U32_e64 0, [[S_MOV_B32_]], implicit $exec
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_XOR_B32 [[V_CMP_NE_U32_e64_]], [[V_CMP_NE_U32_e64_1]]
|
||||
; WAVE32: [[S_XOR_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_XOR_B32 [[V_CMP_NE_U32_e64_]], [[V_CMP_NE_U32_e64_1]], implicit-def dead $scc
|
||||
; WAVE32: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[S_XOR_B32_]]
|
||||
; WAVE32: S_ENDPGM 0, implicit [[COPY1]]
|
||||
%1:vgpr(s32) = COPY $vgpr0
|
||||
|
||||
Loading…
Reference in New Issue
Block a user