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AArch64: match correct order in subtraction pattern.

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The accumulator in multiply-and-subtract instructions is actually subtracted
*from* so these patterns were computing the wrong value.

llvm-svn: 260131
This commit is contained in:
Tim Northover 2016-02-08 19:33:18 +00:00
parent e08381a529
commit e316f76222
2 changed files with 15 additions and 5 deletions
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8
llvm/lib/Target/AArch64/AArch64InstrInfo.td
View File

@ -766,12 +766,12 @@ def : Pat<(i64 (add (mul (sext_inreg GPR64:$Rn, i32), (s64imm_32bit:$C)),
(SMADDLrrr (i32 (EXTRACT_SUBREG GPR64:$Rn, sub_32)),
(MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
def : Pat<(i64 (sub (mul (sext GPR32:$Rn), (s64imm_32bit:$C)), GPR64:$Ra)),
def : Pat<(i64 (sub GPR64:$Ra, (mul (sext GPR32:$Rn), (s64imm_32bit:$C)))),
(SMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
def : Pat<(i64 (sub (mul (zext GPR32:$Rn), (i64imm_32bit:$C)), GPR64:$Ra)),
def : Pat<(i64 (sub GPR64:$Ra, (mul (zext GPR32:$Rn), (i64imm_32bit:$C)))),
(UMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
def : Pat<(i64 (sub (mul (sext_inreg GPR64:$Rn, i32), (s64imm_32bit:$C)),
GPR64:$Ra)),
def : Pat<(i64 (sub GPR64:$Ra, (mul (sext_inreg GPR64:$Rn, i32),
(s64imm_32bit:$C)))),
(SMSUBLrrr (i32 (EXTRACT_SUBREG GPR64:$Rn, sub_32)),
(MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>;
} // AddedComplexity = 5

12
llvm/test/CodeGen/AArch64/arm64-mul.ll
View File

@ -137,6 +137,16 @@ entry:
; CHECK: umsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
%tmp1 = zext i32 %a to i64
%tmp3 = mul i64 %tmp1, 12345678
%tmp4 = sub i64 %tmp3, %b
%tmp4 = sub i64 %b, %tmp3
ret i64 %tmp4
}
define i64 @t14(i32 %a, i64 %b) nounwind {
entry:
; CHECK-LABEL: t14:
; CHECK: smsubl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
%tmp1 = sext i32 %a to i64
%tmp3 = mul i64 %tmp1, -12345678
%tmp4 = sub i64 %b, %tmp3
ret i64 %tmp4
}