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[Hexagon] Fix compiler warnings in release build
Patch by Aditya Nandakumar. llvm-svn: 235635
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@ -170,6 +170,8 @@ static bool areCombinableOperations(const TargetRegisterInfo *TRI,
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MachineInstr *LowRegInst) {
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unsigned HiOpc = HighRegInst->getOpcode();
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unsigned LoOpc = LowRegInst->getOpcode();
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(void)HiOpc; // Fix compiler warning
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(void)LoOpc; // Fix compiler warning
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assert((HiOpc == Hexagon::A2_tfr || HiOpc == Hexagon::A2_tfrsi) &&
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(LoOpc == Hexagon::A2_tfr || LoOpc == Hexagon::A2_tfrsi) &&
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"Assume individual instructions are of a combinable type");
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@ -580,6 +580,7 @@ void HexagonFrameLowering::insertEpilogueInBlock(MachineBasicBlock &MBB) const {
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// Handle EH_RETURN.
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if (RetOpc == Hexagon::EH_RETURN_JMPR) {
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MachineOperand &OffsetReg = RetI->getOperand(0);
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(void)OffsetReg; // Silence compiler warning.
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assert(OffsetReg.isReg() && "Offset should be in register!");
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BuildMI(MBB, InsertPt, DL, HII.get(Hexagon::L2_deallocframe));
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BuildMI(MBB, InsertPt, DL, HII.get(Hexagon::A2_add), SP)
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@ -818,6 +819,7 @@ void HexagonFrameLowering::eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const {
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MachineInstr &MI = *I;
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unsigned Opc = MI.getOpcode();
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(void)Opc; // Silence compiler warning.
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assert((Opc == Hexagon::ADJCALLSTACKDOWN || Opc == Hexagon::ADJCALLSTACKUP) &&
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"Cannot handle this call frame pseudo instruction");
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MBB.erase(I);
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@ -993,7 +995,7 @@ void HexagonFrameLowering::processFunctionBeforeCalleeSavedScan(
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#ifndef NDEBUG
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void dump_registers(BitVector &Regs, const TargetRegisterInfo &TRI) {
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static void dump_registers(BitVector &Regs, const TargetRegisterInfo &TRI) {
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dbgs() << '{';
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for (int x = Regs.find_first(); x >= 0; x = Regs.find_next(x)) {
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unsigned R = x;
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@ -1007,6 +1009,7 @@ void dump_registers(BitVector &Regs, const TargetRegisterInfo &TRI) {
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bool HexagonFrameLowering::assignCalleeSavedSpillSlots(MachineFunction &MF,
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const TargetRegisterInfo *TRI, std::vector<CalleeSavedInfo> &CSI) const {
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const Function &F = *MF.getFunction();
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(void)F; // Silence compiler warning.
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DEBUG(dbgs() << LLVM_FUNCTION_NAME << " on " << F.getName() << '\n');
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MachineFrameInfo *MFI = MF.getFrameInfo();
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BitVector SRegs(Hexagon::NUM_TARGET_REGS);
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