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[Clang][RISCV] Restrict rvv builtins with zve macros
The `zve` extension specifies the maximum ELEN for both integer and floating point mode - defined by macro `__riscv_v_elen` and `__riscv_v_elen_fp`. This commit restricts the functions in riscv_vector.h by the zve defined macro-s. Change enum `RISCVExtension` to `RISCVPredefinedMacro` since now it contains not only extensions. Also added type alignment to it. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D112986
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@ -100,6 +100,9 @@ public:
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bool isValid() const { return Valid; }
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bool isScalar() const { return Scale.hasValue() && Scale.getValue() == 0; }
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bool isVector() const { return Scale.hasValue() && Scale.getValue() != 0; }
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bool isVector(unsigned Width) const {
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return isVector() && ElementBitwidth == Width;
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}
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bool isFloat() const { return ScalarType == ScalarTypeKind::Float; }
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bool isSignedInteger() const {
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return ScalarType == ScalarTypeKind::SignedInteger;
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@ -134,13 +137,15 @@ private:
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using RVVTypePtr = RVVType *;
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using RVVTypes = std::vector<RVVTypePtr>;
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using RISCVPredefinedMacroT = uint8_t;
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enum RISCVExtension : uint8_t {
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enum RISCVPredefinedMacro : RISCVPredefinedMacroT {
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Basic = 0,
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F = 1 << 1,
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D = 1 << 2,
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Zfh = 1 << 3,
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RV64 = 1 << 4,
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Zfh = 1 << 1,
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RV64 = 1 << 2,
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VectorMaxELen64 = 1 << 3,
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VectorMaxELenFp32 = 1 << 4,
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VectorMaxELenFp64 = 1 << 5,
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};
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// TODO refactor RVVIntrinsic class design after support all intrinsic
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@ -164,7 +169,7 @@ private:
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// The types we use to obtain the specific LLVM intrinsic. They are index of
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// InputTypes. -1 means the return type.
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std::vector<int64_t> IntrinsicTypes;
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uint8_t RISCVExtensions = 0;
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RISCVPredefinedMacroT RISCVPredefinedMacros = 0;
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unsigned NF = 1;
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public:
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@ -188,7 +193,9 @@ public:
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bool isMask() const { return IsMask; }
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StringRef getIRName() const { return IRName; }
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StringRef getManualCodegen() const { return ManualCodegen; }
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uint8_t getRISCVExtensions() const { return RISCVExtensions; }
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RISCVPredefinedMacroT getRISCVPredefinedMacros() const {
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return RISCVPredefinedMacros;
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}
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unsigned getNF() const { return NF; }
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const std::vector<int64_t> &getIntrinsicTypes() const {
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return IntrinsicTypes;
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@ -251,7 +258,8 @@ private:
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// Emit the architecture preprocessor definitions. Return true when emits
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// non-empty string.
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bool emitExtDefStr(uint8_t Extensions, raw_ostream &o);
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bool emitMacroRestrictionStr(RISCVPredefinedMacroT PredefinedMacros,
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raw_ostream &o);
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// Slice Prototypes string into sub prototype string and process each sub
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// prototype string individually in the Handler.
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void parsePrototypes(StringRef Prototypes,
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@ -789,15 +797,17 @@ RVVIntrinsic::RVVIntrinsic(StringRef NewName, StringRef Suffix,
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// Init RISC-V extensions
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for (const auto &T : OutInTypes) {
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if (T->isFloatVector(16) || T->isFloat(16))
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RISCVExtensions |= RISCVExtension::Zfh;
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else if (T->isFloatVector(32) || T->isFloat(32))
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RISCVExtensions |= RISCVExtension::F;
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else if (T->isFloatVector(64) || T->isFloat(64))
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RISCVExtensions |= RISCVExtension::D;
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RISCVPredefinedMacros |= RISCVPredefinedMacro::Zfh;
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if (T->isFloatVector(32))
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RISCVPredefinedMacros |= RISCVPredefinedMacro::VectorMaxELenFp32;
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if (T->isFloatVector(64))
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RISCVPredefinedMacros |= RISCVPredefinedMacro::VectorMaxELenFp64;
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if (T->isVector(64))
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RISCVPredefinedMacros |= RISCVPredefinedMacro::VectorMaxELen64;
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}
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for (auto Extension : RequiredExtensions) {
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if (Extension == "RV64")
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RISCVExtensions |= RISCVExtension::RV64;
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RISCVPredefinedMacros |= RISCVPredefinedMacro::RV64;
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}
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// Init OutputType and InputTypes
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@ -981,7 +991,7 @@ void RVVEmitter::createHeader(raw_ostream &OS) {
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// The same extension include in the same arch guard marco.
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llvm::stable_sort(Defs, [](const std::unique_ptr<RVVIntrinsic> &A,
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const std::unique_ptr<RVVIntrinsic> &B) {
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return A->getRISCVExtensions() < B->getRISCVExtensions();
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return A->getRISCVPredefinedMacros() < B->getRISCVPredefinedMacros();
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});
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OS << "#define __rvv_ai static __inline__\n";
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@ -1280,15 +1290,16 @@ Optional<RVVTypePtr> RVVEmitter::computeType(BasicType BT, int Log2LMUL,
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void RVVEmitter::emitArchMacroAndBody(
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std::vector<std::unique_ptr<RVVIntrinsic>> &Defs, raw_ostream &OS,
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std::function<void(raw_ostream &, const RVVIntrinsic &)> PrintBody) {
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uint8_t PrevExt = (*Defs.begin())->getRISCVExtensions();
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bool NeedEndif = emitExtDefStr(PrevExt, OS);
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RISCVPredefinedMacroT PrevMacros =
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(*Defs.begin())->getRISCVPredefinedMacros();
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bool NeedEndif = emitMacroRestrictionStr(PrevMacros, OS);
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for (auto &Def : Defs) {
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uint8_t CurExt = Def->getRISCVExtensions();
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if (CurExt != PrevExt) {
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RISCVPredefinedMacroT CurMacros = Def->getRISCVPredefinedMacros();
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if (CurMacros != PrevMacros) {
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if (NeedEndif)
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OS << "#endif\n\n";
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NeedEndif = emitExtDefStr(CurExt, OS);
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PrevExt = CurExt;
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NeedEndif = emitMacroRestrictionStr(CurMacros, OS);
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PrevMacros = CurMacros;
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}
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if (Def->hasAutoDef())
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PrintBody(OS, *Def);
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@ -1297,19 +1308,22 @@ void RVVEmitter::emitArchMacroAndBody(
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OS << "#endif\n\n";
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}
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bool RVVEmitter::emitExtDefStr(uint8_t Extents, raw_ostream &OS) {
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if (Extents == RISCVExtension::Basic)
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bool RVVEmitter::emitMacroRestrictionStr(RISCVPredefinedMacroT PredefinedMacros,
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raw_ostream &OS) {
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if (PredefinedMacros == RISCVPredefinedMacro::Basic)
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return false;
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OS << "#if ";
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ListSeparator LS(" && ");
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if (Extents & RISCVExtension::F)
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OS << LS << "defined(__riscv_f)";
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if (Extents & RISCVExtension::D)
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OS << LS << "defined(__riscv_d)";
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if (Extents & RISCVExtension::Zfh)
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if (PredefinedMacros & RISCVPredefinedMacro::Zfh)
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OS << LS << "defined(__riscv_zfh)";
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if (Extents & RISCVExtension::RV64)
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if (PredefinedMacros & RISCVPredefinedMacro::RV64)
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OS << LS << "(__riscv_xlen == 64)";
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if (PredefinedMacros & RISCVPredefinedMacro::VectorMaxELen64)
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OS << LS << "(__riscv_v_elen >= 64)";
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if (PredefinedMacros & RISCVPredefinedMacro::VectorMaxELenFp32)
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OS << LS << "(__riscv_v_elen_fp >= 32)";
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if (PredefinedMacros & RISCVPredefinedMacro::VectorMaxELenFp64)
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OS << LS << "(__riscv_v_elen_fp >= 64)";
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OS << "\n";
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return true;
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}
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