diff --git a/bolt/src/Passes/LivenessAnalysis.h b/bolt/src/Passes/LivenessAnalysis.h index 585ca0df87b5..d30626a7b9a2 100644 --- a/bolt/src/Passes/LivenessAnalysis.h +++ b/bolt/src/Passes/LivenessAnalysis.h @@ -142,7 +142,7 @@ protected: BC.MIB->getDefaultLiveOut(Used); } } - const MCInstrDesc InstInfo = BC.MII->get(Point.getOpcode()); + const MCInstrDesc &InstInfo = BC.MII->get(Point.getOpcode()); for (unsigned I = 0, E = Point.getNumOperands(); I != E; ++I) { if (!Point.getOperand(I).isReg() || I < InstInfo.getNumDefs()) continue; diff --git a/bolt/src/Passes/ShrinkWrapping.cpp b/bolt/src/Passes/ShrinkWrapping.cpp index 77b6df4885cb..d505e33230eb 100644 --- a/bolt/src/Passes/ShrinkWrapping.cpp +++ b/bolt/src/Passes/ShrinkWrapping.cpp @@ -264,7 +264,7 @@ void StackLayoutModifier::checkStackPointerRestore(MCInst &Point) { return; // Check if the definition of SP comes from FP -- in this case, this // value may need to be updated depending on our stack layout changes - const MCInstrDesc InstInfo = BC.MII->get(Point.getOpcode()); + const MCInstrDesc &InstInfo = BC.MII->get(Point.getOpcode()); unsigned NumDefs = InstInfo.getNumDefs(); bool UsesFP{false}; for (unsigned I = NumDefs, E = MCPlus::getNumPrimeOperands(Point); diff --git a/bolt/src/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/src/Target/AArch64/AArch64MCPlusBuilder.cpp index f36366f2ee96..a114a67733d0 100644 --- a/bolt/src/Target/AArch64/AArch64MCPlusBuilder.cpp +++ b/bolt/src/Target/AArch64/AArch64MCPlusBuilder.cpp @@ -179,7 +179,7 @@ public: bool isLoadFromStack(const MCInst &Inst) const { if (!isLoad(Inst)) return false; - const MCInstrDesc InstInfo = Info->get(Inst.getOpcode()); + const MCInstrDesc &InstInfo = Info->get(Inst.getOpcode()); unsigned NumDefs = InstInfo.getNumDefs(); for (unsigned I = NumDefs, E = InstInfo.getNumOperands(); I < E; ++I) { const MCOperand &Operand = Inst.getOperand(I); @@ -225,7 +225,7 @@ public: return true; // Look for literal addressing mode (see C1-143 ARM DDI 0487B.a) - const MCInstrDesc MCII = Info->get(Inst.getOpcode()); + const MCInstrDesc &MCII = Info->get(Inst.getOpcode()); for (unsigned I = 0, E = MCII.getNumOperands(); I != E; ++I) { if (MCII.OpInfo[I].OperandType == MCOI::OPERAND_PCREL) return true; @@ -261,7 +261,7 @@ public: return evaluateADR(Inst, DispImm, DispExpr); // Literal addressing mode - const MCInstrDesc MCII = Info->get(Inst.getOpcode()); + const MCInstrDesc &MCII = Info->get(Inst.getOpcode()); for (unsigned I = 0, E = MCII.getNumOperands(); I != E; ++I) { if (MCII.OpInfo[I].OperandType != MCOI::OPERAND_PCREL) continue; @@ -306,7 +306,7 @@ public: "Unexpected number of operands"); ++OI; } else { - const MCInstrDesc MCII = Info->get(Inst.getOpcode()); + const MCInstrDesc &MCII = Info->get(Inst.getOpcode()); for (unsigned I = 0, E = MCII.getNumOperands(); I != E; ++I) { if (MCII.OpInfo[I].OperandType == MCOI::OPERAND_PCREL) { break; diff --git a/bolt/src/Target/X86/X86MCPlusBuilder.cpp b/bolt/src/Target/X86/X86MCPlusBuilder.cpp index cc5d54e5fc5a..981f684fabaf 100644 --- a/bolt/src/Target/X86/X86MCPlusBuilder.cpp +++ b/bolt/src/Target/X86/X86MCPlusBuilder.cpp @@ -622,7 +622,7 @@ public: return true; int MemOpNo = getMemoryOperandNo(Inst); - const MCInstrDesc MCII = Info->get(Inst.getOpcode()); + const MCInstrDesc &MCII = Info->get(Inst.getOpcode()); if (MemOpNo == -1) return false; @@ -635,7 +635,7 @@ public: return true; int MemOpNo = getMemoryOperandNo(Inst); - const MCInstrDesc MCII = Info->get(Inst.getOpcode()); + const MCInstrDesc &MCII = Info->get(Inst.getOpcode()); if (MemOpNo == -1) return false; @@ -1354,7 +1354,7 @@ public: InstInfo I; int MemOpNo = getMemoryOperandNo(Inst); - const MCInstrDesc MCII = Info->get(Inst.getOpcode()); + const MCInstrDesc &MCII = Info->get(Inst.getOpcode()); // If it is not dealing with a memory operand, we discard it if (MemOpNo == -1 || MCII.isCall()) return false; @@ -1545,7 +1545,7 @@ public: break; } - const MCInstrDesc MCII = Info->get(Inst.getOpcode()); + const MCInstrDesc &MCII = Info->get(Inst.getOpcode()); for (int I = 0, E = MCII.getNumDefs(); I != E; ++I) { const MCOperand &Operand = Inst.getOperand(I); if (Operand.isReg() && Operand.getReg() == X86::RSP) { @@ -1667,7 +1667,7 @@ public: bool escapesVariable(const MCInst &Inst, bool HasFramePointer) const override { int MemOpNo = getMemoryOperandNo(Inst); - const MCInstrDesc MCII = Info->get(Inst.getOpcode()); + const MCInstrDesc &MCII = Info->get(Inst.getOpcode()); const unsigned NumDefs = MCII.getNumDefs(); static BitVector SPBPAliases(BitVector(getAliases(X86::RSP)) |= getAliases(X86::RBP));