mirror of
https://github.com/capstone-engine/llvm-capstone.git
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[XRay][AArch64] Suppport __xray_customevent/__xray_typedevent
`__xray_customevent` and `__xray_typedevent` are built-in functions in Clang.
With -fxray-instrument, they are lowered to intrinsics llvm.xray.customevent and
llvm.xray.typedevent, respectively. These intrinsics are then lowered to
TargetOpcode::{PATCHABLE_EVENT_CALL,PATCHABLE_TYPED_EVENT_CALL}. The target is
responsible for generating a code sequence that calls either
`__xray_CustomEvent` (with 2 arguments) or `__xray_TypedEvent` (with 3
arguments).
Before patching, the code sequence is prefixed by a branch instruction that
skips the rest of the code sequence. After patching
(compiler-rt/lib/xray/xray_AArch64.cpp), the branch instruction becomes a NOP
and the function call will take effects.
This patch implements the lowering process for
{PATCHABLE_EVENT_CALL,PATCHABLE_TYPED_EVENT_CALL} and implements the runtime.
```
// Lowering of PATCHABLE_EVENT_CALL
.Lxray_sled_N:
b #24
stp x0, x1, [sp, #-16]!
x0 = reg of op0
x1 = reg of op1
bl __xray_CustomEvent
ldrp x0, x1, [sp], #16
```
As a result, two updated tests in compiler-rt/test/xray/TestCases/Posix/ now
pass on AArch64.
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D153320
This commit is contained in:
Fangrui Song
parent
b0f6fd24dc
commit
f9fd0062b6
@ -105,15 +105,37 @@ bool patchFunctionTailExit(const bool Enable, const uint32_t FuncId,
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return patchSled(Enable, FuncId, Sled, __xray_FunctionTailExit);
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}
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// AArch64AsmPrinter::LowerPATCHABLE_EVENT_CALL generates this code sequence:
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//
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// .Lxray_event_sled_N:
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// b 1f
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// save x0 and x1 (and also x2 for TYPED_EVENT_CALL)
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// set up x0 and x1 (and also x2 for TYPED_EVENT_CALL)
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// bl __xray_CustomEvent or __xray_TypedEvent
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// restore x0 and x1 (and also x2 for TYPED_EVENT_CALL)
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// 1f
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//
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// There are 6 instructions for EVENT_CALL and 9 for TYPED_EVENT_CALL.
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//
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// Enable: b .+24 => nop
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// Disable: nop => b .+24
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bool patchCustomEvent(const bool Enable, const uint32_t FuncId,
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const XRaySledEntry &Sled)
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XRAY_NEVER_INSTRUMENT { // FIXME: Implement in aarch64?
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const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
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uint32_t Inst = Enable ? 0xd503201f : 0x14000006;
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std::atomic_store_explicit(
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reinterpret_cast<std::atomic<uint32_t> *>(Sled.address()), Inst,
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std::memory_order_release);
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return false;
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}
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// Enable: b +36 => nop
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// Disable: nop => b +36
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bool patchTypedEvent(const bool Enable, const uint32_t FuncId,
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const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
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// FIXME: Implement in aarch64?
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uint32_t Inst = Enable ? 0xd503201f : 0x14000009;
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std::atomic_store_explicit(
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reinterpret_cast<std::atomic<uint32_t> *>(Sled.address()), Inst,
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std::memory_order_release);
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return false;
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}
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@ -103,4 +103,32 @@ ASM_SYMBOL(__xray_FunctionTailExit):
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RESTORE_REGISTERS
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ret
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.global ASM_SYMBOL(__xray_CustomEvent)
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ASM_HIDDEN(__xray_CustomEvent)
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ASM_TYPE_FUNCTION(__xray_CustomEvent)
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ASM_SYMBOL(__xray_CustomEvent):
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SAVE_REGISTERS
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adrp x8, ASM_SYMBOL(_ZN6__xray22XRayPatchedCustomEventE)
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ldr x8, [x8, #:lo12:ASM_SYMBOL(_ZN6__xray22XRayPatchedCustomEventE)]
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cbz x8, 1f
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blr x8
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1:
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RESTORE_REGISTERS
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ret
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ASM_SIZE(__xray_CustomEvent)
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.global ASM_SYMBOL(__xray_TypedEvent)
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ASM_HIDDEN(__xray_TypedEvent)
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ASM_TYPE_FUNCTION(__xray_TypedEvent)
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ASM_SYMBOL(__xray_TypedEvent):
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SAVE_REGISTERS
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adrp x8, ASM_SYMBOL(_ZN6__xray21XRayPatchedTypedEventE)
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ldr x8, [x8, #:lo12:ASM_SYMBOL(_ZN6__xray21XRayPatchedTypedEventE)]
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cbz x8, 1f
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blr x8
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1:
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RESTORE_REGISTERS
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ret
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ASM_SIZE(__xray_TypedEvent)
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NO_EXEC_STACK_DIRECTIVE
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@ -5,7 +5,7 @@
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// RUN: %clangxx_xray -std=c++11 -fpic -fpie %s -o %t
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// RUN: XRAY_OPTIONS="patch_premain=false verbosity=1 xray_logfile_base=custom-event-logging.xray-" %run %t 2>&1 | FileCheck %s
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// FIXME: Support this in non-x86_64 as well
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// REQUIRES: x86_64-linux
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// REQUIRES: target={{(aarch64|x86_64)-.*linux.*}}
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// REQUIRES: built-in-llvm-tree
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#include <cstdio>
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#include "xray/xray_interface.h"
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@ -1,7 +1,7 @@
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// RUN: %clangxx_xray %s -o %t
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// RUN: XRAY_OPTIONS=patch_premain=false:verbosity=1 %run %t 2>&1 | FileCheck %s
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// REQUIRES: target={{x86_64-.*linux.*}}
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// REQUIRES: target={{(aarch64|x86_64)-.*linux.*}}
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#include <assert.h>
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#include <stdio.h>
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@ -893,7 +893,7 @@ bool FastISel::selectPatchpoint(const CallInst *I) {
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bool FastISel::selectXRayCustomEvent(const CallInst *I) {
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const auto &Triple = TM.getTargetTriple();
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if (Triple.getArch() != Triple::x86_64 || !Triple.isOSLinux())
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if (Triple.isAArch64(64) && Triple.getArch() != Triple::x86_64)
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return true; // don't do anything to this instruction.
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SmallVector<MachineOperand, 8> Ops;
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Ops.push_back(MachineOperand::CreateReg(getRegForValue(I->getArgOperand(0)),
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@ -912,7 +912,7 @@ bool FastISel::selectXRayCustomEvent(const CallInst *I) {
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bool FastISel::selectXRayTypedEvent(const CallInst *I) {
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const auto &Triple = TM.getTargetTriple();
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if (Triple.getArch() != Triple::x86_64 || !Triple.isOSLinux())
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if (Triple.isAArch64(64) && Triple.getArch() != Triple::x86_64)
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return true; // don't do anything to this instruction.
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SmallVector<MachineOperand, 8> Ops;
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Ops.push_back(MachineOperand::CreateReg(getRegForValue(I->getArgOperand(0)),
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@ -7204,10 +7204,9 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
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}
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case Intrinsic::xray_customevent: {
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// Here we want to make sure that the intrinsic behaves as if it has a
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// specific calling convention, and only for x86_64.
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// FIXME: Support other platforms later.
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// specific calling convention.
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const auto &Triple = DAG.getTarget().getTargetTriple();
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if (Triple.getArch() != Triple::x86_64)
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if (!Triple.isAArch64(64) && Triple.getArch() != Triple::x86_64)
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return;
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SmallVector<SDValue, 8> Ops;
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@ -7234,10 +7233,9 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
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}
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case Intrinsic::xray_typedevent: {
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// Here we want to make sure that the intrinsic behaves as if it has a
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// specific calling convention, and only for x86_64.
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// FIXME: Support other platforms later.
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// specific calling convention.
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const auto &Triple = DAG.getTarget().getTargetTriple();
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if (Triple.getArch() != Triple::x86_64)
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if (!Triple.isAArch64(64) && Triple.getArch() != Triple::x86_64)
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return;
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SmallVector<SDValue, 8> Ops;
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@ -107,6 +107,7 @@ public:
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void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI);
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void LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI);
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void LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI);
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void LowerPATCHABLE_EVENT_CALL(const MachineInstr &MI, bool Typed);
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typedef std::tuple<unsigned, bool, uint32_t> HwasanMemaccessTuple;
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std::map<HwasanMemaccessTuple, MCSymbol *> HwasanMemaccessSymbols;
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@ -323,6 +324,100 @@ void AArch64AsmPrinter::emitSled(const MachineInstr &MI, SledKind Kind) {
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recordSled(CurSled, MI, Kind, 2);
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}
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// Emit the following code for Intrinsic::{xray_customevent,xray_typedevent}
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// (built-in functions __xray_customevent/__xray_typedevent).
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//
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// .Lxray_event_sled_N:
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// b 1f
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// save x0 and x1 (and also x2 for TYPED_EVENT_CALL)
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// set up x0 and x1 (and also x2 for TYPED_EVENT_CALL)
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// bl __xray_CustomEvent or __xray_TypedEvent
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// restore x0 and x1 (and also x2 for TYPED_EVENT_CALL)
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// 1:
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//
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// There are 6 instructions for EVENT_CALL and 9 for TYPED_EVENT_CALL.
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//
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// Then record a sled of kind CUSTOM_EVENT or TYPED_EVENT.
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// After patching, b .+N will become a nop.
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void AArch64AsmPrinter::LowerPATCHABLE_EVENT_CALL(const MachineInstr &MI,
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bool Typed) {
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auto &O = *OutStreamer;
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MCSymbol *CurSled = OutContext.createTempSymbol("xray_sled_", true);
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O.emitLabel(CurSled);
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MCInst MovX0Op0 = MCInstBuilder(AArch64::ORRXrs)
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.addReg(AArch64::X0)
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.addReg(AArch64::XZR)
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.addReg(MI.getOperand(0).getReg())
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.addImm(0);
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MCInst MovX1Op1 = MCInstBuilder(AArch64::ORRXrs)
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.addReg(AArch64::X1)
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.addReg(AArch64::XZR)
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.addReg(MI.getOperand(1).getReg())
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.addImm(0);
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bool MachO = TM.getTargetTriple().isOSBinFormatMachO();
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auto *Sym = MCSymbolRefExpr::create(
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OutContext.getOrCreateSymbol(
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Twine(MachO ? "_" : "") +
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(Typed ? "__xray_TypedEvent" : "__xray_CustomEvent")),
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OutContext);
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if (Typed) {
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O.AddComment("Begin XRay typed event");
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EmitToStreamer(O, MCInstBuilder(AArch64::B).addImm(9));
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EmitToStreamer(O, MCInstBuilder(AArch64::STPXpre)
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.addReg(AArch64::SP)
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.addReg(AArch64::X0)
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.addReg(AArch64::X1)
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.addReg(AArch64::SP)
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.addImm(-4));
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EmitToStreamer(O, MCInstBuilder(AArch64::STRXui)
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.addReg(AArch64::X2)
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.addReg(AArch64::SP)
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.addImm(2));
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EmitToStreamer(O, MovX0Op0);
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EmitToStreamer(O, MovX1Op1);
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EmitToStreamer(O, MCInstBuilder(AArch64::ORRXrs)
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.addReg(AArch64::X2)
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.addReg(AArch64::XZR)
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.addReg(MI.getOperand(2).getReg())
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.addImm(0));
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EmitToStreamer(O, MCInstBuilder(AArch64::BL).addExpr(Sym));
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EmitToStreamer(O, MCInstBuilder(AArch64::LDRXui)
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.addReg(AArch64::X2)
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.addReg(AArch64::SP)
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.addImm(2));
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O.AddComment("End XRay typed event");
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EmitToStreamer(O, MCInstBuilder(AArch64::LDPXpost)
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.addReg(AArch64::SP)
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.addReg(AArch64::X0)
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.addReg(AArch64::X1)
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.addReg(AArch64::SP)
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.addImm(4));
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recordSled(CurSled, MI, SledKind::TYPED_EVENT, 2);
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} else {
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O.AddComment("Begin XRay custom event");
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EmitToStreamer(O, MCInstBuilder(AArch64::B).addImm(6));
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EmitToStreamer(O, MCInstBuilder(AArch64::STPXpre)
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.addReg(AArch64::SP)
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.addReg(AArch64::X0)
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.addReg(AArch64::X1)
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.addReg(AArch64::SP)
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.addImm(-2));
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EmitToStreamer(O, MovX0Op0);
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EmitToStreamer(O, MovX1Op1);
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EmitToStreamer(O, MCInstBuilder(AArch64::BL).addExpr(Sym));
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O.AddComment("End XRay custom event");
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EmitToStreamer(O, MCInstBuilder(AArch64::LDPXpost)
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.addReg(AArch64::SP)
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.addReg(AArch64::X0)
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.addReg(AArch64::X1)
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.addReg(AArch64::SP)
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.addImm(2));
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recordSled(CurSled, MI, SledKind::CUSTOM_EVENT, 2);
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}
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}
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void AArch64AsmPrinter::LowerKCFI_CHECK(const MachineInstr &MI) {
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Register AddrReg = MI.getOperand(0).getReg();
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assert(std::next(MI.getIterator())->isCall() &&
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@ -1552,6 +1647,10 @@ void AArch64AsmPrinter::emitInstruction(const MachineInstr *MI) {
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case TargetOpcode::PATCHABLE_TAIL_CALL:
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LowerPATCHABLE_TAIL_CALL(*MI);
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return;
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case TargetOpcode::PATCHABLE_EVENT_CALL:
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return LowerPATCHABLE_EVENT_CALL(*MI, false);
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case TargetOpcode::PATCHABLE_TYPED_EVENT_CALL:
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return LowerPATCHABLE_EVENT_CALL(*MI, true);
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case AArch64::KCFI_CHECK:
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LowerKCFI_CHECK(*MI);
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@ -2757,6 +2757,10 @@ MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(
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case TargetOpcode::PATCHPOINT:
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return emitPatchPoint(MI, BB);
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case TargetOpcode::PATCHABLE_EVENT_CALL:
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case TargetOpcode::PATCHABLE_TYPED_EVENT_CALL:
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return BB;
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case AArch64::CATCHRET:
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return EmitLoweredCatchRet(MI, BB);
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case AArch64::LD1_MXIPXX_H_PSEUDO_B:
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134
llvm/test/CodeGen/AArch64/xray-custom-log.ll
Normal file
134
llvm/test/CodeGen/AArch64/xray-custom-log.ll
Normal file
@ -0,0 +1,134 @@
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; RUN: llc -mtriple=aarch64 < %s | FileCheck %s
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; RUN: llc -mtriple=arm64-apple-darwin < %s | FileCheck %s --check-prefix=MACHO
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; RUN: llc -filetype=obj -mtriple=aarch64 %s -o %t
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; RUN: llvm-dwarfdump -debug-info %t | FileCheck %s --check-prefix=DBG
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; MACHO: bl ___xray_CustomEvent
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; MACHO: bl ___xray_CustomEvent
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; MACHO: bl ___xray_TypedEvent
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; MACHO: bl ___xray_TypedEvent
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; CHECK-LABEL: customevent:
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; CHECK: Lxray_sled_1:
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; CHECK-NEXT: b #24 // Begin XRay custom event
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; CHECK-NEXT: stp x0, x1, [sp, #-16]!
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; CHECK-NEXT: mov x0, x0
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; CHECK-NEXT: mov x1, x1
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; CHECK-NEXT: bl __xray_CustomEvent
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; CHECK-NEXT: ldp x0, x1, [sp], #16 // End XRay custom event
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; CHECK-NEXT: Ltmp[[#]]:
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; CHECK-NEXT: .loc 0 3 3 // a.c:3:3
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; CHECK-NEXT: Lxray_sled_2:
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; CHECK-NEXT: b #24 // Begin XRay custom event
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; CHECK-NEXT: stp x0, x1, [sp, #-16]!
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; CHECK-NEXT: mov x0, x2
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; CHECK-NEXT: mov x1, x3
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; CHECK-NEXT: bl __xray_CustomEvent
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; CHECK-NEXT: ldp x0, x1, [sp], #16 // End XRay custom event
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; CHECK-NEXT: .Ltmp[[#]]:
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; CHECK-NEXT: .loc 0 4 1 // a.c:4:1
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define void @customevent(ptr nocapture noundef readonly %e1, i64 noundef %s1, ptr nocapture noundef readonly %e2, i64 noundef %s2) "function-instrument"="xray-always" !dbg !11 {
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entry:
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tail call void @llvm.xray.customevent(ptr %e1, i64 %s1), !dbg !22
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tail call void @llvm.xray.customevent(ptr %e2, i64 %s2), !dbg !23
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ret void, !dbg !24
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}
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; CHECK: .xword .Lxray_sled_1-.Ltmp[[#]]
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; CHECK-NEXT: .xword .Lfunc_begin0-(.Ltmp[[#]]+8)
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; CHECK-NEXT: .byte 0x04
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; CHECK-NEXT: .byte 0x01
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; CHECK-NEXT: .byte 0x02
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; CHECK-NEXT: .zero 13
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; CHECK: .xword .Lxray_sled_2-.Ltmp[[#]]
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; CHECK-NEXT: .xword .Lfunc_begin0-(.Ltmp[[#]]+8)
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; CHECK-NEXT: .byte 0x04
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; CHECK-NEXT: .byte 0x01
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; CHECK-NEXT: .byte 0x02
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; CHECK-NEXT: .zero 13
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; CHECK-LABEL: typedevent:
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; CHECK: .Lxray_sled_5:
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; CHECK-NEXT: b #36 // Begin XRay typed event
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; CHECK-NEXT: stp x0, x1, [sp, #-32]!
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; CHECK-NEXT: str x2, [sp, #16]
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; CHECK-NEXT: mov x0, x0
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; CHECK-NEXT: mov x1, x1
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; CHECK-NEXT: mov x2, x2
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; CHECK-NEXT: bl __xray_TypedEvent
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; CHECK-NEXT: ldr x2, [sp, #16]
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; CHECK-NEXT: ldp x0, x1, [sp], #32 // End XRay typed event
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; CHECK-NEXT: .Ltmp[[#]]:
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; CHECK-NEXT: .loc 0 8 3 // a.c:8:3
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; CHECK-NEXT: .Lxray_sled_6:
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; CHECK-NEXT: b #36 // Begin XRay typed event
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; CHECK-NEXT: stp x0, x1, [sp, #-32]!
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; CHECK-NEXT: str x2, [sp, #16]
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; CHECK-NEXT: mov x0, x2
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; CHECK-NEXT: mov x1, x1
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; CHECK-NEXT: mov x2, x0
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; CHECK-NEXT: bl __xray_TypedEvent
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; CHECK-NEXT: ldr x2, [sp, #16]
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; CHECK-NEXT: ldp x0, x1, [sp], #32 // End XRay typed event
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; CHECK-NEXT: .Ltmp[[#]]:
|
||||
; CHECK-NEXT: .loc 0 9 1 // a.c:9:1
|
||||
define void @typedevent(i64 noundef %type, ptr nocapture noundef readonly %event, i64 noundef %size) "function-instrument"="xray-always" !dbg !25 {
|
||||
entry:
|
||||
tail call void @llvm.xray.typedevent(i64 %type, ptr %event, i64 %size), !dbg !33
|
||||
tail call void @llvm.xray.typedevent(i64 %size, ptr %event, i64 %type), !dbg !34
|
||||
ret void, !dbg !35
|
||||
}
|
||||
|
||||
; CHECK: .xword .Lxray_sled_5-.Ltmp[[#]]
|
||||
; CHECK-NEXT: .xword .Lfunc_begin1-(.Ltmp[[#]]+8)
|
||||
; CHECK-NEXT: .byte 0x05
|
||||
; CHECK-NEXT: .byte 0x01
|
||||
; CHECK-NEXT: .byte 0x02
|
||||
; CHECK-NEXT: .zero 13
|
||||
; CHECK: .xword .Lxray_sled_6-.Ltmp[[#]]
|
||||
; CHECK-NEXT: .xword .Lfunc_begin1-(.Ltmp[[#]]+8)
|
||||
; CHECK-NEXT: .byte 0x05
|
||||
; CHECK-NEXT: .byte 0x01
|
||||
; CHECK-NEXT: .byte 0x02
|
||||
; CHECK-NEXT: .zero 13
|
||||
|
||||
;; Construct call site entries for PATCHABLE_EVENT_CALL.
|
||||
; DBG: DW_TAG_subprogram
|
||||
; DBG: DW_AT_name
|
||||
; DBG-SAME: ("customevent")
|
||||
; DBG: DW_TAG_call_site
|
||||
; DBG-NEXT: DW_AT_call_target (DW_OP_reg0 {{.*}})
|
||||
; DBG-NEXT: DW_AT_call_return_pc
|
||||
; DBG-EMPTY:
|
||||
; DBG: DW_TAG_call_site
|
||||
; DBG-NEXT: DW_AT_call_target (DW_OP_reg2 {{.*}})
|
||||
; DBG-NEXT: DW_AT_call_return_pc
|
||||
|
||||
declare void @llvm.xray.customevent(ptr, i64)
|
||||
declare void @llvm.xray.typedevent(i64, ptr, i64)
|
||||
|
||||
!llvm.dbg.cu = !{!0}
|
||||
!llvm.module.flags = !{!2, !3}
|
||||
!llvm.ident = !{!10}
|
||||
|
||||
!0 = distinct !DICompileUnit(language: DW_LANG_C11, file: !1, producer: "clang version 17.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
|
||||
!1 = !DIFile(filename: "a.c", directory: "/tmp")
|
||||
!2 = !{i32 7, !"Dwarf Version", i32 5}
|
||||
!3 = !{i32 2, !"Debug Info Version", i32 3}
|
||||
!10 = !{!"clang version 17.0.0"}
|
||||
!11 = distinct !DISubprogram(name: "customevent", scope: !1, file: !1, line: 1, type: !12, scopeLine: 1, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
|
||||
!12 = !DISubroutineType(types: !13)
|
||||
!13 = !{null, !14, !15, !14, !15}
|
||||
!14 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: null, size: 64)
|
||||
!15 = !DIBasicType(name: "unsigned long", size: 64, encoding: DW_ATE_unsigned)
|
||||
!21 = !DILocation(line: 0, scope: !11)
|
||||
!22 = !DILocation(line: 2, column: 3, scope: !11)
|
||||
!23 = !DILocation(line: 3, column: 3, scope: !11)
|
||||
!24 = !DILocation(line: 4, column: 1, scope: !11)
|
||||
!25 = distinct !DISubprogram(name: "typedevent", scope: !1, file: !1, line: 6, type: !26, scopeLine: 6, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
|
||||
!26 = !DISubroutineType(types: !27)
|
||||
!27 = !{null, !15, !14, !15}
|
||||
!32 = !DILocation(line: 0, scope: !25)
|
||||
!33 = !DILocation(line: 7, column: 3, scope: !25)
|
||||
!34 = !DILocation(line: 8, column: 3, scope: !25)
|
||||
!35 = !DILocation(line: 9, column: 1, scope: !25)
|
||||
Loading…
Reference in New Issue
Block a user