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https://github.com/capstone-engine/llvm-capstone.git
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[test] Add {{.*}} to make ELF tests immune to dso_local/dso_preemptable/(none) differences
For a default visibility external linkage definition, dso_local is set for ELF
-fno-pic/-fpie and COFF and Mach-O. Since default clang -cc1 for ELF is similar
to -fpic ("PIC Level" is not set), this nuance causes unneeded binary format differences.
To make emitted IR similar, ELF -cc1 -fpic will default to -fno-semantic-interposition,
which sets dso_local for default visibility external linkage definitions.
To make this flip smooth and enable future (dso_local as definition default),
this patch replaces (function) `define ` with `define{{.*}} `,
(variable/constant/alias) `= ` with `={{.*}} `, or inserts appropriate `{{.*}} `.
This commit is contained in:
Fangrui Song
parent
f2cc2669a0
commit
fd739804e0
@ -7,7 +7,7 @@ struct S {
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volatile int& refcall();
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// CHECK: define void @_Z2f1PViPV1S
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// CHECK: define{{.*}} void @_Z2f1PViPV1S
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void f1(volatile int *x, volatile S* s) {
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// We should perform the load in these cases.
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// CHECK: load volatile i32, i32*
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@ -36,7 +36,7 @@ void f1(volatile int *x, volatile S* s) {
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// CHECK: ret
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}
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// CHECK: define void @_Z2f2PVi
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// CHECK: define{{.*}} void @_Z2f2PVi
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// CHECK-NOT: load volatile
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// CHECK: ret
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void f2(volatile int *x) {
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@ -45,7 +45,7 @@ void f2(volatile int *x) {
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1 ? refcall() : *x;
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}
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// CHECK: define void @_Z2f3v()
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// CHECK: define{{.*}} void @_Z2f3v()
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// CHECK-NOT: load
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// CHECK-NOT: memcpy
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@ -3,9 +3,9 @@
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export module M;
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// CHECK-DAG: @_ZW1ME1a = constant i32 1
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// CHECK-DAG: @_ZW1ME1a ={{.*}} constant i32 1
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const int a = 1;
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// CHECK-DAG: @b = constant i32 2
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// CHECK-DAG: @b ={{.*}} constant i32 2
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export const int b = 2;
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export int f() { return a + b; }
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@ -4,14 +4,14 @@
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export module FooBar;
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export {
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// CHECK-DAG: define i32 @_Z1fv(
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// CHECK-DAG: define{{.*}} i32 @_Z1fv(
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int f() { return 0; }
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}
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// CHECK-DAG: define weak_odr void @_ZW6FooBarE2f2v(
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inline void f2() { }
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// CHECK-DAG: define void @_ZW6FooBarE2f3v(
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// CHECK-DAG: define{{.*}} void @_ZW6FooBarE2f3v(
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static void f3() {}
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export void use_f3() { f3(); }
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@ -23,8 +23,8 @@ struct Y bar() {
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}
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// X86_32: define void @foo(%struct.Y* %P)
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// X86_32: define{{.*}} void @foo(%struct.Y* %P)
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// X86_32: call void @bar(%struct.Y* sret(%struct.Y) align 4 %{{[^),]*}})
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// X86_32: define void @bar(%struct.Y* noalias sret(%struct.Y) align 4 %{{[^,)]*}})
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// X86_32: define{{.*}} void @bar(%struct.Y* noalias sret(%struct.Y) align 4 %{{[^,)]*}})
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// X86_32: ret void
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@ -1,9 +1,9 @@
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// RUN: %clang_cc1 -triple i386-unknown-unknown -O2 -emit-llvm -o - %s | FileCheck %s
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// CHECK-LABEL: define i32 @f0()
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// CHECK-LABEL: define{{.*}} i32 @f0()
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// CHECK: ret i32 0
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// CHECK-LABEL: define i32 @f1()
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// CHECK-LABEL: define{{.*}} i32 @f1()
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// CHECK: ret i32 0
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// CHECK-LABEL: define i32 @f2()
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// CHECK-LABEL: define{{.*}} i32 @f2()
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// CHECK: ret i32 0
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// <rdar://problem/6113085>
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@ -1,9 +1,9 @@
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// RUN: %clang_cc1 -triple i386-unknown-unknown -O1 -emit-llvm -o - %s | FileCheck %s
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// CHECK-LABEL: define i32 @f0
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// CHECK-LABEL: define{{.*}} i32 @f0
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// CHECK: ret i32 1
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// CHECK-LABEL: define i32 @f1
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// CHECK-LABEL: define{{.*}} i32 @f1
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// CHECK: ret i32 1
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// CHECK-LABEL: define i32 @f2
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// CHECK-LABEL: define{{.*}} i32 @f2
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// CHECK: ret i32 1
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// <rdr://6115726>
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@ -6,7 +6,7 @@
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// Test RISC-V specific inline assembly constraints.
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void test_I() {
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// CHECK-LABEL: define void @test_I()
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// CHECK-LABEL: define{{.*}} void @test_I()
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// CHECK: call void asm sideeffect "", "I"(i32 2047)
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asm volatile ("" :: "I"(2047));
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// CHECK: call void asm sideeffect "", "I"(i32 -2048)
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@ -14,13 +14,13 @@ void test_I() {
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}
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void test_J() {
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// CHECK-LABEL: define void @test_J()
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// CHECK-LABEL: define{{.*}} void @test_J()
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// CHECK: call void asm sideeffect "", "J"(i32 0)
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asm volatile ("" :: "J"(0));
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}
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void test_K() {
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// CHECK-LABEL: define void @test_K()
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// CHECK-LABEL: define{{.*}} void @test_K()
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// CHECK: call void asm sideeffect "", "K"(i32 31)
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asm volatile ("" :: "K"(31));
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// CHECK: call void asm sideeffect "", "K"(i32 0)
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@ -30,7 +30,7 @@ void test_K() {
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float f;
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double d;
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void test_f() {
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// CHECK-LABEL: define void @test_f()
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// CHECK-LABEL: define{{.*}} void @test_f()
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// CHECK: [[FLT_ARG:%[a-zA-Z_0-9]+]] = load float, float* @f
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// CHECK: call void asm sideeffect "", "f"(float [[FLT_ARG]])
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asm volatile ("" :: "f"(f));
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@ -40,7 +40,7 @@ void test_f() {
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}
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void test_A(int *p) {
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// CHECK-LABEL: define void @test_A(i32* %p)
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// CHECK-LABEL: define{{.*}} void @test_A(i32* %p)
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// CHECK: call void asm sideeffect "", "*A"(i32* %p)
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asm volatile("" :: "A"(*p));
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}
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@ -25,7 +25,7 @@ struct large {
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// Scalars passed on the stack should not have signext/zeroext attributes
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// (they are anyext).
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// CHECK-LABEL: define i32 @f_scalar_stack_1(i32 %a, i64 %b, float %c, double %d, fp128 %e, i8 zeroext %f, i8 %g, i8 %h)
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// CHECK-LABEL: define{{.*}} i32 @f_scalar_stack_1(i32 %a, i64 %b, float %c, double %d, fp128 %e, i8 zeroext %f, i8 %g, i8 %h)
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int f_scalar_stack_1(int32_t a, int64_t b, float c, double d, long double e,
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uint8_t f, int8_t g, uint8_t h) {
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return g + h;
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@ -35,7 +35,7 @@ int f_scalar_stack_1(int32_t a, int64_t b, float c, double d, long double e,
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// the presence of large return values that consume a register due to the need
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// to pass a pointer.
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// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, float %a, i64 %b, double %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
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// CHECK-LABEL: define{{.*}} void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, float %a, i64 %b, double %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
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struct large f_scalar_stack_2(float a, int64_t b, double c, long double d,
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uint8_t e, int8_t f, uint8_t g) {
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return (struct large){a, e, f, g};
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@ -44,10 +44,10 @@ struct large f_scalar_stack_2(float a, int64_t b, double c, long double d,
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// Aggregates and >=XLen scalars passed on the stack should be lowered just as
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// they would be if passed via registers.
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// CHECK-LABEL: define void @f_scalar_stack_3(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, float %g, double %h, fp128 %i)
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// CHECK-LABEL: define{{.*}} void @f_scalar_stack_3(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, float %g, double %h, fp128 %i)
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void f_scalar_stack_3(double a, int64_t b, double c, int64_t d, int e,
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int64_t f, float g, double h, long double i) {}
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// CHECK-LABEL: define void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
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// CHECK-LABEL: define{{.*}} void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
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void f_agg_stack(double a, int64_t b, double c, int64_t d, struct tiny e,
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struct small f, struct small_aligned g, struct large h) {}
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@ -27,7 +27,7 @@ struct large {
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// Scalars passed on the stack should not have signext/zeroext attributes
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// (they are anyext).
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// CHECK-LABEL: define i32 @f_scalar_stack_1(i32 %a, i64 %b, i32 %c, double %d, fp128 %e, i8 zeroext %f, i8 %g, i8 %h)
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// CHECK-LABEL: define{{.*}} i32 @f_scalar_stack_1(i32 %a, i64 %b, i32 %c, double %d, fp128 %e, i8 zeroext %f, i8 %g, i8 %h)
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int f_scalar_stack_1(int32_t a, int64_t b, int32_t c, double d, long double e,
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uint8_t f, int8_t g, uint8_t h) {
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return g + h;
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@ -37,7 +37,7 @@ int f_scalar_stack_1(int32_t a, int64_t b, int32_t c, double d, long double e,
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// the presence of large return values that consume a register due to the need
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// to pass a pointer.
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// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %a, i64 %b, double %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
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// CHECK-LABEL: define{{.*}} void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %a, i64 %b, double %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
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struct large f_scalar_stack_2(int32_t a, int64_t b, double c, long double d,
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uint8_t e, int8_t f, uint8_t g) {
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return (struct large){a, e, f, g};
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@ -46,10 +46,10 @@ struct large f_scalar_stack_2(int32_t a, int64_t b, double c, long double d,
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// Aggregates and >=XLen scalars passed on the stack should be lowered just as
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// they would be if passed via registers.
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// CHECK-LABEL: define void @f_scalar_stack_3(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, i32 %g, double %h, fp128 %i)
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// CHECK-LABEL: define{{.*}} void @f_scalar_stack_3(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, i32 %g, double %h, fp128 %i)
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void f_scalar_stack_3(double a, int64_t b, double c, int64_t d, int e,
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int64_t f, int32_t g, double h, long double i) {}
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// CHECK-LABEL: define void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
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// CHECK-LABEL: define{{.*}} void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
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void f_agg_stack(double a, int64_t b, double c, int64_t d, struct tiny e,
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struct small f, struct small_aligned g, struct large h) {}
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@ -12,57 +12,57 @@
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#include <stddef.h>
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#include <stdint.h>
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// CHECK-LABEL: define void @f_void()
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// CHECK-LABEL: define{{.*}} void @f_void()
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void f_void(void) {}
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// Scalar arguments and return values smaller than the word size are extended
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// according to the sign of their type, up to 32 bits
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// CHECK-LABEL: define zeroext i1 @f_scalar_0(i1 zeroext %x)
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// CHECK-LABEL: define{{.*}} zeroext i1 @f_scalar_0(i1 zeroext %x)
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_Bool f_scalar_0(_Bool x) { return x; }
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// CHECK-LABEL: define signext i8 @f_scalar_1(i8 signext %x)
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// CHECK-LABEL: define{{.*}} signext i8 @f_scalar_1(i8 signext %x)
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int8_t f_scalar_1(int8_t x) { return x; }
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// CHECK-LABEL: define zeroext i8 @f_scalar_2(i8 zeroext %x)
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// CHECK-LABEL: define{{.*}} zeroext i8 @f_scalar_2(i8 zeroext %x)
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uint8_t f_scalar_2(uint8_t x) { return x; }
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// CHECK-LABEL: define i32 @f_scalar_3(i32 %x)
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// CHECK-LABEL: define{{.*}} i32 @f_scalar_3(i32 %x)
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int32_t f_scalar_3(int32_t x) { return x; }
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// CHECK-LABEL: define i64 @f_scalar_4(i64 %x)
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// CHECK-LABEL: define{{.*}} i64 @f_scalar_4(i64 %x)
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int64_t f_scalar_4(int64_t x) { return x; }
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#ifdef __SIZEOF_INT128__
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// CHECK-FORCEINT128-LABEL: define i128 @f_scalar_5(i128 %x)
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// CHECK-FORCEINT128-LABEL: define{{.*}} i128 @f_scalar_5(i128 %x)
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__int128_t f_scalar_5(__int128_t x) { return x; }
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#endif
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// CHECK-LABEL: define float @f_fp_scalar_1(float %x)
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// CHECK-LABEL: define{{.*}} float @f_fp_scalar_1(float %x)
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float f_fp_scalar_1(float x) { return x; }
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// CHECK-LABEL: define double @f_fp_scalar_2(double %x)
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// CHECK-LABEL: define{{.*}} double @f_fp_scalar_2(double %x)
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double f_fp_scalar_2(double x) { return x; }
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// Scalars larger than 2*xlen are passed/returned indirect. However, the
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// RISC-V LLVM backend can handle this fine, so the function doesn't need to
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// be modified.
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// CHECK-LABEL: define fp128 @f_fp_scalar_3(fp128 %x)
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// CHECK-LABEL: define{{.*}} fp128 @f_fp_scalar_3(fp128 %x)
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long double f_fp_scalar_3(long double x) { return x; }
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// Empty structs or unions are ignored.
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struct empty_s {};
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// CHECK-LABEL: define void @f_agg_empty_struct()
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// CHECK-LABEL: define{{.*}} void @f_agg_empty_struct()
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struct empty_s f_agg_empty_struct(struct empty_s x) {
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return x;
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}
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union empty_u {};
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// CHECK-LABEL: define void @f_agg_empty_union()
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// CHECK-LABEL: define{{.*}} void @f_agg_empty_union()
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union empty_u f_agg_empty_union(union empty_u x) {
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return x;
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}
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@ -74,13 +74,13 @@ struct tiny {
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uint8_t a, b, c, d;
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};
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// CHECK-LABEL: define void @f_agg_tiny(i32 %x.coerce)
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// CHECK-LABEL: define{{.*}} void @f_agg_tiny(i32 %x.coerce)
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void f_agg_tiny(struct tiny x) {
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x.a += x.b;
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x.c += x.d;
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}
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// CHECK-LABEL: define i32 @f_agg_tiny_ret()
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// CHECK-LABEL: define{{.*}} i32 @f_agg_tiny_ret()
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struct tiny f_agg_tiny_ret() {
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return (struct tiny){1, 2, 3, 4};
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}
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@ -88,23 +88,23 @@ struct tiny f_agg_tiny_ret() {
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typedef uint8_t v4i8 __attribute__((vector_size(4)));
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typedef int32_t v1i32 __attribute__((vector_size(4)));
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// CHECK-LABEL: define void @f_vec_tiny_v4i8(i32 %x.coerce)
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// CHECK-LABEL: define{{.*}} void @f_vec_tiny_v4i8(i32 %x.coerce)
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void f_vec_tiny_v4i8(v4i8 x) {
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x[0] = x[1];
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x[2] = x[3];
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}
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// CHECK-LABEL: define i32 @f_vec_tiny_v4i8_ret()
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// CHECK-LABEL: define{{.*}} i32 @f_vec_tiny_v4i8_ret()
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v4i8 f_vec_tiny_v4i8_ret() {
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return (v4i8){1, 2, 3, 4};
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}
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// CHECK-LABEL: define void @f_vec_tiny_v1i32(i32 %x.coerce)
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// CHECK-LABEL: define{{.*}} void @f_vec_tiny_v1i32(i32 %x.coerce)
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void f_vec_tiny_v1i32(v1i32 x) {
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x[0] = 114;
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}
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// CHECK-LABEL: define i32 @f_vec_tiny_v1i32_ret()
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// CHECK-LABEL: define{{.*}} i32 @f_vec_tiny_v1i32_ret()
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v1i32 f_vec_tiny_v1i32_ret() {
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return (v1i32){1};
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}
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@ -113,13 +113,13 @@ struct small {
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int32_t a, *b;
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};
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// CHECK-LABEL: define void @f_agg_small([2 x i32] %x.coerce)
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// CHECK-LABEL: define{{.*}} void @f_agg_small([2 x i32] %x.coerce)
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void f_agg_small(struct small x) {
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x.a += *x.b;
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x.b = &x.a;
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}
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// CHECK-LABEL: define [2 x i32] @f_agg_small_ret()
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// CHECK-LABEL: define{{.*}} [2 x i32] @f_agg_small_ret()
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struct small f_agg_small_ret() {
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return (struct small){1, 0};
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}
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@ -127,22 +127,22 @@ struct small f_agg_small_ret() {
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typedef uint8_t v8i8 __attribute__((vector_size(8)));
|
||||
typedef int64_t v1i64 __attribute__((vector_size(8)));
|
||||
|
||||
// CHECK-LABEL: define void @f_vec_small_v8i8(i64 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_vec_small_v8i8(i64 %x.coerce)
|
||||
void f_vec_small_v8i8(v8i8 x) {
|
||||
x[0] = x[7];
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @f_vec_small_v8i8_ret()
|
||||
// CHECK-LABEL: define{{.*}} i64 @f_vec_small_v8i8_ret()
|
||||
v8i8 f_vec_small_v8i8_ret() {
|
||||
return (v8i8){1, 2, 3, 4, 5, 6, 7, 8};
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @f_vec_small_v1i64(i64 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_vec_small_v1i64(i64 %x.coerce)
|
||||
void f_vec_small_v1i64(v1i64 x) {
|
||||
x[0] = 114;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @f_vec_small_v1i64_ret()
|
||||
// CHECK-LABEL: define{{.*}} i64 @f_vec_small_v1i64_ret()
|
||||
v1i64 f_vec_small_v1i64_ret() {
|
||||
return (v1i64){1};
|
||||
}
|
||||
@ -155,12 +155,12 @@ struct small_aligned {
|
||||
int64_t a;
|
||||
};
|
||||
|
||||
// CHECK-LABEL: define void @f_agg_small_aligned(i64 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_agg_small_aligned(i64 %x.coerce)
|
||||
void f_agg_small_aligned(struct small_aligned x) {
|
||||
x.a += x.a;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @f_agg_small_aligned_ret(i64 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} i64 @f_agg_small_aligned_ret(i64 %x.coerce)
|
||||
struct small_aligned f_agg_small_aligned_ret(struct small_aligned x) {
|
||||
return (struct small_aligned){10};
|
||||
}
|
||||
@ -170,26 +170,26 @@ struct large {
|
||||
int32_t a, b, c, d;
|
||||
};
|
||||
|
||||
// CHECK-LABEL: define void @f_agg_large(%struct.large* %x)
|
||||
// CHECK-LABEL: define{{.*}} void @f_agg_large(%struct.large* %x)
|
||||
void f_agg_large(struct large x) {
|
||||
x.a = x.b + x.c + x.d;
|
||||
}
|
||||
|
||||
// The address where the struct should be written to will be the first
|
||||
// argument
|
||||
// CHECK-LABEL: define void @f_agg_large_ret(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %i, i8 signext %j)
|
||||
// CHECK-LABEL: define{{.*}} void @f_agg_large_ret(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %i, i8 signext %j)
|
||||
struct large f_agg_large_ret(int32_t i, int8_t j) {
|
||||
return (struct large){1, 2, 3, 4};
|
||||
}
|
||||
|
||||
typedef unsigned char v16i8 __attribute__((vector_size(16)));
|
||||
|
||||
// CHECK-LABEL: define void @f_vec_large_v16i8(<16 x i8>* %0)
|
||||
// CHECK-LABEL: define{{.*}} void @f_vec_large_v16i8(<16 x i8>* %0)
|
||||
void f_vec_large_v16i8(v16i8 x) {
|
||||
x[0] = x[7];
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @f_vec_large_v16i8_ret(<16 x i8>* noalias sret(<16 x i8>) align 16 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @f_vec_large_v16i8_ret(<16 x i8>* noalias sret(<16 x i8>) align 16 %agg.result)
|
||||
v16i8 f_vec_large_v16i8_ret() {
|
||||
return (v16i8){1, 2, 3, 4, 5, 6, 7, 8};
|
||||
}
|
||||
@ -197,7 +197,7 @@ v16i8 f_vec_large_v16i8_ret() {
|
||||
// Scalars passed on the stack should not have signext/zeroext attributes
|
||||
// (they are anyext).
|
||||
|
||||
// CHECK-LABEL: define i32 @f_scalar_stack_1(i32 %a.coerce, [2 x i32] %b.coerce, i64 %c.coerce, %struct.large* %d, i8 zeroext %e, i8 signext %f, i8 %g, i8 %h)
|
||||
// CHECK-LABEL: define{{.*}} i32 @f_scalar_stack_1(i32 %a.coerce, [2 x i32] %b.coerce, i64 %c.coerce, %struct.large* %d, i8 zeroext %e, i8 signext %f, i8 %g, i8 %h)
|
||||
int f_scalar_stack_1(struct tiny a, struct small b, struct small_aligned c,
|
||||
struct large d, uint8_t e, int8_t f, uint8_t g, int8_t h) {
|
||||
return g + h;
|
||||
@ -207,13 +207,13 @@ int f_scalar_stack_1(struct tiny a, struct small b, struct small_aligned c,
|
||||
// the presence of large return values that consume a register due to the need
|
||||
// to pass a pointer.
|
||||
|
||||
// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %a, i64 %b, i64 %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
|
||||
// CHECK-LABEL: define{{.*}} void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 4 %agg.result, i32 %a, i64 %b, i64 %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
|
||||
struct large f_scalar_stack_2(int32_t a, int64_t b, int64_t c, long double d,
|
||||
uint8_t e, int8_t f, uint8_t g) {
|
||||
return (struct large){a, e, f, g};
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define fp128 @f_scalar_stack_4(i32 %a, i64 %b, i64 %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
|
||||
// CHECK-LABEL: define{{.*}} fp128 @f_scalar_stack_4(i32 %a, i64 %b, i64 %c, fp128 %d, i8 zeroext %e, i8 %f, i8 %g)
|
||||
long double f_scalar_stack_4(int32_t a, int64_t b, int64_t c, long double d,
|
||||
uint8_t e, int8_t f, uint8_t g) {
|
||||
return d;
|
||||
@ -222,11 +222,11 @@ long double f_scalar_stack_4(int32_t a, int64_t b, int64_t c, long double d,
|
||||
// Aggregates and >=XLen scalars passed on the stack should be lowered just as
|
||||
// they would be if passed via registers.
|
||||
|
||||
// CHECK-LABEL: define void @f_scalar_stack_5(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, float %g, double %h, fp128 %i)
|
||||
// CHECK-LABEL: define{{.*}} void @f_scalar_stack_5(double %a, i64 %b, double %c, i64 %d, i32 %e, i64 %f, float %g, double %h, fp128 %i)
|
||||
void f_scalar_stack_5(double a, int64_t b, double c, int64_t d, int e,
|
||||
int64_t f, float g, double h, long double i) {}
|
||||
|
||||
// CHECK-LABEL: define void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
|
||||
// CHECK-LABEL: define{{.*}} void @f_agg_stack(double %a, i64 %b, double %c, i64 %d, i32 %e.coerce, [2 x i32] %f.coerce, i64 %g.coerce, %struct.large* %h)
|
||||
void f_agg_stack(double a, int64_t b, double c, int64_t d, struct tiny e,
|
||||
struct small f, struct small_aligned g, struct large h) {}
|
||||
|
||||
@ -236,7 +236,7 @@ void f_agg_stack(double a, int64_t b, double c, int64_t d, struct tiny e,
|
||||
|
||||
int f_va_callee(int, ...);
|
||||
|
||||
// CHECK-LABEL: define void @f_va_caller()
|
||||
// CHECK-LABEL: define{{.*}} void @f_va_caller()
|
||||
// CHECK: call i32 (i32, ...) @f_va_callee(i32 1, i32 2, i64 3, double 4.000000e+00, double 5.000000e+00, i32 {{%.*}}, [2 x i32] {{%.*}}, i64 {{%.*}}, %struct.large* {{%.*}})
|
||||
void f_va_caller() {
|
||||
f_va_callee(1, 2, 3LL, 4.0f, 5.0, (struct tiny){6, 7, 8, 9},
|
||||
@ -244,7 +244,7 @@ void f_va_caller() {
|
||||
(struct large){12, 13, 14, 15});
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @f_va_1(i8* %fmt, ...) {{.*}} {
|
||||
// CHECK-LABEL: define{{.*}} i32 @f_va_1(i8* %fmt, ...) {{.*}} {
|
||||
// CHECK: [[FMT_ADDR:%.*]] = alloca i8*, align 4
|
||||
// CHECK: [[VA:%.*]] = alloca i8*, align 4
|
||||
// CHECK: [[V:%.*]] = alloca i32, align 4
|
||||
@ -362,7 +362,7 @@ double f_va_3(char *fmt, ...) {
|
||||
return v + x;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @f_va_4(i8* %fmt, ...) {{.*}} {
|
||||
// CHECK-LABEL: define{{.*}} i32 @f_va_4(i8* %fmt, ...) {{.*}} {
|
||||
// CHECK: [[FMT_ADDR:%.*]] = alloca i8*, align 4
|
||||
// CHECK-NEXT: [[VA:%.*]] = alloca i8*, align 4
|
||||
// CHECK-NEXT: [[V:%.*]] = alloca i32, align 4
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
// Doubles are passed in FPRs, so argument 'i' will be passed zero-extended
|
||||
// because it will be passed in a GPR.
|
||||
|
||||
// CHECK: define void @f_fpr_tracking(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, i8 zeroext %i)
|
||||
// CHECK: define{{.*}} void @f_fpr_tracking(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, i8 zeroext %i)
|
||||
void f_fpr_tracking(double a, double b, double c, double d, double e, double f,
|
||||
double g, double h, uint8_t i) {}
|
||||
|
||||
@ -25,10 +25,10 @@ void f_fpr_tracking(double a, double b, double c, double d, double e, double f,
|
||||
|
||||
struct double_s { double f; };
|
||||
|
||||
// CHECK: define void @f_double_s_arg(double %0)
|
||||
// CHECK: define{{.*}} void @f_double_s_arg(double %0)
|
||||
void f_double_s_arg(struct double_s a) {}
|
||||
|
||||
// CHECK: define double @f_ret_double_s()
|
||||
// CHECK: define{{.*}} double @f_ret_double_s()
|
||||
struct double_s f_ret_double_s() {
|
||||
return (struct double_s){1.0};
|
||||
}
|
||||
@ -39,18 +39,18 @@ struct double_s f_ret_double_s() {
|
||||
struct zbf_double_s { int : 0; double f; };
|
||||
struct zbf_double_zbf_s { int : 0; double f; int : 0; };
|
||||
|
||||
// CHECK: define void @f_zbf_double_s_arg(double %0)
|
||||
// CHECK: define{{.*}} void @f_zbf_double_s_arg(double %0)
|
||||
void f_zbf_double_s_arg(struct zbf_double_s a) {}
|
||||
|
||||
// CHECK: define double @f_ret_zbf_double_s()
|
||||
// CHECK: define{{.*}} double @f_ret_zbf_double_s()
|
||||
struct zbf_double_s f_ret_zbf_double_s() {
|
||||
return (struct zbf_double_s){1.0};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_zbf_double_zbf_s_arg(double %0)
|
||||
// CHECK: define{{.*}} void @f_zbf_double_zbf_s_arg(double %0)
|
||||
void f_zbf_double_zbf_s_arg(struct zbf_double_zbf_s a) {}
|
||||
|
||||
// CHECK: define double @f_ret_zbf_double_zbf_s()
|
||||
// CHECK: define{{.*}} double @f_ret_zbf_double_zbf_s()
|
||||
struct zbf_double_zbf_s f_ret_zbf_double_zbf_s() {
|
||||
return (struct zbf_double_zbf_s){1.0};
|
||||
}
|
||||
@ -61,23 +61,23 @@ struct zbf_double_zbf_s f_ret_zbf_double_zbf_s() {
|
||||
struct double_double_s { double f; double g; };
|
||||
struct double_float_s { double f; float g; };
|
||||
|
||||
// CHECK: define void @f_double_double_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_double_double_s_arg(double %0, double %1)
|
||||
void f_double_double_s_arg(struct double_double_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_double_double_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_double_double_s()
|
||||
struct double_double_s f_ret_double_double_s() {
|
||||
return (struct double_double_s){1.0, 2.0};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_float_s_arg(double %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_double_float_s_arg(double %0, float %1)
|
||||
void f_double_float_s_arg(struct double_float_s a) {}
|
||||
|
||||
// CHECK: define { double, float } @f_ret_double_float_s()
|
||||
// CHECK: define{{.*}} { double, float } @f_ret_double_float_s()
|
||||
struct double_float_s f_ret_double_float_s() {
|
||||
return (struct double_float_s){1.0, 2.0};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_double_s_arg_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, %struct.double_double_s* %h)
|
||||
// CHECK: define{{.*}} void @f_double_double_s_arg_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, %struct.double_double_s* %h)
|
||||
void f_double_double_s_arg_insufficient_fprs(float a, double b, double c, double d,
|
||||
double e, double f, double g, struct double_double_s h) {}
|
||||
|
||||
@ -92,42 +92,42 @@ struct double_int64_s { double f; int64_t i; };
|
||||
struct double_int64bf_s { double f; int64_t i : 32; };
|
||||
struct double_int8_zbf_s { double f; int8_t i; int : 0; };
|
||||
|
||||
// CHECK: define void @f_double_int8_s_arg(double %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_double_int8_s_arg(double %0, i8 %1)
|
||||
void f_double_int8_s_arg(struct double_int8_s a) {}
|
||||
|
||||
// CHECK: define { double, i8 } @f_ret_double_int8_s()
|
||||
// CHECK: define{{.*}} { double, i8 } @f_ret_double_int8_s()
|
||||
struct double_int8_s f_ret_double_int8_s() {
|
||||
return (struct double_int8_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_uint8_s_arg(double %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_double_uint8_s_arg(double %0, i8 %1)
|
||||
void f_double_uint8_s_arg(struct double_uint8_s a) {}
|
||||
|
||||
// CHECK: define { double, i8 } @f_ret_double_uint8_s()
|
||||
// CHECK: define{{.*}} { double, i8 } @f_ret_double_uint8_s()
|
||||
struct double_uint8_s f_ret_double_uint8_s() {
|
||||
return (struct double_uint8_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_int32_s_arg(double %0, i32 %1)
|
||||
// CHECK: define{{.*}} void @f_double_int32_s_arg(double %0, i32 %1)
|
||||
void f_double_int32_s_arg(struct double_int32_s a) {}
|
||||
|
||||
// CHECK: define { double, i32 } @f_ret_double_int32_s()
|
||||
// CHECK: define{{.*}} { double, i32 } @f_ret_double_int32_s()
|
||||
struct double_int32_s f_ret_double_int32_s() {
|
||||
return (struct double_int32_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_int64_s_arg(%struct.double_int64_s* %a)
|
||||
// CHECK: define{{.*}} void @f_double_int64_s_arg(%struct.double_int64_s* %a)
|
||||
void f_double_int64_s_arg(struct double_int64_s a) {}
|
||||
|
||||
// CHECK: define void @f_ret_double_int64_s(%struct.double_int64_s* noalias sret(%struct.double_int64_s) align 8 %agg.result)
|
||||
// CHECK: define{{.*}} void @f_ret_double_int64_s(%struct.double_int64_s* noalias sret(%struct.double_int64_s) align 8 %agg.result)
|
||||
struct double_int64_s f_ret_double_int64_s() {
|
||||
return (struct double_int64_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_int64bf_s_arg(double %0, i32 %1)
|
||||
// CHECK: define{{.*}} void @f_double_int64bf_s_arg(double %0, i32 %1)
|
||||
void f_double_int64bf_s_arg(struct double_int64bf_s a) {}
|
||||
|
||||
// CHECK: define { double, i32 } @f_ret_double_int64bf_s()
|
||||
// CHECK: define{{.*}} { double, i32 } @f_ret_double_int64bf_s()
|
||||
struct double_int64bf_s f_ret_double_int64bf_s() {
|
||||
return (struct double_int64bf_s){1.0, 2};
|
||||
}
|
||||
@ -135,39 +135,39 @@ struct double_int64bf_s f_ret_double_int64bf_s() {
|
||||
// The zero-width bitfield means the struct can't be passed according to the
|
||||
// floating point calling convention.
|
||||
|
||||
// CHECK: define void @f_double_int8_zbf_s(double %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_double_int8_zbf_s(double %0, i8 %1)
|
||||
void f_double_int8_zbf_s(struct double_int8_zbf_s a) {}
|
||||
|
||||
// CHECK: define { double, i8 } @f_ret_double_int8_zbf_s()
|
||||
// CHECK: define{{.*}} { double, i8 } @f_ret_double_int8_zbf_s()
|
||||
struct double_int8_zbf_s f_ret_double_int8_zbf_s() {
|
||||
return (struct double_int8_zbf_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_int8_s_arg_insufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, %struct.double_int8_s* %i)
|
||||
// CHECK: define{{.*}} void @f_double_int8_s_arg_insufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, %struct.double_int8_s* %i)
|
||||
void f_double_int8_s_arg_insufficient_gprs(int a, int b, int c, int d, int e,
|
||||
int f, int g, int h, struct double_int8_s i) {}
|
||||
|
||||
// CHECK: define void @f_struct_double_int8_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, %struct.double_int8_s* %i)
|
||||
// CHECK: define{{.*}} void @f_struct_double_int8_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, %struct.double_int8_s* %i)
|
||||
void f_struct_double_int8_insufficient_fprs(float a, double b, double c, double d,
|
||||
double e, double f, double g, double h, struct double_int8_s i) {}
|
||||
|
||||
// Complex floating-point values or structs containing a single complex
|
||||
// floating-point value should be passed as if it were an fp+fp struct.
|
||||
|
||||
// CHECK: define void @f_doublecomplex(double %a.coerce0, double %a.coerce1)
|
||||
// CHECK: define{{.*}} void @f_doublecomplex(double %a.coerce0, double %a.coerce1)
|
||||
void f_doublecomplex(double __complex__ a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublecomplex()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublecomplex()
|
||||
double __complex__ f_ret_doublecomplex() {
|
||||
return 1.0;
|
||||
}
|
||||
|
||||
struct doublecomplex_s { double __complex__ c; };
|
||||
|
||||
// CHECK: define void @f_doublecomplex_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublecomplex_s_arg(double %0, double %1)
|
||||
void f_doublecomplex_s_arg(struct doublecomplex_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublecomplex_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublecomplex_s()
|
||||
struct doublecomplex_s f_ret_doublecomplex_s() {
|
||||
return (struct doublecomplex_s){1.0};
|
||||
}
|
||||
@ -177,60 +177,60 @@ struct doublecomplex_s f_ret_doublecomplex_s() {
|
||||
|
||||
struct doublearr1_s { double a[1]; };
|
||||
|
||||
// CHECK: define void @f_doublearr1_s_arg(double %0)
|
||||
// CHECK: define{{.*}} void @f_doublearr1_s_arg(double %0)
|
||||
void f_doublearr1_s_arg(struct doublearr1_s a) {}
|
||||
|
||||
// CHECK: define double @f_ret_doublearr1_s()
|
||||
// CHECK: define{{.*}} double @f_ret_doublearr1_s()
|
||||
struct doublearr1_s f_ret_doublearr1_s() {
|
||||
return (struct doublearr1_s){{1.0}};
|
||||
}
|
||||
|
||||
struct doublearr2_s { double a[2]; };
|
||||
|
||||
// CHECK: define void @f_doublearr2_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublearr2_s_arg(double %0, double %1)
|
||||
void f_doublearr2_s_arg(struct doublearr2_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublearr2_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_s()
|
||||
struct doublearr2_s f_ret_doublearr2_s() {
|
||||
return (struct doublearr2_s){{1.0, 2.0}};
|
||||
}
|
||||
|
||||
struct doublearr2_tricky1_s { struct { double f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_doublearr2_tricky1_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublearr2_tricky1_s_arg(double %0, double %1)
|
||||
void f_doublearr2_tricky1_s_arg(struct doublearr2_tricky1_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublearr2_tricky1_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky1_s()
|
||||
struct doublearr2_tricky1_s f_ret_doublearr2_tricky1_s() {
|
||||
return (struct doublearr2_tricky1_s){{{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct doublearr2_tricky2_s { struct {}; struct { double f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_doublearr2_tricky2_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublearr2_tricky2_s_arg(double %0, double %1)
|
||||
void f_doublearr2_tricky2_s_arg(struct doublearr2_tricky2_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublearr2_tricky2_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky2_s()
|
||||
struct doublearr2_tricky2_s f_ret_doublearr2_tricky2_s() {
|
||||
return (struct doublearr2_tricky2_s){{}, {{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct doublearr2_tricky3_s { union {}; struct { double f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_doublearr2_tricky3_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublearr2_tricky3_s_arg(double %0, double %1)
|
||||
void f_doublearr2_tricky3_s_arg(struct doublearr2_tricky3_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublearr2_tricky3_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky3_s()
|
||||
struct doublearr2_tricky3_s f_ret_doublearr2_tricky3_s() {
|
||||
return (struct doublearr2_tricky3_s){{}, {{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct doublearr2_tricky4_s { union {}; struct { struct {}; double f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_doublearr2_tricky4_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublearr2_tricky4_s_arg(double %0, double %1)
|
||||
void f_doublearr2_tricky4_s_arg(struct doublearr2_tricky4_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublearr2_tricky4_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky4_s()
|
||||
struct doublearr2_tricky4_s f_ret_doublearr2_tricky4_s() {
|
||||
return (struct doublearr2_tricky4_s){{}, {{{}, {1.0}}, {{}, {2.0}}}};
|
||||
}
|
||||
@ -240,30 +240,30 @@ struct doublearr2_tricky4_s f_ret_doublearr2_tricky4_s() {
|
||||
|
||||
struct int_double_int_s { int a; double b; int c; };
|
||||
|
||||
// CHECK: define void @f_int_double_int_s_arg(%struct.int_double_int_s* %a)
|
||||
// CHECK: define{{.*}} void @f_int_double_int_s_arg(%struct.int_double_int_s* %a)
|
||||
void f_int_double_int_s_arg(struct int_double_int_s a) {}
|
||||
|
||||
// CHECK: define void @f_ret_int_double_int_s(%struct.int_double_int_s* noalias sret(%struct.int_double_int_s) align 8 %agg.result)
|
||||
// CHECK: define{{.*}} void @f_ret_int_double_int_s(%struct.int_double_int_s* noalias sret(%struct.int_double_int_s) align 8 %agg.result)
|
||||
struct int_double_int_s f_ret_int_double_int_s() {
|
||||
return (struct int_double_int_s){1, 2.0, 3};
|
||||
}
|
||||
|
||||
struct int64_double_s { int64_t a; double b; };
|
||||
|
||||
// CHECK: define void @f_int64_double_s_arg(%struct.int64_double_s* %a)
|
||||
// CHECK: define{{.*}} void @f_int64_double_s_arg(%struct.int64_double_s* %a)
|
||||
void f_int64_double_s_arg(struct int64_double_s a) {}
|
||||
|
||||
// CHECK: define void @f_ret_int64_double_s(%struct.int64_double_s* noalias sret(%struct.int64_double_s) align 8 %agg.result)
|
||||
// CHECK: define{{.*}} void @f_ret_int64_double_s(%struct.int64_double_s* noalias sret(%struct.int64_double_s) align 8 %agg.result)
|
||||
struct int64_double_s f_ret_int64_double_s() {
|
||||
return (struct int64_double_s){1, 2.0};
|
||||
}
|
||||
|
||||
struct char_char_double_s { char a; char b; double c; };
|
||||
|
||||
// CHECK-LABEL: define void @f_char_char_double_s_arg(%struct.char_char_double_s* %a)
|
||||
// CHECK-LABEL: define{{.*}} void @f_char_char_double_s_arg(%struct.char_char_double_s* %a)
|
||||
void f_char_char_double_s_arg(struct char_char_double_s a) {}
|
||||
|
||||
// CHECK: define void @f_ret_char_char_double_s(%struct.char_char_double_s* noalias sret(%struct.char_char_double_s) align 8 %agg.result)
|
||||
// CHECK: define{{.*}} void @f_ret_char_char_double_s(%struct.char_char_double_s* noalias sret(%struct.char_char_double_s) align 8 %agg.result)
|
||||
struct char_char_double_s f_ret_char_char_double_s() {
|
||||
return (struct char_char_double_s){1, 2, 3.0};
|
||||
}
|
||||
@ -273,10 +273,10 @@ struct char_char_double_s f_ret_char_char_double_s() {
|
||||
|
||||
union double_u { double a; };
|
||||
|
||||
// CHECK: define void @f_double_u_arg(i64 %a.coerce)
|
||||
// CHECK: define{{.*}} void @f_double_u_arg(i64 %a.coerce)
|
||||
void f_double_u_arg(union double_u a) {}
|
||||
|
||||
// CHECK: define i64 @f_ret_double_u()
|
||||
// CHECK: define{{.*}} i64 @f_ret_double_u()
|
||||
union double_u f_ret_double_u() {
|
||||
return (union double_u){1.0};
|
||||
}
|
||||
@ -287,19 +287,19 @@ union double_u f_ret_double_u() {
|
||||
// returned in registers). This includes complex doubles, which are treated as
|
||||
// double+double structs by the ABI.
|
||||
|
||||
// CHECK: define { double, i32 } @f_ret_double_int32_s_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
|
||||
// CHECK: define{{.*}} { double, i32 } @f_ret_double_int32_s_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
|
||||
struct double_int32_s f_ret_double_int32_s_double_int32_s_just_sufficient_gprs(
|
||||
int a, int b, int c, int d, int e, int f, int g, struct double_int32_s h) {
|
||||
return (struct double_int32_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_double_double_s_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_double_double_s_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
|
||||
struct double_double_s f_ret_double_double_s_double_int32_s_just_sufficient_gprs(
|
||||
int a, int b, int c, int d, int e, int f, int g, struct double_int32_s h) {
|
||||
return (struct double_double_s){1.0, 2.0};
|
||||
}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublecomplex_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublecomplex_double_int32_s_just_sufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, double %0, i32 %1)
|
||||
double __complex__ f_ret_doublecomplex_double_int32_s_just_sufficient_gprs(
|
||||
int a, int b, int c, int d, int e, int f, int g, struct double_int32_s h) {
|
||||
return 1.0;
|
||||
|
||||
@ -6,27 +6,27 @@
|
||||
// Doubles are still passed in GPRs, so the 'e' argument will be anyext as
|
||||
// GPRs are exhausted.
|
||||
|
||||
// CHECK: define void @f_fpr_tracking(double %a, double %b, double %c, double %d, i8 %e)
|
||||
// CHECK: define{{.*}} void @f_fpr_tracking(double %a, double %b, double %c, double %d, i8 %e)
|
||||
void f_fpr_tracking(double a, double b, double c, double d, int8_t e) {}
|
||||
|
||||
// Lowering for doubles is unnmodified, as 64 > FLEN.
|
||||
|
||||
struct double_s { double d; };
|
||||
|
||||
// CHECK: define void @f_double_s_arg(i64 %a.coerce)
|
||||
// CHECK: define{{.*}} void @f_double_s_arg(i64 %a.coerce)
|
||||
void f_double_s_arg(struct double_s a) {}
|
||||
|
||||
// CHECK: define i64 @f_ret_double_s()
|
||||
// CHECK: define{{.*}} i64 @f_ret_double_s()
|
||||
struct double_s f_ret_double_s() {
|
||||
return (struct double_s){1.0};
|
||||
}
|
||||
|
||||
struct double_double_s { double d; double e; };
|
||||
|
||||
// CHECK: define void @f_double_double_s_arg(%struct.double_double_s* %a)
|
||||
// CHECK: define{{.*}} void @f_double_double_s_arg(%struct.double_double_s* %a)
|
||||
void f_double_double_s_arg(struct double_double_s a) {}
|
||||
|
||||
// CHECK: define void @f_ret_double_double_s(%struct.double_double_s* noalias sret(%struct.double_double_s) align 8 %agg.result)
|
||||
// CHECK: define{{.*}} void @f_ret_double_double_s(%struct.double_double_s* noalias sret(%struct.double_double_s) align 8 %agg.result)
|
||||
struct double_double_s f_ret_double_double_s() {
|
||||
return (struct double_double_s){1.0, 2.0};
|
||||
}
|
||||
@ -35,10 +35,10 @@ struct double_int8_s { double d; int64_t i; };
|
||||
|
||||
struct int_double_s { int a; double b; };
|
||||
|
||||
// CHECK: define void @f_int_double_s_arg(%struct.int_double_s* %a)
|
||||
// CHECK: define{{.*}} void @f_int_double_s_arg(%struct.int_double_s* %a)
|
||||
void f_int_double_s_arg(struct int_double_s a) {}
|
||||
|
||||
// CHECK: define void @f_ret_int_double_s(%struct.int_double_s* noalias sret(%struct.int_double_s) align 8 %agg.result)
|
||||
// CHECK: define{{.*}} void @f_ret_int_double_s(%struct.int_double_s* noalias sret(%struct.int_double_s) align 8 %agg.result)
|
||||
struct int_double_s f_ret_int_double_s() {
|
||||
return (struct int_double_s){1, 2.0};
|
||||
}
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
// Floats are passed in FPRs, so argument 'i' will be passed zero-extended
|
||||
// because it will be passed in a GPR.
|
||||
|
||||
// CHECK: define void @f_fpr_tracking(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i8 zeroext %i)
|
||||
// CHECK: define{{.*}} void @f_fpr_tracking(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i8 zeroext %i)
|
||||
void f_fpr_tracking(float a, float b, float c, float d, float e, float f,
|
||||
float g, float h, uint8_t i) {}
|
||||
|
||||
@ -27,10 +27,10 @@ void f_fpr_tracking(float a, float b, float c, float d, float e, float f,
|
||||
|
||||
struct float_s { float f; };
|
||||
|
||||
// CHECK: define void @f_float_s_arg(float %0)
|
||||
// CHECK: define{{.*}} void @f_float_s_arg(float %0)
|
||||
void f_float_s_arg(struct float_s a) {}
|
||||
|
||||
// CHECK: define float @f_ret_float_s()
|
||||
// CHECK: define{{.*}} float @f_ret_float_s()
|
||||
struct float_s f_ret_float_s() {
|
||||
return (struct float_s){1.0};
|
||||
}
|
||||
@ -41,18 +41,18 @@ struct float_s f_ret_float_s() {
|
||||
struct zbf_float_s { int : 0; float f; };
|
||||
struct zbf_float_zbf_s { int : 0; float f; int : 0; };
|
||||
|
||||
// CHECK: define void @f_zbf_float_s_arg(float %0)
|
||||
// CHECK: define{{.*}} void @f_zbf_float_s_arg(float %0)
|
||||
void f_zbf_float_s_arg(struct zbf_float_s a) {}
|
||||
|
||||
// CHECK: define float @f_ret_zbf_float_s()
|
||||
// CHECK: define{{.*}} float @f_ret_zbf_float_s()
|
||||
struct zbf_float_s f_ret_zbf_float_s() {
|
||||
return (struct zbf_float_s){1.0};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_zbf_float_zbf_s_arg(float %0)
|
||||
// CHECK: define{{.*}} void @f_zbf_float_zbf_s_arg(float %0)
|
||||
void f_zbf_float_zbf_s_arg(struct zbf_float_zbf_s a) {}
|
||||
|
||||
// CHECK: define float @f_ret_zbf_float_zbf_s()
|
||||
// CHECK: define{{.*}} float @f_ret_zbf_float_zbf_s()
|
||||
struct zbf_float_zbf_s f_ret_zbf_float_zbf_s() {
|
||||
return (struct zbf_float_zbf_s){1.0};
|
||||
}
|
||||
@ -62,15 +62,15 @@ struct zbf_float_zbf_s f_ret_zbf_float_zbf_s() {
|
||||
|
||||
struct float_float_s { float f; float g; };
|
||||
|
||||
// CHECK: define void @f_float_float_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_float_float_s_arg(float %0, float %1)
|
||||
void f_float_float_s_arg(struct float_float_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_float_float_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_float_float_s()
|
||||
struct float_float_s f_ret_float_float_s() {
|
||||
return (struct float_float_s){1.0, 2.0};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_float_s_arg_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, [2 x i32] %h.coerce)
|
||||
// CHECK: define{{.*}} void @f_float_float_s_arg_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, [2 x i32] %h.coerce)
|
||||
void f_float_float_s_arg_insufficient_fprs(float a, float b, float c, float d,
|
||||
float e, float f, float g, struct float_float_s h) {}
|
||||
|
||||
@ -85,42 +85,42 @@ struct float_int64_s { float f; int64_t i; };
|
||||
struct float_int64bf_s { float f; int64_t i : 32; };
|
||||
struct float_int8_zbf_s { float f; int8_t i; int : 0; };
|
||||
|
||||
// CHECK: define void @f_float_int8_s_arg(float %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_float_int8_s_arg(float %0, i8 %1)
|
||||
void f_float_int8_s_arg(struct float_int8_s a) {}
|
||||
|
||||
// CHECK: define { float, i8 } @f_ret_float_int8_s()
|
||||
// CHECK: define{{.*}} { float, i8 } @f_ret_float_int8_s()
|
||||
struct float_int8_s f_ret_float_int8_s() {
|
||||
return (struct float_int8_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_uint8_s_arg(float %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_float_uint8_s_arg(float %0, i8 %1)
|
||||
void f_float_uint8_s_arg(struct float_uint8_s a) {}
|
||||
|
||||
// CHECK: define { float, i8 } @f_ret_float_uint8_s()
|
||||
// CHECK: define{{.*}} { float, i8 } @f_ret_float_uint8_s()
|
||||
struct float_uint8_s f_ret_float_uint8_s() {
|
||||
return (struct float_uint8_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_int32_s_arg(float %0, i32 %1)
|
||||
// CHECK: define{{.*}} void @f_float_int32_s_arg(float %0, i32 %1)
|
||||
void f_float_int32_s_arg(struct float_int32_s a) {}
|
||||
|
||||
// CHECK: define { float, i32 } @f_ret_float_int32_s()
|
||||
// CHECK: define{{.*}} { float, i32 } @f_ret_float_int32_s()
|
||||
struct float_int32_s f_ret_float_int32_s() {
|
||||
return (struct float_int32_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_int64_s_arg(%struct.float_int64_s* %a)
|
||||
// CHECK: define{{.*}} void @f_float_int64_s_arg(%struct.float_int64_s* %a)
|
||||
void f_float_int64_s_arg(struct float_int64_s a) {}
|
||||
|
||||
// CHECK: define void @f_ret_float_int64_s(%struct.float_int64_s* noalias sret(%struct.float_int64_s) align 8 %agg.result)
|
||||
// CHECK: define{{.*}} void @f_ret_float_int64_s(%struct.float_int64_s* noalias sret(%struct.float_int64_s) align 8 %agg.result)
|
||||
struct float_int64_s f_ret_float_int64_s() {
|
||||
return (struct float_int64_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_int64bf_s_arg(float %0, i32 %1)
|
||||
// CHECK: define{{.*}} void @f_float_int64bf_s_arg(float %0, i32 %1)
|
||||
void f_float_int64bf_s_arg(struct float_int64bf_s a) {}
|
||||
|
||||
// CHECK: define { float, i32 } @f_ret_float_int64bf_s()
|
||||
// CHECK: define{{.*}} { float, i32 } @f_ret_float_int64bf_s()
|
||||
struct float_int64bf_s f_ret_float_int64bf_s() {
|
||||
return (struct float_int64bf_s){1.0, 2};
|
||||
}
|
||||
@ -128,39 +128,39 @@ struct float_int64bf_s f_ret_float_int64bf_s() {
|
||||
// The zero-width bitfield means the struct can't be passed according to the
|
||||
// floating point calling convention.
|
||||
|
||||
// CHECK: define void @f_float_int8_zbf_s(float %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_float_int8_zbf_s(float %0, i8 %1)
|
||||
void f_float_int8_zbf_s(struct float_int8_zbf_s a) {}
|
||||
|
||||
// CHECK: define { float, i8 } @f_ret_float_int8_zbf_s()
|
||||
// CHECK: define{{.*}} { float, i8 } @f_ret_float_int8_zbf_s()
|
||||
struct float_int8_zbf_s f_ret_float_int8_zbf_s() {
|
||||
return (struct float_int8_zbf_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_int8_s_arg_insufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, [2 x i32] %i.coerce)
|
||||
// CHECK: define{{.*}} void @f_float_int8_s_arg_insufficient_gprs(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, [2 x i32] %i.coerce)
|
||||
void f_float_int8_s_arg_insufficient_gprs(int a, int b, int c, int d, int e,
|
||||
int f, int g, int h, struct float_int8_s i) {}
|
||||
|
||||
// CHECK: define void @f_struct_float_int8_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, [2 x i32] %i.coerce)
|
||||
// CHECK: define{{.*}} void @f_struct_float_int8_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, [2 x i32] %i.coerce)
|
||||
void f_struct_float_int8_insufficient_fprs(float a, float b, float c, float d,
|
||||
float e, float f, float g, float h, struct float_int8_s i) {}
|
||||
|
||||
// Complex floating-point values or structs containing a single complex
|
||||
// floating-point value should be passed as if it were an fp+fp struct.
|
||||
|
||||
// CHECK: define void @f_floatcomplex(float %a.coerce0, float %a.coerce1)
|
||||
// CHECK: define{{.*}} void @f_floatcomplex(float %a.coerce0, float %a.coerce1)
|
||||
void f_floatcomplex(float __complex__ a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatcomplex()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatcomplex()
|
||||
float __complex__ f_ret_floatcomplex() {
|
||||
return 1.0;
|
||||
}
|
||||
|
||||
struct floatcomplex_s { float __complex__ c; };
|
||||
|
||||
// CHECK: define void @f_floatcomplex_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatcomplex_s_arg(float %0, float %1)
|
||||
void f_floatcomplex_s_arg(struct floatcomplex_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatcomplex_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatcomplex_s()
|
||||
struct floatcomplex_s f_ret_floatcomplex_s() {
|
||||
return (struct floatcomplex_s){1.0};
|
||||
}
|
||||
@ -170,60 +170,60 @@ struct floatcomplex_s f_ret_floatcomplex_s() {
|
||||
|
||||
struct floatarr1_s { float a[1]; };
|
||||
|
||||
// CHECK: define void @f_floatarr1_s_arg(float %0)
|
||||
// CHECK: define{{.*}} void @f_floatarr1_s_arg(float %0)
|
||||
void f_floatarr1_s_arg(struct floatarr1_s a) {}
|
||||
|
||||
// CHECK: define float @f_ret_floatarr1_s()
|
||||
// CHECK: define{{.*}} float @f_ret_floatarr1_s()
|
||||
struct floatarr1_s f_ret_floatarr1_s() {
|
||||
return (struct floatarr1_s){{1.0}};
|
||||
}
|
||||
|
||||
struct floatarr2_s { float a[2]; };
|
||||
|
||||
// CHECK: define void @f_floatarr2_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatarr2_s_arg(float %0, float %1)
|
||||
void f_floatarr2_s_arg(struct floatarr2_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatarr2_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_s()
|
||||
struct floatarr2_s f_ret_floatarr2_s() {
|
||||
return (struct floatarr2_s){{1.0, 2.0}};
|
||||
}
|
||||
|
||||
struct floatarr2_tricky1_s { struct { float f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_floatarr2_tricky1_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatarr2_tricky1_s_arg(float %0, float %1)
|
||||
void f_floatarr2_tricky1_s_arg(struct floatarr2_tricky1_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatarr2_tricky1_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky1_s()
|
||||
struct floatarr2_tricky1_s f_ret_floatarr2_tricky1_s() {
|
||||
return (struct floatarr2_tricky1_s){{{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct floatarr2_tricky2_s { struct {}; struct { float f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_floatarr2_tricky2_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatarr2_tricky2_s_arg(float %0, float %1)
|
||||
void f_floatarr2_tricky2_s_arg(struct floatarr2_tricky2_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatarr2_tricky2_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky2_s()
|
||||
struct floatarr2_tricky2_s f_ret_floatarr2_tricky2_s() {
|
||||
return (struct floatarr2_tricky2_s){{}, {{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct floatarr2_tricky3_s { union {}; struct { float f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_floatarr2_tricky3_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatarr2_tricky3_s_arg(float %0, float %1)
|
||||
void f_floatarr2_tricky3_s_arg(struct floatarr2_tricky3_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatarr2_tricky3_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky3_s()
|
||||
struct floatarr2_tricky3_s f_ret_floatarr2_tricky3_s() {
|
||||
return (struct floatarr2_tricky3_s){{}, {{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct floatarr2_tricky4_s { union {}; struct { struct {}; float f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_floatarr2_tricky4_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatarr2_tricky4_s_arg(float %0, float %1)
|
||||
void f_floatarr2_tricky4_s_arg(struct floatarr2_tricky4_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatarr2_tricky4_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky4_s()
|
||||
struct floatarr2_tricky4_s f_ret_floatarr2_tricky4_s() {
|
||||
return (struct floatarr2_tricky4_s){{}, {{{}, {1.0}}, {{}, {2.0}}}};
|
||||
}
|
||||
@ -233,30 +233,30 @@ struct floatarr2_tricky4_s f_ret_floatarr2_tricky4_s() {
|
||||
|
||||
struct int_float_int_s { int a; float b; int c; };
|
||||
|
||||
// CHECK: define void @f_int_float_int_s_arg(%struct.int_float_int_s* %a)
|
||||
// CHECK: define{{.*}} void @f_int_float_int_s_arg(%struct.int_float_int_s* %a)
|
||||
void f_int_float_int_s_arg(struct int_float_int_s a) {}
|
||||
|
||||
// CHECK: define void @f_ret_int_float_int_s(%struct.int_float_int_s* noalias sret(%struct.int_float_int_s) align 4 %agg.result)
|
||||
// CHECK: define{{.*}} void @f_ret_int_float_int_s(%struct.int_float_int_s* noalias sret(%struct.int_float_int_s) align 4 %agg.result)
|
||||
struct int_float_int_s f_ret_int_float_int_s() {
|
||||
return (struct int_float_int_s){1, 2.0, 3};
|
||||
}
|
||||
|
||||
struct int64_float_s { int64_t a; float b; };
|
||||
|
||||
// CHECK: define void @f_int64_float_s_arg(%struct.int64_float_s* %a)
|
||||
// CHECK: define{{.*}} void @f_int64_float_s_arg(%struct.int64_float_s* %a)
|
||||
void f_int64_float_s_arg(struct int64_float_s a) {}
|
||||
|
||||
// CHECK: define void @f_ret_int64_float_s(%struct.int64_float_s* noalias sret(%struct.int64_float_s) align 8 %agg.result)
|
||||
// CHECK: define{{.*}} void @f_ret_int64_float_s(%struct.int64_float_s* noalias sret(%struct.int64_float_s) align 8 %agg.result)
|
||||
struct int64_float_s f_ret_int64_float_s() {
|
||||
return (struct int64_float_s){1, 2.0};
|
||||
}
|
||||
|
||||
struct char_char_float_s { char a; char b; float c; };
|
||||
|
||||
// CHECK-LABEL: define void @f_char_char_float_s_arg([2 x i32] %a.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_char_char_float_s_arg([2 x i32] %a.coerce)
|
||||
void f_char_char_float_s_arg(struct char_char_float_s a) {}
|
||||
|
||||
// CHECK: define [2 x i32] @f_ret_char_char_float_s()
|
||||
// CHECK: define{{.*}} [2 x i32] @f_ret_char_char_float_s()
|
||||
struct char_char_float_s f_ret_char_char_float_s() {
|
||||
return (struct char_char_float_s){1, 2, 3.0};
|
||||
}
|
||||
@ -266,10 +266,10 @@ struct char_char_float_s f_ret_char_char_float_s() {
|
||||
|
||||
union float_u { float a; };
|
||||
|
||||
// CHECK: define void @f_float_u_arg(i32 %a.coerce)
|
||||
// CHECK: define{{.*}} void @f_float_u_arg(i32 %a.coerce)
|
||||
void f_float_u_arg(union float_u a) {}
|
||||
|
||||
// CHECK: define i32 @f_ret_float_u()
|
||||
// CHECK: define{{.*}} i32 @f_ret_float_u()
|
||||
union float_u f_ret_float_u() {
|
||||
return (union float_u){1.0};
|
||||
}
|
||||
|
||||
@ -15,7 +15,7 @@ typedef unsigned char v32i8 __attribute__((vector_size(32)));
|
||||
// Scalars passed on the stack should not have signext/zeroext attributes
|
||||
// (they are anyext).
|
||||
|
||||
// CHECK-LABEL: define signext i32 @f_scalar_stack_1(i32 signext %a, i128 %b, float %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @f_scalar_stack_1(i32 signext %a, i128 %b, float %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
|
||||
int f_scalar_stack_1(int32_t a, __int128_t b, float c, long double d, v32i8 e,
|
||||
uint8_t f, int8_t g, uint8_t h) {
|
||||
return g + h;
|
||||
@ -25,7 +25,7 @@ int f_scalar_stack_1(int32_t a, __int128_t b, float c, long double d, v32i8 e,
|
||||
// the presence of large return values that consume a register due to the need
|
||||
// to pass a pointer.
|
||||
|
||||
// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 8 %agg.result, double %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
|
||||
// CHECK-LABEL: define{{.*}} void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 8 %agg.result, double %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
|
||||
struct large f_scalar_stack_2(double a, __int128_t b, long double c, v32i8 d,
|
||||
uint8_t e, int8_t f, uint8_t g) {
|
||||
return (struct large){a, e, f, g};
|
||||
@ -34,20 +34,20 @@ struct large f_scalar_stack_2(double a, __int128_t b, long double c, v32i8 d,
|
||||
// Complex floating-point values or structs containing a single complex
|
||||
// floating-point value should be passed in a GPR.
|
||||
|
||||
// CHECK: define void @f_floatcomplex(i64 %a.coerce)
|
||||
// CHECK: define{{.*}} void @f_floatcomplex(i64 %a.coerce)
|
||||
void f_floatcomplex(float __complex__ a) {}
|
||||
|
||||
// CHECK: define i64 @f_ret_floatcomplex()
|
||||
// CHECK: define{{.*}} i64 @f_ret_floatcomplex()
|
||||
float __complex__ f_ret_floatcomplex() {
|
||||
return 1.0;
|
||||
}
|
||||
|
||||
struct floatcomplex_s { float __complex__ c; };
|
||||
|
||||
// CHECK: define void @f_floatcomplex_s_arg(i64 %a.coerce)
|
||||
// CHECK: define{{.*}} void @f_floatcomplex_s_arg(i64 %a.coerce)
|
||||
void f_floatcomplex_s_arg(struct floatcomplex_s a) {}
|
||||
|
||||
// CHECK: define i64 @f_ret_floatcomplex_s()
|
||||
// CHECK: define{{.*}} i64 @f_ret_floatcomplex_s()
|
||||
struct floatcomplex_s f_ret_floatcomplex_s() {
|
||||
return (struct floatcomplex_s){1.0};
|
||||
}
|
||||
|
||||
@ -17,7 +17,7 @@ typedef unsigned char v32i8 __attribute__((vector_size(32)));
|
||||
// Scalars passed on the stack should not have signext/zeroext attributes
|
||||
// (they are anyext).
|
||||
|
||||
// CHECK-LABEL: define signext i32 @f_scalar_stack_1(i32 signext %a, i128 %b, double %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @f_scalar_stack_1(i32 signext %a, i128 %b, double %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
|
||||
int f_scalar_stack_1(int32_t a, __int128_t b, double c, long double d, v32i8 e,
|
||||
uint8_t f, int8_t g, uint8_t h) {
|
||||
return g + h;
|
||||
@ -27,7 +27,7 @@ int f_scalar_stack_1(int32_t a, __int128_t b, double c, long double d, v32i8 e,
|
||||
// the presence of large return values that consume a register due to the need
|
||||
// to pass a pointer.
|
||||
|
||||
// CHECK-LABEL: define void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 8 %agg.result, double %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
|
||||
// CHECK-LABEL: define{{.*}} void @f_scalar_stack_2(%struct.large* noalias sret(%struct.large) align 8 %agg.result, double %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
|
||||
struct large f_scalar_stack_2(double a, __int128_t b, long double c, v32i8 d,
|
||||
uint8_t e, int8_t f, uint8_t g) {
|
||||
return (struct large){a, e, f, g};
|
||||
|
||||
@ -10,48 +10,48 @@
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
|
||||
// CHECK-LABEL: define void @f_void()
|
||||
// CHECK-LABEL: define{{.*}} void @f_void()
|
||||
void f_void(void) {}
|
||||
|
||||
// Scalar arguments and return values smaller than the word size are extended
|
||||
// according to the sign of their type, up to 32 bits
|
||||
|
||||
// CHECK-LABEL: define zeroext i1 @f_scalar_0(i1 zeroext %x)
|
||||
// CHECK-LABEL: define{{.*}} zeroext i1 @f_scalar_0(i1 zeroext %x)
|
||||
_Bool f_scalar_0(_Bool x) { return x; }
|
||||
|
||||
// CHECK-LABEL: define signext i8 @f_scalar_1(i8 signext %x)
|
||||
// CHECK-LABEL: define{{.*}} signext i8 @f_scalar_1(i8 signext %x)
|
||||
int8_t f_scalar_1(int8_t x) { return x; }
|
||||
|
||||
// CHECK-LABEL: define zeroext i8 @f_scalar_2(i8 zeroext %x)
|
||||
// CHECK-LABEL: define{{.*}} zeroext i8 @f_scalar_2(i8 zeroext %x)
|
||||
uint8_t f_scalar_2(uint8_t x) { return x; }
|
||||
|
||||
// CHECK-LABEL: define signext i32 @f_scalar_3(i32 signext %x)
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @f_scalar_3(i32 signext %x)
|
||||
uint32_t f_scalar_3(int32_t x) { return x; }
|
||||
|
||||
// CHECK-LABEL: define i64 @f_scalar_4(i64 %x)
|
||||
// CHECK-LABEL: define{{.*}} i64 @f_scalar_4(i64 %x)
|
||||
int64_t f_scalar_4(int64_t x) { return x; }
|
||||
|
||||
// CHECK-LABEL: define float @f_fp_scalar_1(float %x)
|
||||
// CHECK-LABEL: define{{.*}} float @f_fp_scalar_1(float %x)
|
||||
float f_fp_scalar_1(float x) { return x; }
|
||||
|
||||
// CHECK-LABEL: define double @f_fp_scalar_2(double %x)
|
||||
// CHECK-LABEL: define{{.*}} double @f_fp_scalar_2(double %x)
|
||||
double f_fp_scalar_2(double x) { return x; }
|
||||
|
||||
// CHECK-LABEL: define fp128 @f_fp_scalar_3(fp128 %x)
|
||||
// CHECK-LABEL: define{{.*}} fp128 @f_fp_scalar_3(fp128 %x)
|
||||
long double f_fp_scalar_3(long double x) { return x; }
|
||||
|
||||
// Empty structs or unions are ignored.
|
||||
|
||||
struct empty_s {};
|
||||
|
||||
// CHECK-LABEL: define void @f_agg_empty_struct()
|
||||
// CHECK-LABEL: define{{.*}} void @f_agg_empty_struct()
|
||||
struct empty_s f_agg_empty_struct(struct empty_s x) {
|
||||
return x;
|
||||
}
|
||||
|
||||
union empty_u {};
|
||||
|
||||
// CHECK-LABEL: define void @f_agg_empty_union()
|
||||
// CHECK-LABEL: define{{.*}} void @f_agg_empty_union()
|
||||
union empty_u f_agg_empty_union(union empty_u x) {
|
||||
return x;
|
||||
}
|
||||
@ -63,13 +63,13 @@ struct tiny {
|
||||
uint16_t a, b, c, d;
|
||||
};
|
||||
|
||||
// CHECK-LABEL: define void @f_agg_tiny(i64 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_agg_tiny(i64 %x.coerce)
|
||||
void f_agg_tiny(struct tiny x) {
|
||||
x.a += x.b;
|
||||
x.c += x.d;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @f_agg_tiny_ret()
|
||||
// CHECK-LABEL: define{{.*}} i64 @f_agg_tiny_ret()
|
||||
struct tiny f_agg_tiny_ret() {
|
||||
return (struct tiny){1, 2, 3, 4};
|
||||
}
|
||||
@ -77,23 +77,23 @@ struct tiny f_agg_tiny_ret() {
|
||||
typedef uint16_t v4i16 __attribute__((vector_size(8)));
|
||||
typedef int64_t v1i64 __attribute__((vector_size(8)));
|
||||
|
||||
// CHECK-LABEL: define void @f_vec_tiny_v4i16(i64 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_vec_tiny_v4i16(i64 %x.coerce)
|
||||
void f_vec_tiny_v4i16(v4i16 x) {
|
||||
x[0] = x[1];
|
||||
x[2] = x[3];
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @f_vec_tiny_v4i16_ret()
|
||||
// CHECK-LABEL: define{{.*}} i64 @f_vec_tiny_v4i16_ret()
|
||||
v4i16 f_vec_tiny_v4i16_ret() {
|
||||
return (v4i16){1, 2, 3, 4};
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @f_vec_tiny_v1i64(i64 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_vec_tiny_v1i64(i64 %x.coerce)
|
||||
void f_vec_tiny_v1i64(v1i64 x) {
|
||||
x[0] = 114;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @f_vec_tiny_v1i64_ret()
|
||||
// CHECK-LABEL: define{{.*}} i64 @f_vec_tiny_v1i64_ret()
|
||||
v1i64 f_vec_tiny_v1i64_ret() {
|
||||
return (v1i64){1};
|
||||
}
|
||||
@ -102,13 +102,13 @@ struct small {
|
||||
int64_t a, *b;
|
||||
};
|
||||
|
||||
// CHECK-LABEL: define void @f_agg_small([2 x i64] %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_agg_small([2 x i64] %x.coerce)
|
||||
void f_agg_small(struct small x) {
|
||||
x.a += *x.b;
|
||||
x.b = &x.a;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define [2 x i64] @f_agg_small_ret()
|
||||
// CHECK-LABEL: define{{.*}} [2 x i64] @f_agg_small_ret()
|
||||
struct small f_agg_small_ret() {
|
||||
return (struct small){1, 0};
|
||||
}
|
||||
@ -116,22 +116,22 @@ struct small f_agg_small_ret() {
|
||||
typedef uint16_t v8i16 __attribute__((vector_size(16)));
|
||||
typedef __int128_t v1i128 __attribute__((vector_size(16)));
|
||||
|
||||
// CHECK-LABEL: define void @f_vec_small_v8i16(i128 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_vec_small_v8i16(i128 %x.coerce)
|
||||
void f_vec_small_v8i16(v8i16 x) {
|
||||
x[0] = x[7];
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @f_vec_small_v8i16_ret()
|
||||
// CHECK-LABEL: define{{.*}} i128 @f_vec_small_v8i16_ret()
|
||||
v8i16 f_vec_small_v8i16_ret() {
|
||||
return (v8i16){1, 2, 3, 4, 5, 6, 7, 8};
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @f_vec_small_v1i128(i128 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_vec_small_v1i128(i128 %x.coerce)
|
||||
void f_vec_small_v1i128(v1i128 x) {
|
||||
x[0] = 114;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @f_vec_small_v1i128_ret()
|
||||
// CHECK-LABEL: define{{.*}} i128 @f_vec_small_v1i128_ret()
|
||||
v1i128 f_vec_small_v1i128_ret() {
|
||||
return (v1i128){1};
|
||||
}
|
||||
@ -144,12 +144,12 @@ struct small_aligned {
|
||||
__int128_t a;
|
||||
};
|
||||
|
||||
// CHECK-LABEL: define void @f_agg_small_aligned(i128 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_agg_small_aligned(i128 %x.coerce)
|
||||
void f_agg_small_aligned(struct small_aligned x) {
|
||||
x.a += x.a;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @f_agg_small_aligned_ret(i128 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} i128 @f_agg_small_aligned_ret(i128 %x.coerce)
|
||||
struct small_aligned f_agg_small_aligned_ret(struct small_aligned x) {
|
||||
return (struct small_aligned){10};
|
||||
}
|
||||
@ -159,26 +159,26 @@ struct large {
|
||||
int64_t a, b, c, d;
|
||||
};
|
||||
|
||||
// CHECK-LABEL: define void @f_agg_large(%struct.large* %x)
|
||||
// CHECK-LABEL: define{{.*}} void @f_agg_large(%struct.large* %x)
|
||||
void f_agg_large(struct large x) {
|
||||
x.a = x.b + x.c + x.d;
|
||||
}
|
||||
|
||||
// The address where the struct should be written to will be the first
|
||||
// argument
|
||||
// CHECK-LABEL: define void @f_agg_large_ret(%struct.large* noalias sret(%struct.large) align 8 %agg.result, i32 signext %i, i8 signext %j)
|
||||
// CHECK-LABEL: define{{.*}} void @f_agg_large_ret(%struct.large* noalias sret(%struct.large) align 8 %agg.result, i32 signext %i, i8 signext %j)
|
||||
struct large f_agg_large_ret(int32_t i, int8_t j) {
|
||||
return (struct large){1, 2, 3, 4};
|
||||
}
|
||||
|
||||
typedef unsigned char v32i8 __attribute__((vector_size(32)));
|
||||
|
||||
// CHECK-LABEL: define void @f_vec_large_v32i8(<32 x i8>* %0)
|
||||
// CHECK-LABEL: define{{.*}} void @f_vec_large_v32i8(<32 x i8>* %0)
|
||||
void f_vec_large_v32i8(v32i8 x) {
|
||||
x[0] = x[7];
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @f_vec_large_v32i8_ret(<32 x i8>* noalias sret(<32 x i8>) align 32 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @f_vec_large_v32i8_ret(<32 x i8>* noalias sret(<32 x i8>) align 32 %agg.result)
|
||||
v32i8 f_vec_large_v32i8_ret() {
|
||||
return (v32i8){1, 2, 3, 4, 5, 6, 7, 8};
|
||||
}
|
||||
@ -186,13 +186,13 @@ v32i8 f_vec_large_v32i8_ret() {
|
||||
// Scalars passed on the stack should not have signext/zeroext attributes
|
||||
// (they are anyext).
|
||||
|
||||
// CHECK-LABEL: define signext i32 @f_scalar_stack_1(i64 %a.coerce, [2 x i64] %b.coerce, i128 %c.coerce, %struct.large* %d, i8 zeroext %e, i8 signext %f, i8 %g, i8 %h)
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @f_scalar_stack_1(i64 %a.coerce, [2 x i64] %b.coerce, i128 %c.coerce, %struct.large* %d, i8 zeroext %e, i8 signext %f, i8 %g, i8 %h)
|
||||
int f_scalar_stack_1(struct tiny a, struct small b, struct small_aligned c,
|
||||
struct large d, uint8_t e, int8_t f, uint8_t g, int8_t h) {
|
||||
return g + h;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define signext i32 @f_scalar_stack_2(i32 signext %a, i128 %b, i64 %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @f_scalar_stack_2(i32 signext %a, i128 %b, i64 %c, fp128 %d, <32 x i8>* %0, i8 zeroext %f, i8 %g, i8 %h)
|
||||
int f_scalar_stack_2(int32_t a, __int128_t b, int64_t c, long double d, v32i8 e,
|
||||
uint8_t f, int8_t g, uint8_t h) {
|
||||
return g + h;
|
||||
@ -202,7 +202,7 @@ int f_scalar_stack_2(int32_t a, __int128_t b, int64_t c, long double d, v32i8 e,
|
||||
// the presence of large return values that consume a register due to the need
|
||||
// to pass a pointer.
|
||||
|
||||
// CHECK-LABEL: define void @f_scalar_stack_3(%struct.large* noalias sret(%struct.large) align 8 %agg.result, i32 signext %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
|
||||
// CHECK-LABEL: define{{.*}} void @f_scalar_stack_3(%struct.large* noalias sret(%struct.large) align 8 %agg.result, i32 signext %a, i128 %b, fp128 %c, <32 x i8>* %0, i8 zeroext %e, i8 %f, i8 %g)
|
||||
struct large f_scalar_stack_3(uint32_t a, __int128_t b, long double c, v32i8 d,
|
||||
uint8_t e, int8_t f, uint8_t g) {
|
||||
return (struct large){a, e, f, g};
|
||||
@ -215,7 +215,7 @@ struct large f_scalar_stack_3(uint32_t a, __int128_t b, long double c, v32i8 d,
|
||||
|
||||
int f_va_callee(int, ...);
|
||||
|
||||
// CHECK-LABEL: define void @f_va_caller()
|
||||
// CHECK-LABEL: define{{.*}} void @f_va_caller()
|
||||
void f_va_caller() {
|
||||
// CHECK: call signext i32 (i32, ...) @f_va_callee(i32 signext 1, i32 signext 2, i64 3, double 4.000000e+00, double 5.000000e+00, i64 {{%.*}}, [2 x i64] {{%.*}}, i128 {{%.*}}, %struct.large* {{%.*}})
|
||||
f_va_callee(1, 2, 3LL, 4.0f, 5.0, (struct tiny){6, 7, 8, 9},
|
||||
@ -241,7 +241,7 @@ void f_va_caller() {
|
||||
f_va_callee(1, 2, 3, 4, 5, 6, (struct small){7, NULL}, 8, 9);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define signext i32 @f_va_1(i8* %fmt, ...) {{.*}} {
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @f_va_1(i8* %fmt, ...) {{.*}} {
|
||||
// CHECK: [[FMT_ADDR:%.*]] = alloca i8*, align 8
|
||||
// CHECK: [[VA:%.*]] = alloca i8*, align 8
|
||||
// CHECK: [[V:%.*]] = alloca i32, align 4
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
// Doubles are passed in FPRs, so argument 'i' will be passed zero-extended
|
||||
// because it will be passed in a GPR.
|
||||
|
||||
// CHECK: define void @f_fpr_tracking(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, i8 zeroext %i)
|
||||
// CHECK: define{{.*}} void @f_fpr_tracking(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, i8 zeroext %i)
|
||||
void f_fpr_tracking(double a, double b, double c, double d, double e, double f,
|
||||
double g, double h, uint8_t i) {}
|
||||
|
||||
@ -25,10 +25,10 @@ void f_fpr_tracking(double a, double b, double c, double d, double e, double f,
|
||||
|
||||
struct double_s { double f; };
|
||||
|
||||
// CHECK: define void @f_double_s_arg(double %0)
|
||||
// CHECK: define{{.*}} void @f_double_s_arg(double %0)
|
||||
void f_double_s_arg(struct double_s a) {}
|
||||
|
||||
// CHECK: define double @f_ret_double_s()
|
||||
// CHECK: define{{.*}} double @f_ret_double_s()
|
||||
struct double_s f_ret_double_s() {
|
||||
return (struct double_s){1.0};
|
||||
}
|
||||
@ -39,18 +39,18 @@ struct double_s f_ret_double_s() {
|
||||
struct zbf_double_s { int : 0; double f; };
|
||||
struct zbf_double_zbf_s { int : 0; double f; int : 0; };
|
||||
|
||||
// CHECK: define void @f_zbf_double_s_arg(double %0)
|
||||
// CHECK: define{{.*}} void @f_zbf_double_s_arg(double %0)
|
||||
void f_zbf_double_s_arg(struct zbf_double_s a) {}
|
||||
|
||||
// CHECK: define double @f_ret_zbf_double_s()
|
||||
// CHECK: define{{.*}} double @f_ret_zbf_double_s()
|
||||
struct zbf_double_s f_ret_zbf_double_s() {
|
||||
return (struct zbf_double_s){1.0};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_zbf_double_zbf_s_arg(double %0)
|
||||
// CHECK: define{{.*}} void @f_zbf_double_zbf_s_arg(double %0)
|
||||
void f_zbf_double_zbf_s_arg(struct zbf_double_zbf_s a) {}
|
||||
|
||||
// CHECK: define double @f_ret_zbf_double_zbf_s()
|
||||
// CHECK: define{{.*}} double @f_ret_zbf_double_zbf_s()
|
||||
struct zbf_double_zbf_s f_ret_zbf_double_zbf_s() {
|
||||
return (struct zbf_double_zbf_s){1.0};
|
||||
}
|
||||
@ -61,23 +61,23 @@ struct zbf_double_zbf_s f_ret_zbf_double_zbf_s() {
|
||||
struct double_double_s { double f; double g; };
|
||||
struct double_float_s { double f; float g; };
|
||||
|
||||
// CHECK: define void @f_double_double_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_double_double_s_arg(double %0, double %1)
|
||||
void f_double_double_s_arg(struct double_double_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_double_double_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_double_double_s()
|
||||
struct double_double_s f_ret_double_double_s() {
|
||||
return (struct double_double_s){1.0, 2.0};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_float_s_arg(double %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_double_float_s_arg(double %0, float %1)
|
||||
void f_double_float_s_arg(struct double_float_s a) {}
|
||||
|
||||
// CHECK: define { double, float } @f_ret_double_float_s()
|
||||
// CHECK: define{{.*}} { double, float } @f_ret_double_float_s()
|
||||
struct double_float_s f_ret_double_float_s() {
|
||||
return (struct double_float_s){1.0, 2.0};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_double_s_arg_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, [2 x i64] %h.coerce)
|
||||
// CHECK: define{{.*}} void @f_double_double_s_arg_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, [2 x i64] %h.coerce)
|
||||
void f_double_double_s_arg_insufficient_fprs(float a, double b, double c, double d,
|
||||
double e, double f, double g, struct double_double_s h) {}
|
||||
|
||||
@ -92,42 +92,42 @@ struct double_int64_s { double f; int64_t i; };
|
||||
struct double_int128bf_s { double f; __int128_t i : 64; };
|
||||
struct double_int8_zbf_s { double f; int8_t i; int : 0; };
|
||||
|
||||
// CHECK: define void @f_double_int8_s_arg(double %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_double_int8_s_arg(double %0, i8 %1)
|
||||
void f_double_int8_s_arg(struct double_int8_s a) {}
|
||||
|
||||
// CHECK: define { double, i8 } @f_ret_double_int8_s()
|
||||
// CHECK: define{{.*}} { double, i8 } @f_ret_double_int8_s()
|
||||
struct double_int8_s f_ret_double_int8_s() {
|
||||
return (struct double_int8_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_uint8_s_arg(double %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_double_uint8_s_arg(double %0, i8 %1)
|
||||
void f_double_uint8_s_arg(struct double_uint8_s a) {}
|
||||
|
||||
// CHECK: define { double, i8 } @f_ret_double_uint8_s()
|
||||
// CHECK: define{{.*}} { double, i8 } @f_ret_double_uint8_s()
|
||||
struct double_uint8_s f_ret_double_uint8_s() {
|
||||
return (struct double_uint8_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_int32_s_arg(double %0, i32 %1)
|
||||
// CHECK: define{{.*}} void @f_double_int32_s_arg(double %0, i32 %1)
|
||||
void f_double_int32_s_arg(struct double_int32_s a) {}
|
||||
|
||||
// CHECK: define { double, i32 } @f_ret_double_int32_s()
|
||||
// CHECK: define{{.*}} { double, i32 } @f_ret_double_int32_s()
|
||||
struct double_int32_s f_ret_double_int32_s() {
|
||||
return (struct double_int32_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_int64_s_arg(double %0, i64 %1)
|
||||
// CHECK: define{{.*}} void @f_double_int64_s_arg(double %0, i64 %1)
|
||||
void f_double_int64_s_arg(struct double_int64_s a) {}
|
||||
|
||||
// CHECK: define { double, i64 } @f_ret_double_int64_s()
|
||||
// CHECK: define{{.*}} { double, i64 } @f_ret_double_int64_s()
|
||||
struct double_int64_s f_ret_double_int64_s() {
|
||||
return (struct double_int64_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_int128bf_s_arg(double %0, i64 %1)
|
||||
// CHECK: define{{.*}} void @f_double_int128bf_s_arg(double %0, i64 %1)
|
||||
void f_double_int128bf_s_arg(struct double_int128bf_s a) {}
|
||||
|
||||
// CHECK: define { double, i64 } @f_ret_double_int128bf_s()
|
||||
// CHECK: define{{.*}} { double, i64 } @f_ret_double_int128bf_s()
|
||||
struct double_int128bf_s f_ret_double_int128bf_s() {
|
||||
return (struct double_int128bf_s){1.0, 2};
|
||||
}
|
||||
@ -135,39 +135,39 @@ struct double_int128bf_s f_ret_double_int128bf_s() {
|
||||
// The zero-width bitfield means the struct can't be passed according to the
|
||||
// floating point calling convention.
|
||||
|
||||
// CHECK: define void @f_double_int8_zbf_s(double %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_double_int8_zbf_s(double %0, i8 %1)
|
||||
void f_double_int8_zbf_s(struct double_int8_zbf_s a) {}
|
||||
|
||||
// CHECK: define { double, i8 } @f_ret_double_int8_zbf_s()
|
||||
// CHECK: define{{.*}} { double, i8 } @f_ret_double_int8_zbf_s()
|
||||
struct double_int8_zbf_s f_ret_double_int8_zbf_s() {
|
||||
return (struct double_int8_zbf_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_double_int8_s_arg_insufficient_gprs(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, [2 x i64] %i.coerce)
|
||||
// CHECK: define{{.*}} void @f_double_int8_s_arg_insufficient_gprs(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, [2 x i64] %i.coerce)
|
||||
void f_double_int8_s_arg_insufficient_gprs(int a, int b, int c, int d, int e,
|
||||
int f, int g, int h, struct double_int8_s i) {}
|
||||
|
||||
// CHECK: define void @f_struct_double_int8_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, [2 x i64] %i.coerce)
|
||||
// CHECK: define{{.*}} void @f_struct_double_int8_insufficient_fprs(float %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, [2 x i64] %i.coerce)
|
||||
void f_struct_double_int8_insufficient_fprs(float a, double b, double c, double d,
|
||||
double e, double f, double g, double h, struct double_int8_s i) {}
|
||||
|
||||
// Complex floating-point values or structs containing a single complex
|
||||
// floating-point value should be passed as if it were an fp+fp struct.
|
||||
|
||||
// CHECK: define void @f_doublecomplex(double %a.coerce0, double %a.coerce1)
|
||||
// CHECK: define{{.*}} void @f_doublecomplex(double %a.coerce0, double %a.coerce1)
|
||||
void f_doublecomplex(double __complex__ a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublecomplex()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublecomplex()
|
||||
double __complex__ f_ret_doublecomplex() {
|
||||
return 1.0;
|
||||
}
|
||||
|
||||
struct doublecomplex_s { double __complex__ c; };
|
||||
|
||||
// CHECK: define void @f_doublecomplex_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublecomplex_s_arg(double %0, double %1)
|
||||
void f_doublecomplex_s_arg(struct doublecomplex_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublecomplex_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublecomplex_s()
|
||||
struct doublecomplex_s f_ret_doublecomplex_s() {
|
||||
return (struct doublecomplex_s){1.0};
|
||||
}
|
||||
@ -177,60 +177,60 @@ struct doublecomplex_s f_ret_doublecomplex_s() {
|
||||
|
||||
struct doublearr1_s { double a[1]; };
|
||||
|
||||
// CHECK: define void @f_doublearr1_s_arg(double %0)
|
||||
// CHECK: define{{.*}} void @f_doublearr1_s_arg(double %0)
|
||||
void f_doublearr1_s_arg(struct doublearr1_s a) {}
|
||||
|
||||
// CHECK: define double @f_ret_doublearr1_s()
|
||||
// CHECK: define{{.*}} double @f_ret_doublearr1_s()
|
||||
struct doublearr1_s f_ret_doublearr1_s() {
|
||||
return (struct doublearr1_s){{1.0}};
|
||||
}
|
||||
|
||||
struct doublearr2_s { double a[2]; };
|
||||
|
||||
// CHECK: define void @f_doublearr2_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublearr2_s_arg(double %0, double %1)
|
||||
void f_doublearr2_s_arg(struct doublearr2_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublearr2_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_s()
|
||||
struct doublearr2_s f_ret_doublearr2_s() {
|
||||
return (struct doublearr2_s){{1.0, 2.0}};
|
||||
}
|
||||
|
||||
struct doublearr2_tricky1_s { struct { double f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_doublearr2_tricky1_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublearr2_tricky1_s_arg(double %0, double %1)
|
||||
void f_doublearr2_tricky1_s_arg(struct doublearr2_tricky1_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublearr2_tricky1_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky1_s()
|
||||
struct doublearr2_tricky1_s f_ret_doublearr2_tricky1_s() {
|
||||
return (struct doublearr2_tricky1_s){{{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct doublearr2_tricky2_s { struct {}; struct { double f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_doublearr2_tricky2_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublearr2_tricky2_s_arg(double %0, double %1)
|
||||
void f_doublearr2_tricky2_s_arg(struct doublearr2_tricky2_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublearr2_tricky2_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky2_s()
|
||||
struct doublearr2_tricky2_s f_ret_doublearr2_tricky2_s() {
|
||||
return (struct doublearr2_tricky2_s){{}, {{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct doublearr2_tricky3_s { union {}; struct { double f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_doublearr2_tricky3_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublearr2_tricky3_s_arg(double %0, double %1)
|
||||
void f_doublearr2_tricky3_s_arg(struct doublearr2_tricky3_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublearr2_tricky3_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky3_s()
|
||||
struct doublearr2_tricky3_s f_ret_doublearr2_tricky3_s() {
|
||||
return (struct doublearr2_tricky3_s){{}, {{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct doublearr2_tricky4_s { union {}; struct { struct {}; double f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_doublearr2_tricky4_s_arg(double %0, double %1)
|
||||
// CHECK: define{{.*}} void @f_doublearr2_tricky4_s_arg(double %0, double %1)
|
||||
void f_doublearr2_tricky4_s_arg(struct doublearr2_tricky4_s a) {}
|
||||
|
||||
// CHECK: define { double, double } @f_ret_doublearr2_tricky4_s()
|
||||
// CHECK: define{{.*}} { double, double } @f_ret_doublearr2_tricky4_s()
|
||||
struct doublearr2_tricky4_s f_ret_doublearr2_tricky4_s() {
|
||||
return (struct doublearr2_tricky4_s){{}, {{{}, {1.0}}, {{}, {2.0}}}};
|
||||
}
|
||||
@ -240,20 +240,20 @@ struct doublearr2_tricky4_s f_ret_doublearr2_tricky4_s() {
|
||||
|
||||
struct int_double_int_s { int a; double b; int c; };
|
||||
|
||||
// CHECK: define void @f_int_double_int_s_arg(%struct.int_double_int_s* %a)
|
||||
// CHECK: define{{.*}} void @f_int_double_int_s_arg(%struct.int_double_int_s* %a)
|
||||
void f_int_double_int_s_arg(struct int_double_int_s a) {}
|
||||
|
||||
// CHECK: define void @f_ret_int_double_int_s(%struct.int_double_int_s* noalias sret(%struct.int_double_int_s) align 8 %agg.result)
|
||||
// CHECK: define{{.*}} void @f_ret_int_double_int_s(%struct.int_double_int_s* noalias sret(%struct.int_double_int_s) align 8 %agg.result)
|
||||
struct int_double_int_s f_ret_int_double_int_s() {
|
||||
return (struct int_double_int_s){1, 2.0, 3};
|
||||
}
|
||||
|
||||
struct char_char_double_s { char a; char b; double c; };
|
||||
|
||||
// CHECK-LABEL: define void @f_char_char_double_s_arg([2 x i64] %a.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_char_char_double_s_arg([2 x i64] %a.coerce)
|
||||
void f_char_char_double_s_arg(struct char_char_double_s a) {}
|
||||
|
||||
// CHECK: define [2 x i64] @f_ret_char_char_double_s()
|
||||
// CHECK: define{{.*}} [2 x i64] @f_ret_char_char_double_s()
|
||||
struct char_char_double_s f_ret_char_char_double_s() {
|
||||
return (struct char_char_double_s){1, 2, 3.0};
|
||||
}
|
||||
@ -263,10 +263,10 @@ struct char_char_double_s f_ret_char_char_double_s() {
|
||||
|
||||
union double_u { double a; };
|
||||
|
||||
// CHECK: define void @f_double_u_arg(i64 %a.coerce)
|
||||
// CHECK: define{{.*}} void @f_double_u_arg(i64 %a.coerce)
|
||||
void f_double_u_arg(union double_u a) {}
|
||||
|
||||
// CHECK: define i64 @f_ret_double_u()
|
||||
// CHECK: define{{.*}} i64 @f_ret_double_u()
|
||||
union double_u f_ret_double_u() {
|
||||
return (union double_u){1.0};
|
||||
}
|
||||
|
||||
@ -11,7 +11,7 @@
|
||||
// Floats are passed in FPRs, so argument 'i' will be passed zero-extended
|
||||
// because it will be passed in a GPR.
|
||||
|
||||
// CHECK: define void @f_fpr_tracking(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i8 zeroext %i)
|
||||
// CHECK: define{{.*}} void @f_fpr_tracking(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i8 zeroext %i)
|
||||
void f_fpr_tracking(float a, float b, float c, float d, float e, float f,
|
||||
float g, float h, uint8_t i) {}
|
||||
|
||||
@ -27,10 +27,10 @@ void f_fpr_tracking(float a, float b, float c, float d, float e, float f,
|
||||
|
||||
struct float_s { float f; };
|
||||
|
||||
// CHECK: define void @f_float_s_arg(float %0)
|
||||
// CHECK: define{{.*}} void @f_float_s_arg(float %0)
|
||||
void f_float_s_arg(struct float_s a) {}
|
||||
|
||||
// CHECK: define float @f_ret_float_s()
|
||||
// CHECK: define{{.*}} float @f_ret_float_s()
|
||||
struct float_s f_ret_float_s() {
|
||||
return (struct float_s){1.0};
|
||||
}
|
||||
@ -41,18 +41,18 @@ struct float_s f_ret_float_s() {
|
||||
struct zbf_float_s { int : 0; float f; };
|
||||
struct zbf_float_zbf_s { int : 0; float f; int : 0; };
|
||||
|
||||
// CHECK: define void @f_zbf_float_s_arg(float %0)
|
||||
// CHECK: define{{.*}} void @f_zbf_float_s_arg(float %0)
|
||||
void f_zbf_float_s_arg(struct zbf_float_s a) {}
|
||||
|
||||
// CHECK: define float @f_ret_zbf_float_s()
|
||||
// CHECK: define{{.*}} float @f_ret_zbf_float_s()
|
||||
struct zbf_float_s f_ret_zbf_float_s() {
|
||||
return (struct zbf_float_s){1.0};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_zbf_float_zbf_s_arg(float %0)
|
||||
// CHECK: define{{.*}} void @f_zbf_float_zbf_s_arg(float %0)
|
||||
void f_zbf_float_zbf_s_arg(struct zbf_float_zbf_s a) {}
|
||||
|
||||
// CHECK: define float @f_ret_zbf_float_zbf_s()
|
||||
// CHECK: define{{.*}} float @f_ret_zbf_float_zbf_s()
|
||||
struct zbf_float_zbf_s f_ret_zbf_float_zbf_s() {
|
||||
return (struct zbf_float_zbf_s){1.0};
|
||||
}
|
||||
@ -62,15 +62,15 @@ struct zbf_float_zbf_s f_ret_zbf_float_zbf_s() {
|
||||
|
||||
struct float_float_s { float f; float g; };
|
||||
|
||||
// CHECK: define void @f_float_float_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_float_float_s_arg(float %0, float %1)
|
||||
void f_float_float_s_arg(struct float_float_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_float_float_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_float_float_s()
|
||||
struct float_float_s f_ret_float_float_s() {
|
||||
return (struct float_float_s){1.0, 2.0};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_float_s_arg_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, i64 %h.coerce)
|
||||
// CHECK: define{{.*}} void @f_float_float_s_arg_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, i64 %h.coerce)
|
||||
void f_float_float_s_arg_insufficient_fprs(float a, float b, float c, float d,
|
||||
float e, float f, float g, struct float_float_s h) {}
|
||||
|
||||
@ -85,42 +85,42 @@ struct float_int64_s { float f; int64_t i; };
|
||||
struct float_int128bf_s { float f; __int128_t i : 64; };
|
||||
struct float_int8_zbf_s { float f; int8_t i; int : 0; };
|
||||
|
||||
// CHECK: define void @f_float_int8_s_arg(float %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_float_int8_s_arg(float %0, i8 %1)
|
||||
void f_float_int8_s_arg(struct float_int8_s a) {}
|
||||
|
||||
// CHECK: define { float, i8 } @f_ret_float_int8_s()
|
||||
// CHECK: define{{.*}} { float, i8 } @f_ret_float_int8_s()
|
||||
struct float_int8_s f_ret_float_int8_s() {
|
||||
return (struct float_int8_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_uint8_s_arg(float %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_float_uint8_s_arg(float %0, i8 %1)
|
||||
void f_float_uint8_s_arg(struct float_uint8_s a) {}
|
||||
|
||||
// CHECK: define { float, i8 } @f_ret_float_uint8_s()
|
||||
// CHECK: define{{.*}} { float, i8 } @f_ret_float_uint8_s()
|
||||
struct float_uint8_s f_ret_float_uint8_s() {
|
||||
return (struct float_uint8_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_int32_s_arg(float %0, i32 %1)
|
||||
// CHECK: define{{.*}} void @f_float_int32_s_arg(float %0, i32 %1)
|
||||
void f_float_int32_s_arg(struct float_int32_s a) {}
|
||||
|
||||
// CHECK: define { float, i32 } @f_ret_float_int32_s()
|
||||
// CHECK: define{{.*}} { float, i32 } @f_ret_float_int32_s()
|
||||
struct float_int32_s f_ret_float_int32_s() {
|
||||
return (struct float_int32_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_int64_s_arg(float %0, i64 %1)
|
||||
// CHECK: define{{.*}} void @f_float_int64_s_arg(float %0, i64 %1)
|
||||
void f_float_int64_s_arg(struct float_int64_s a) {}
|
||||
|
||||
// CHECK: define { float, i64 } @f_ret_float_int64_s()
|
||||
// CHECK: define{{.*}} { float, i64 } @f_ret_float_int64_s()
|
||||
struct float_int64_s f_ret_float_int64_s() {
|
||||
return (struct float_int64_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_int128bf_s_arg(float %0, i64 %1)
|
||||
// CHECK: define{{.*}} void @f_float_int128bf_s_arg(float %0, i64 %1)
|
||||
void f_float_int128bf_s_arg(struct float_int128bf_s a) {}
|
||||
|
||||
// CHECK: define <{ float, i64 }> @f_ret_float_int128bf_s()
|
||||
// CHECK: define{{.*}} <{ float, i64 }> @f_ret_float_int128bf_s()
|
||||
struct float_int128bf_s f_ret_float_int128bf_s() {
|
||||
return (struct float_int128bf_s){1.0, 2};
|
||||
}
|
||||
@ -128,39 +128,39 @@ struct float_int128bf_s f_ret_float_int128bf_s() {
|
||||
// The zero-width bitfield means the struct can't be passed according to the
|
||||
// floating point calling convention.
|
||||
|
||||
// CHECK: define void @f_float_int8_zbf_s(float %0, i8 %1)
|
||||
// CHECK: define{{.*}} void @f_float_int8_zbf_s(float %0, i8 %1)
|
||||
void f_float_int8_zbf_s(struct float_int8_zbf_s a) {}
|
||||
|
||||
// CHECK: define { float, i8 } @f_ret_float_int8_zbf_s()
|
||||
// CHECK: define{{.*}} { float, i8 } @f_ret_float_int8_zbf_s()
|
||||
struct float_int8_zbf_s f_ret_float_int8_zbf_s() {
|
||||
return (struct float_int8_zbf_s){1.0, 2};
|
||||
}
|
||||
|
||||
// CHECK: define void @f_float_int8_s_arg_insufficient_gprs(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, i64 %i.coerce)
|
||||
// CHECK: define{{.*}} void @f_float_int8_s_arg_insufficient_gprs(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, i64 %i.coerce)
|
||||
void f_float_int8_s_arg_insufficient_gprs(int a, int b, int c, int d, int e,
|
||||
int f, int g, int h, struct float_int8_s i) {}
|
||||
|
||||
// CHECK: define void @f_struct_float_int8_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i64 %i.coerce)
|
||||
// CHECK: define{{.*}} void @f_struct_float_int8_insufficient_fprs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, i64 %i.coerce)
|
||||
void f_struct_float_int8_insufficient_fprs(float a, float b, float c, float d,
|
||||
float e, float f, float g, float h, struct float_int8_s i) {}
|
||||
|
||||
// Complex floating-point values or structs containing a single complex
|
||||
// floating-point value should be passed as if it were an fp+fp struct.
|
||||
|
||||
// CHECK: define void @f_floatcomplex(float %a.coerce0, float %a.coerce1)
|
||||
// CHECK: define{{.*}} void @f_floatcomplex(float %a.coerce0, float %a.coerce1)
|
||||
void f_floatcomplex(float __complex__ a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatcomplex()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatcomplex()
|
||||
float __complex__ f_ret_floatcomplex() {
|
||||
return 1.0;
|
||||
}
|
||||
|
||||
struct floatcomplex_s { float __complex__ c; };
|
||||
|
||||
// CHECK: define void @f_floatcomplex_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatcomplex_s_arg(float %0, float %1)
|
||||
void f_floatcomplex_s_arg(struct floatcomplex_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatcomplex_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatcomplex_s()
|
||||
struct floatcomplex_s f_ret_floatcomplex_s() {
|
||||
return (struct floatcomplex_s){1.0};
|
||||
}
|
||||
@ -168,26 +168,26 @@ struct floatcomplex_s f_ret_floatcomplex_s() {
|
||||
// Complex floating-point values or structs containing a single complex
|
||||
// floating-point value should be passed in GPRs if no two FPRs is available.
|
||||
|
||||
// CHECK: define void @f_floatcomplex_insufficient_fprs1(float %a.coerce0, float %a.coerce1, float %b.coerce0, float %b.coerce1, float %c.coerce0, float %c.coerce1, float %d.coerce0, float %d.coerce1, i64 %e.coerce)
|
||||
// CHECK: define{{.*}} void @f_floatcomplex_insufficient_fprs1(float %a.coerce0, float %a.coerce1, float %b.coerce0, float %b.coerce1, float %c.coerce0, float %c.coerce1, float %d.coerce0, float %d.coerce1, i64 %e.coerce)
|
||||
void f_floatcomplex_insufficient_fprs1(float __complex__ a, float __complex__ b,
|
||||
float __complex__ c, float __complex__ d,
|
||||
float __complex__ e) {}
|
||||
|
||||
|
||||
// CHECK: define void @f_floatcomplex_s_arg_insufficient_fprs1(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7, i64 %e.coerce)
|
||||
// CHECK: define{{.*}} void @f_floatcomplex_s_arg_insufficient_fprs1(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7, i64 %e.coerce)
|
||||
void f_floatcomplex_s_arg_insufficient_fprs1(struct floatcomplex_s a,
|
||||
struct floatcomplex_s b,
|
||||
struct floatcomplex_s c,
|
||||
struct floatcomplex_s d,
|
||||
struct floatcomplex_s e) {}
|
||||
|
||||
// CHECK: define void @f_floatcomplex_insufficient_fprs2(float %a, float %b.coerce0, float %b.coerce1, float %c.coerce0, float %c.coerce1, float %d.coerce0, float %d.coerce1, i64 %e.coerce)
|
||||
// CHECK: define{{.*}} void @f_floatcomplex_insufficient_fprs2(float %a, float %b.coerce0, float %b.coerce1, float %c.coerce0, float %c.coerce1, float %d.coerce0, float %d.coerce1, i64 %e.coerce)
|
||||
void f_floatcomplex_insufficient_fprs2(float a,
|
||||
float __complex__ b, float __complex__ c,
|
||||
float __complex__ d, float __complex__ e) {}
|
||||
|
||||
|
||||
// CHECK: define void @f_floatcomplex_s_arg_insufficient_fprs2(float %a, float %0, float %1, float %2, float %3, float %4, float %5, i64 %e.coerce)
|
||||
// CHECK: define{{.*}} void @f_floatcomplex_s_arg_insufficient_fprs2(float %a, float %0, float %1, float %2, float %3, float %4, float %5, i64 %e.coerce)
|
||||
void f_floatcomplex_s_arg_insufficient_fprs2(float a,
|
||||
struct floatcomplex_s b,
|
||||
struct floatcomplex_s c,
|
||||
@ -199,60 +199,60 @@ void f_floatcomplex_s_arg_insufficient_fprs2(float a,
|
||||
|
||||
struct floatarr1_s { float a[1]; };
|
||||
|
||||
// CHECK: define void @f_floatarr1_s_arg(float %0)
|
||||
// CHECK: define{{.*}} void @f_floatarr1_s_arg(float %0)
|
||||
void f_floatarr1_s_arg(struct floatarr1_s a) {}
|
||||
|
||||
// CHECK: define float @f_ret_floatarr1_s()
|
||||
// CHECK: define{{.*}} float @f_ret_floatarr1_s()
|
||||
struct floatarr1_s f_ret_floatarr1_s() {
|
||||
return (struct floatarr1_s){{1.0}};
|
||||
}
|
||||
|
||||
struct floatarr2_s { float a[2]; };
|
||||
|
||||
// CHECK: define void @f_floatarr2_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatarr2_s_arg(float %0, float %1)
|
||||
void f_floatarr2_s_arg(struct floatarr2_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatarr2_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_s()
|
||||
struct floatarr2_s f_ret_floatarr2_s() {
|
||||
return (struct floatarr2_s){{1.0, 2.0}};
|
||||
}
|
||||
|
||||
struct floatarr2_tricky1_s { struct { float f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_floatarr2_tricky1_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatarr2_tricky1_s_arg(float %0, float %1)
|
||||
void f_floatarr2_tricky1_s_arg(struct floatarr2_tricky1_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatarr2_tricky1_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky1_s()
|
||||
struct floatarr2_tricky1_s f_ret_floatarr2_tricky1_s() {
|
||||
return (struct floatarr2_tricky1_s){{{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct floatarr2_tricky2_s { struct {}; struct { float f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_floatarr2_tricky2_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatarr2_tricky2_s_arg(float %0, float %1)
|
||||
void f_floatarr2_tricky2_s_arg(struct floatarr2_tricky2_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatarr2_tricky2_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky2_s()
|
||||
struct floatarr2_tricky2_s f_ret_floatarr2_tricky2_s() {
|
||||
return (struct floatarr2_tricky2_s){{}, {{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct floatarr2_tricky3_s { union {}; struct { float f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_floatarr2_tricky3_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatarr2_tricky3_s_arg(float %0, float %1)
|
||||
void f_floatarr2_tricky3_s_arg(struct floatarr2_tricky3_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatarr2_tricky3_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky3_s()
|
||||
struct floatarr2_tricky3_s f_ret_floatarr2_tricky3_s() {
|
||||
return (struct floatarr2_tricky3_s){{}, {{{1.0}}, {{2.0}}}};
|
||||
}
|
||||
|
||||
struct floatarr2_tricky4_s { union {}; struct { struct {}; float f[1]; } g[2]; };
|
||||
|
||||
// CHECK: define void @f_floatarr2_tricky4_s_arg(float %0, float %1)
|
||||
// CHECK: define{{.*}} void @f_floatarr2_tricky4_s_arg(float %0, float %1)
|
||||
void f_floatarr2_tricky4_s_arg(struct floatarr2_tricky4_s a) {}
|
||||
|
||||
// CHECK: define { float, float } @f_ret_floatarr2_tricky4_s()
|
||||
// CHECK: define{{.*}} { float, float } @f_ret_floatarr2_tricky4_s()
|
||||
struct floatarr2_tricky4_s f_ret_floatarr2_tricky4_s() {
|
||||
return (struct floatarr2_tricky4_s){{}, {{{}, {1.0}}, {{}, {2.0}}}};
|
||||
}
|
||||
@ -262,20 +262,20 @@ struct floatarr2_tricky4_s f_ret_floatarr2_tricky4_s() {
|
||||
|
||||
struct int_float_int_s { int a; float b; int c; };
|
||||
|
||||
// CHECK: define void @f_int_float_int_s_arg([2 x i64] %a.coerce)
|
||||
// CHECK: define{{.*}} void @f_int_float_int_s_arg([2 x i64] %a.coerce)
|
||||
void f_int_float_int_s_arg(struct int_float_int_s a) {}
|
||||
|
||||
// CHECK: define [2 x i64] @f_ret_int_float_int_s()
|
||||
// CHECK: define{{.*}} [2 x i64] @f_ret_int_float_int_s()
|
||||
struct int_float_int_s f_ret_int_float_int_s() {
|
||||
return (struct int_float_int_s){1, 2.0, 3};
|
||||
}
|
||||
|
||||
struct char_char_float_s { char a; char b; float c; };
|
||||
|
||||
// CHECK-LABEL: define void @f_char_char_float_s_arg(i64 %a.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f_char_char_float_s_arg(i64 %a.coerce)
|
||||
void f_char_char_float_s_arg(struct char_char_float_s a) {}
|
||||
|
||||
// CHECK: define i64 @f_ret_char_char_float_s()
|
||||
// CHECK: define{{.*}} i64 @f_ret_char_char_float_s()
|
||||
struct char_char_float_s f_ret_char_char_float_s() {
|
||||
return (struct char_char_float_s){1, 2, 3.0};
|
||||
}
|
||||
@ -285,10 +285,10 @@ struct char_char_float_s f_ret_char_char_float_s() {
|
||||
|
||||
union float_u { float a; };
|
||||
|
||||
// CHECK: define void @f_float_u_arg(i64 %a.coerce)
|
||||
// CHECK: define{{.*}} void @f_float_u_arg(i64 %a.coerce)
|
||||
void f_float_u_arg(union float_u a) {}
|
||||
|
||||
// CHECK: define i64 @f_ret_float_u()
|
||||
// CHECK: define{{.*}} i64 @f_ret_float_u()
|
||||
union float_u f_ret_float_u() {
|
||||
return (union float_u){1.0};
|
||||
}
|
||||
|
||||
@ -7,10 +7,10 @@ struct test {
|
||||
};
|
||||
|
||||
char c;
|
||||
// CHECK-DAG: @c = global i8 0, align 2
|
||||
// CHECK-DAG: @c ={{.*}} global i8 0, align 2
|
||||
|
||||
struct test s;
|
||||
// CHECK-DAG: @s = global %struct.test zeroinitializer, align 2
|
||||
// CHECK-DAG: @s ={{.*}} global %struct.test zeroinitializer, align 2
|
||||
|
||||
extern char ec;
|
||||
// CHECK-DAG: @ec = external global i8, align 2
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
// RUN: %clang_cc1 -mbackchain -triple s390x-linux -emit-llvm -o - %s | FileCheck %s
|
||||
|
||||
// CHECK: define void @foo() [[NUW:#[0-9]+]]
|
||||
// CHECK: define{{.*}} void @foo() [[NUW:#[0-9]+]]
|
||||
void foo(void) {
|
||||
}
|
||||
|
||||
|
||||
@ -46,158 +46,158 @@ typedef __attribute__((vector_size(16))) long double v1f128;
|
||||
typedef __attribute__((vector_size(32))) char v32i8;
|
||||
|
||||
unsigned int align = __alignof__ (v16i8);
|
||||
// CHECK: @align = global i32 16
|
||||
// CHECK-VECTOR: @align = global i32 8
|
||||
// CHECK: @align ={{.*}} global i32 16
|
||||
// CHECK-VECTOR: @align ={{.*}} global i32 8
|
||||
|
||||
v1i8 pass_v1i8(v1i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v1i8(<1 x i8>* noalias sret(<1 x i8>) align 1 %{{.*}}, <1 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <1 x i8> @pass_v1i8(<1 x i8> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v1i8(<1 x i8>* noalias sret(<1 x i8>) align 1 %{{.*}}, <1 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <1 x i8> @pass_v1i8(<1 x i8> %{{.*}})
|
||||
|
||||
v2i8 pass_v2i8(v2i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v2i8(<2 x i8>* noalias sret(<2 x i8>) align 2 %{{.*}}, <2 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <2 x i8> @pass_v2i8(<2 x i8> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v2i8(<2 x i8>* noalias sret(<2 x i8>) align 2 %{{.*}}, <2 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <2 x i8> @pass_v2i8(<2 x i8> %{{.*}})
|
||||
|
||||
v4i8 pass_v4i8(v4i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v4i8(<4 x i8>* noalias sret(<4 x i8>) align 4 %{{.*}}, <4 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <4 x i8> @pass_v4i8(<4 x i8> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v4i8(<4 x i8>* noalias sret(<4 x i8>) align 4 %{{.*}}, <4 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <4 x i8> @pass_v4i8(<4 x i8> %{{.*}})
|
||||
|
||||
v8i8 pass_v8i8(v8i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v8i8(<8 x i8>* noalias sret(<8 x i8>) align 8 %{{.*}}, <8 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <8 x i8> @pass_v8i8(<8 x i8> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v8i8(<8 x i8>* noalias sret(<8 x i8>) align 8 %{{.*}}, <8 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <8 x i8> @pass_v8i8(<8 x i8> %{{.*}})
|
||||
|
||||
v16i8 pass_v16i8(v16i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v16i8(<16 x i8>* noalias sret(<16 x i8>) align 16 %{{.*}}, <16 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <16 x i8> @pass_v16i8(<16 x i8> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v16i8(<16 x i8>* noalias sret(<16 x i8>) align 16 %{{.*}}, <16 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <16 x i8> @pass_v16i8(<16 x i8> %{{.*}})
|
||||
|
||||
v32i8 pass_v32i8(v32i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 32 %{{.*}}, <32 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define void @pass_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 8 %{{.*}}, <32 x i8>* %0)
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 32 %{{.*}}, <32 x i8>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @pass_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 8 %{{.*}}, <32 x i8>* %0)
|
||||
|
||||
v1i16 pass_v1i16(v1i16 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v1i16(<1 x i16>* noalias sret(<1 x i16>) align 2 %{{.*}}, <1 x i16>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <1 x i16> @pass_v1i16(<1 x i16> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v1i16(<1 x i16>* noalias sret(<1 x i16>) align 2 %{{.*}}, <1 x i16>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <1 x i16> @pass_v1i16(<1 x i16> %{{.*}})
|
||||
|
||||
v2i16 pass_v2i16(v2i16 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v2i16(<2 x i16>* noalias sret(<2 x i16>) align 4 %{{.*}}, <2 x i16>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <2 x i16> @pass_v2i16(<2 x i16> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v2i16(<2 x i16>* noalias sret(<2 x i16>) align 4 %{{.*}}, <2 x i16>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <2 x i16> @pass_v2i16(<2 x i16> %{{.*}})
|
||||
|
||||
v4i16 pass_v4i16(v4i16 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v4i16(<4 x i16>* noalias sret(<4 x i16>) align 8 %{{.*}}, <4 x i16>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <4 x i16> @pass_v4i16(<4 x i16> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v4i16(<4 x i16>* noalias sret(<4 x i16>) align 8 %{{.*}}, <4 x i16>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <4 x i16> @pass_v4i16(<4 x i16> %{{.*}})
|
||||
|
||||
v8i16 pass_v8i16(v8i16 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v8i16(<8 x i16>* noalias sret(<8 x i16>) align 16 %{{.*}}, <8 x i16>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <8 x i16> @pass_v8i16(<8 x i16> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v8i16(<8 x i16>* noalias sret(<8 x i16>) align 16 %{{.*}}, <8 x i16>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <8 x i16> @pass_v8i16(<8 x i16> %{{.*}})
|
||||
|
||||
v1i32 pass_v1i32(v1i32 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v1i32(<1 x i32>* noalias sret(<1 x i32>) align 4 %{{.*}}, <1 x i32>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <1 x i32> @pass_v1i32(<1 x i32> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v1i32(<1 x i32>* noalias sret(<1 x i32>) align 4 %{{.*}}, <1 x i32>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <1 x i32> @pass_v1i32(<1 x i32> %{{.*}})
|
||||
|
||||
v2i32 pass_v2i32(v2i32 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v2i32(<2 x i32>* noalias sret(<2 x i32>) align 8 %{{.*}}, <2 x i32>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <2 x i32> @pass_v2i32(<2 x i32> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v2i32(<2 x i32>* noalias sret(<2 x i32>) align 8 %{{.*}}, <2 x i32>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <2 x i32> @pass_v2i32(<2 x i32> %{{.*}})
|
||||
|
||||
v4i32 pass_v4i32(v4i32 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v4i32(<4 x i32>* noalias sret(<4 x i32>) align 16 %{{.*}}, <4 x i32>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <4 x i32> @pass_v4i32(<4 x i32> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v4i32(<4 x i32>* noalias sret(<4 x i32>) align 16 %{{.*}}, <4 x i32>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <4 x i32> @pass_v4i32(<4 x i32> %{{.*}})
|
||||
|
||||
v1i64 pass_v1i64(v1i64 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v1i64(<1 x i64>* noalias sret(<1 x i64>) align 8 %{{.*}}, <1 x i64>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <1 x i64> @pass_v1i64(<1 x i64> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v1i64(<1 x i64>* noalias sret(<1 x i64>) align 8 %{{.*}}, <1 x i64>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <1 x i64> @pass_v1i64(<1 x i64> %{{.*}})
|
||||
|
||||
v2i64 pass_v2i64(v2i64 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v2i64(<2 x i64>* noalias sret(<2 x i64>) align 16 %{{.*}}, <2 x i64>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <2 x i64> @pass_v2i64(<2 x i64> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v2i64(<2 x i64>* noalias sret(<2 x i64>) align 16 %{{.*}}, <2 x i64>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <2 x i64> @pass_v2i64(<2 x i64> %{{.*}})
|
||||
|
||||
v1i128 pass_v1i128(v1i128 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v1i128(<1 x i128>* noalias sret(<1 x i128>) align 16 %{{.*}}, <1 x i128>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <1 x i128> @pass_v1i128(<1 x i128> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v1i128(<1 x i128>* noalias sret(<1 x i128>) align 16 %{{.*}}, <1 x i128>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <1 x i128> @pass_v1i128(<1 x i128> %{{.*}})
|
||||
|
||||
v1f32 pass_v1f32(v1f32 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v1f32(<1 x float>* noalias sret(<1 x float>) align 4 %{{.*}}, <1 x float>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <1 x float> @pass_v1f32(<1 x float> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v1f32(<1 x float>* noalias sret(<1 x float>) align 4 %{{.*}}, <1 x float>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <1 x float> @pass_v1f32(<1 x float> %{{.*}})
|
||||
|
||||
v2f32 pass_v2f32(v2f32 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v2f32(<2 x float>* noalias sret(<2 x float>) align 8 %{{.*}}, <2 x float>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <2 x float> @pass_v2f32(<2 x float> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v2f32(<2 x float>* noalias sret(<2 x float>) align 8 %{{.*}}, <2 x float>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <2 x float> @pass_v2f32(<2 x float> %{{.*}})
|
||||
|
||||
v4f32 pass_v4f32(v4f32 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v4f32(<4 x float>* noalias sret(<4 x float>) align 16 %{{.*}}, <4 x float>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <4 x float> @pass_v4f32(<4 x float> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v4f32(<4 x float>* noalias sret(<4 x float>) align 16 %{{.*}}, <4 x float>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <4 x float> @pass_v4f32(<4 x float> %{{.*}})
|
||||
|
||||
v1f64 pass_v1f64(v1f64 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v1f64(<1 x double>* noalias sret(<1 x double>) align 8 %{{.*}}, <1 x double>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <1 x double> @pass_v1f64(<1 x double> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v1f64(<1 x double>* noalias sret(<1 x double>) align 8 %{{.*}}, <1 x double>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <1 x double> @pass_v1f64(<1 x double> %{{.*}})
|
||||
|
||||
v2f64 pass_v2f64(v2f64 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v2f64(<2 x double>* noalias sret(<2 x double>) align 16 %{{.*}}, <2 x double>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <2 x double> @pass_v2f64(<2 x double> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v2f64(<2 x double>* noalias sret(<2 x double>) align 16 %{{.*}}, <2 x double>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <2 x double> @pass_v2f64(<2 x double> %{{.*}})
|
||||
|
||||
v1f128 pass_v1f128(v1f128 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_v1f128(<1 x fp128>* noalias sret(<1 x fp128>) align 16 %{{.*}}, <1 x fp128>* %0)
|
||||
// CHECK-VECTOR-LABEL: define <1 x fp128> @pass_v1f128(<1 x fp128> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_v1f128(<1 x fp128>* noalias sret(<1 x fp128>) align 16 %{{.*}}, <1 x fp128>* %0)
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <1 x fp128> @pass_v1f128(<1 x fp128> %{{.*}})
|
||||
|
||||
|
||||
// Vector-like aggregate types
|
||||
|
||||
struct agg_v1i8 { v1i8 a; };
|
||||
struct agg_v1i8 pass_agg_v1i8(struct agg_v1i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, i8 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define void @pass_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, <1 x i8> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, i8 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, <1 x i8> %{{.*}})
|
||||
|
||||
struct agg_v2i8 { v2i8 a; };
|
||||
struct agg_v2i8 pass_agg_v2i8(struct agg_v2i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, i16 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define void @pass_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, <2 x i8> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, i16 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, <2 x i8> %{{.*}})
|
||||
|
||||
struct agg_v4i8 { v4i8 a; };
|
||||
struct agg_v4i8 pass_agg_v4i8(struct agg_v4i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define void @pass_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, <4 x i8> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, <4 x i8> %{{.*}})
|
||||
|
||||
struct agg_v8i8 { v8i8 a; };
|
||||
struct agg_v8i8 pass_agg_v8i8(struct agg_v8i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define void @pass_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, <8 x i8> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, <8 x i8> %{{.*}})
|
||||
|
||||
struct agg_v16i8 { v16i8 a; };
|
||||
struct agg_v16i8 pass_agg_v16i8(struct agg_v16i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 16 %{{.*}}, %struct.agg_v16i8* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define void @pass_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 8 %{{.*}}, <16 x i8> %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 16 %{{.*}}, %struct.agg_v16i8* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 8 %{{.*}}, <16 x i8> %{{.*}})
|
||||
|
||||
struct agg_v32i8 { v32i8 a; };
|
||||
struct agg_v32i8 pass_agg_v32i8(struct agg_v32i8 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 32 %{{.*}}, %struct.agg_v32i8* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define void @pass_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 8 %{{.*}}, %struct.agg_v32i8* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 32 %{{.*}}, %struct.agg_v32i8* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 8 %{{.*}}, %struct.agg_v32i8* %{{.*}})
|
||||
|
||||
|
||||
// Verify that the following are *not* vector-like aggregate types
|
||||
|
||||
struct agg_novector1 { v4i8 a; v4i8 b; };
|
||||
struct agg_novector1 pass_agg_novector1(struct agg_novector1 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_novector1(%struct.agg_novector1* noalias sret(%struct.agg_novector1) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define void @pass_agg_novector1(%struct.agg_novector1* noalias sret(%struct.agg_novector1) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_novector1(%struct.agg_novector1* noalias sret(%struct.agg_novector1) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_novector1(%struct.agg_novector1* noalias sret(%struct.agg_novector1) align 4 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
struct agg_novector2 { v4i8 a; float b; };
|
||||
struct agg_novector2 pass_agg_novector2(struct agg_novector2 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_novector2(%struct.agg_novector2* noalias sret(%struct.agg_novector2) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define void @pass_agg_novector2(%struct.agg_novector2* noalias sret(%struct.agg_novector2) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_novector2(%struct.agg_novector2* noalias sret(%struct.agg_novector2) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_novector2(%struct.agg_novector2* noalias sret(%struct.agg_novector2) align 4 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
struct agg_novector3 { v4i8 a; int : 0; };
|
||||
struct agg_novector3 pass_agg_novector3(struct agg_novector3 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_novector3(%struct.agg_novector3* noalias sret(%struct.agg_novector3) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define void @pass_agg_novector3(%struct.agg_novector3* noalias sret(%struct.agg_novector3) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_novector3(%struct.agg_novector3* noalias sret(%struct.agg_novector3) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_novector3(%struct.agg_novector3* noalias sret(%struct.agg_novector3) align 4 %{{.*}}, i32 %{{.*}})
|
||||
|
||||
struct agg_novector4 { v4i8 a __attribute__((aligned (8))); };
|
||||
struct agg_novector4 pass_agg_novector4(struct agg_novector4 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_novector4(%struct.agg_novector4* noalias sret(%struct.agg_novector4) align 8 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define void @pass_agg_novector4(%struct.agg_novector4* noalias sret(%struct.agg_novector4) align 8 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_novector4(%struct.agg_novector4* noalias sret(%struct.agg_novector4) align 8 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @pass_agg_novector4(%struct.agg_novector4* noalias sret(%struct.agg_novector4) align 8 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
|
||||
// Accessing variable argument lists
|
||||
|
||||
v1i8 va_v1i8(__builtin_va_list l) { return __builtin_va_arg(l, v1i8); }
|
||||
// CHECK-LABEL: define void @va_v1i8(<1 x i8>* noalias sret(<1 x i8>) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_v1i8(<1 x i8>* noalias sret(<1 x i8>) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -219,7 +219,7 @@ v1i8 va_v1i8(__builtin_va_list l) { return __builtin_va_arg(l, v1i8); }
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <1 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <1 x i8>*, <1 x i8>** [[VA_ARG_ADDR]]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define <1 x i8> @va_v1i8(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <1 x i8> @va_v1i8(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <1 x i8>*
|
||||
@ -229,7 +229,7 @@ v1i8 va_v1i8(__builtin_va_list l) { return __builtin_va_arg(l, v1i8); }
|
||||
// CHECK-VECTOR: ret <1 x i8> [[RET]]
|
||||
|
||||
v2i8 va_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, v2i8); }
|
||||
// CHECK-LABEL: define void @va_v2i8(<2 x i8>* noalias sret(<2 x i8>) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_v2i8(<2 x i8>* noalias sret(<2 x i8>) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -251,7 +251,7 @@ v2i8 va_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, v2i8); }
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <2 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <2 x i8>*, <2 x i8>** [[VA_ARG_ADDR]]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define <2 x i8> @va_v2i8(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <2 x i8> @va_v2i8(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <2 x i8>*
|
||||
@ -261,7 +261,7 @@ v2i8 va_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, v2i8); }
|
||||
// CHECK-VECTOR: ret <2 x i8> [[RET]]
|
||||
|
||||
v4i8 va_v4i8(__builtin_va_list l) { return __builtin_va_arg(l, v4i8); }
|
||||
// CHECK-LABEL: define void @va_v4i8(<4 x i8>* noalias sret(<4 x i8>) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_v4i8(<4 x i8>* noalias sret(<4 x i8>) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -283,7 +283,7 @@ v4i8 va_v4i8(__builtin_va_list l) { return __builtin_va_arg(l, v4i8); }
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <4 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <4 x i8>*, <4 x i8>** [[VA_ARG_ADDR]]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define <4 x i8> @va_v4i8(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <4 x i8> @va_v4i8(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <4 x i8>*
|
||||
@ -293,7 +293,7 @@ v4i8 va_v4i8(__builtin_va_list l) { return __builtin_va_arg(l, v4i8); }
|
||||
// CHECK-VECTOR: ret <4 x i8> [[RET]]
|
||||
|
||||
v8i8 va_v8i8(__builtin_va_list l) { return __builtin_va_arg(l, v8i8); }
|
||||
// CHECK-LABEL: define void @va_v8i8(<8 x i8>* noalias sret(<8 x i8>) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_v8i8(<8 x i8>* noalias sret(<8 x i8>) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -315,7 +315,7 @@ v8i8 va_v8i8(__builtin_va_list l) { return __builtin_va_arg(l, v8i8); }
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <8 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <8 x i8>*, <8 x i8>** [[VA_ARG_ADDR]]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define <8 x i8> @va_v8i8(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <8 x i8> @va_v8i8(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <8 x i8>*
|
||||
@ -325,7 +325,7 @@ v8i8 va_v8i8(__builtin_va_list l) { return __builtin_va_arg(l, v8i8); }
|
||||
// CHECK-VECTOR: ret <8 x i8> [[RET]]
|
||||
|
||||
v16i8 va_v16i8(__builtin_va_list l) { return __builtin_va_arg(l, v16i8); }
|
||||
// CHECK-LABEL: define void @va_v16i8(<16 x i8>* noalias sret(<16 x i8>) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_v16i8(<16 x i8>* noalias sret(<16 x i8>) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -347,7 +347,7 @@ v16i8 va_v16i8(__builtin_va_list l) { return __builtin_va_arg(l, v16i8); }
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <16 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <16 x i8>*, <16 x i8>** [[VA_ARG_ADDR]]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define <16 x i8> @va_v16i8(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} <16 x i8> @va_v16i8(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to <16 x i8>*
|
||||
@ -357,7 +357,7 @@ v16i8 va_v16i8(__builtin_va_list l) { return __builtin_va_arg(l, v16i8); }
|
||||
// CHECK-VECTOR: ret <16 x i8> [[RET]]
|
||||
|
||||
v32i8 va_v32i8(__builtin_va_list l) { return __builtin_va_arg(l, v32i8); }
|
||||
// CHECK-LABEL: define void @va_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 32 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 32 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -379,7 +379,7 @@ v32i8 va_v32i8(__builtin_va_list l) { return __builtin_va_arg(l, v32i8); }
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi <32 x i8>** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load <32 x i8>*, <32 x i8>** [[VA_ARG_ADDR]]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define void @va_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @va_v32i8(<32 x i8>* noalias sret(<32 x i8>) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK-VECTOR: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK-VECTOR: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -403,7 +403,7 @@ v32i8 va_v32i8(__builtin_va_list l) { return __builtin_va_arg(l, v32i8); }
|
||||
// CHECK-VECTOR: ret void
|
||||
|
||||
struct agg_v1i8 va_agg_v1i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v1i8); }
|
||||
// CHECK-LABEL: define void @va_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -424,7 +424,7 @@ struct agg_v1i8 va_agg_v1i8(__builtin_va_list l) { return __builtin_va_arg(l, st
|
||||
// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v1i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define void @va_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v1i8(%struct.agg_v1i8* noalias sret(%struct.agg_v1i8) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v1i8*
|
||||
@ -433,7 +433,7 @@ struct agg_v1i8 va_agg_v1i8(__builtin_va_list l) { return __builtin_va_arg(l, st
|
||||
// CHECK-VECTOR: ret void
|
||||
|
||||
struct agg_v2i8 va_agg_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v2i8); }
|
||||
// CHECK-LABEL: define void @va_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -454,7 +454,7 @@ struct agg_v2i8 va_agg_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, st
|
||||
// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v2i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define void @va_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v2i8(%struct.agg_v2i8* noalias sret(%struct.agg_v2i8) align 2 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v2i8*
|
||||
@ -463,7 +463,7 @@ struct agg_v2i8 va_agg_v2i8(__builtin_va_list l) { return __builtin_va_arg(l, st
|
||||
// CHECK-VECTOR: ret void
|
||||
|
||||
struct agg_v4i8 va_agg_v4i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v4i8); }
|
||||
// CHECK-LABEL: define void @va_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -484,7 +484,7 @@ struct agg_v4i8 va_agg_v4i8(__builtin_va_list l) { return __builtin_va_arg(l, st
|
||||
// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v4i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define void @va_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v4i8(%struct.agg_v4i8* noalias sret(%struct.agg_v4i8) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v4i8*
|
||||
@ -493,7 +493,7 @@ struct agg_v4i8 va_agg_v4i8(__builtin_va_list l) { return __builtin_va_arg(l, st
|
||||
// CHECK-VECTOR: ret void
|
||||
|
||||
struct agg_v8i8 va_agg_v8i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v8i8); }
|
||||
// CHECK-LABEL: define void @va_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -514,7 +514,7 @@ struct agg_v8i8 va_agg_v8i8(__builtin_va_list l) { return __builtin_va_arg(l, st
|
||||
// CHECK: store i8* [[OVERFLOW_ARG_AREA2]], i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v8i8* [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define void @va_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v8i8(%struct.agg_v8i8* noalias sret(%struct.agg_v8i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v8i8*
|
||||
@ -523,7 +523,7 @@ struct agg_v8i8 va_agg_v8i8(__builtin_va_list l) { return __builtin_va_arg(l, st
|
||||
// CHECK-VECTOR: ret void
|
||||
|
||||
struct agg_v16i8 va_agg_v16i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v16i8); }
|
||||
// CHECK-LABEL: define void @va_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -545,7 +545,7 @@ struct agg_v16i8 va_agg_v16i8(__builtin_va_list l) { return __builtin_va_arg(l,
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v16i8** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load %struct.agg_v16i8*, %struct.agg_v16i8** [[VA_ARG_ADDR]]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define void @va_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v16i8(%struct.agg_v16i8* noalias sret(%struct.agg_v16i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 2
|
||||
// CHECK-VECTOR: [[OVERFLOW_ARG_AREA:%[^ ]+]] = load i8*, i8** [[OVERFLOW_ARG_AREA_PTR]]
|
||||
// CHECK-VECTOR: [[MEM_ADDR:%[^ ]+]] = bitcast i8* [[OVERFLOW_ARG_AREA]] to %struct.agg_v16i8*
|
||||
@ -554,7 +554,7 @@ struct agg_v16i8 va_agg_v16i8(__builtin_va_list l) { return __builtin_va_arg(l,
|
||||
// CHECK-VECTOR: ret void
|
||||
|
||||
struct agg_v32i8 va_agg_v32i8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_v32i8); }
|
||||
// CHECK-LABEL: define void @va_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 32 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 32 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -576,7 +576,7 @@ struct agg_v32i8 va_agg_v32i8(__builtin_va_list l) { return __builtin_va_arg(l,
|
||||
// CHECK: [[VA_ARG_ADDR:%[^ ]+]] = phi %struct.agg_v32i8** [ [[REG_ADDR]], %{{.*}} ], [ [[MEM_ADDR]], %{{.*}} ]
|
||||
// CHECK: [[INDIRECT_ARG:%[^ ]+]] = load %struct.agg_v32i8*, %struct.agg_v32i8** [[VA_ARG_ADDR]]
|
||||
// CHECK: ret void
|
||||
// CHECK-VECTOR-LABEL: define void @va_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR-LABEL: define{{.*}} void @va_agg_v32i8(%struct.agg_v32i8* noalias sret(%struct.agg_v32i8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-VECTOR: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK-VECTOR: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK-VECTOR: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
|
||||
@ -21,155 +21,155 @@
|
||||
// Scalar types
|
||||
|
||||
char pass_char(char arg) { return arg; }
|
||||
// CHECK-LABEL: define signext i8 @pass_char(i8 signext %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} signext i8 @pass_char(i8 signext %{{.*}})
|
||||
|
||||
short pass_short(short arg) { return arg; }
|
||||
// CHECK-LABEL: define signext i16 @pass_short(i16 signext %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} signext i16 @pass_short(i16 signext %{{.*}})
|
||||
|
||||
int pass_int(int arg) { return arg; }
|
||||
// CHECK-LABEL: define signext i32 @pass_int(i32 signext %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @pass_int(i32 signext %{{.*}})
|
||||
|
||||
long pass_long(long arg) { return arg; }
|
||||
// CHECK-LABEL: define i64 @pass_long(i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} i64 @pass_long(i64 %{{.*}})
|
||||
|
||||
long long pass_longlong(long long arg) { return arg; }
|
||||
// CHECK-LABEL: define i64 @pass_longlong(i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} i64 @pass_longlong(i64 %{{.*}})
|
||||
|
||||
__int128 pass_int128(__int128 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_int128(i128* noalias sret(i128) align 16 %{{.*}}, i128* %0)
|
||||
// CHECK-LABEL: define{{.*}} void @pass_int128(i128* noalias sret(i128) align 16 %{{.*}}, i128* %0)
|
||||
|
||||
float pass_float(float arg) { return arg; }
|
||||
// CHECK-LABEL: define float @pass_float(float %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} float @pass_float(float %{{.*}})
|
||||
|
||||
double pass_double(double arg) { return arg; }
|
||||
// CHECK-LABEL: define double @pass_double(double %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} double @pass_double(double %{{.*}})
|
||||
|
||||
long double pass_longdouble(long double arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_longdouble(fp128* noalias sret(fp128) align 8 %{{.*}}, fp128* %0)
|
||||
// CHECK-LABEL: define{{.*}} void @pass_longdouble(fp128* noalias sret(fp128) align 8 %{{.*}}, fp128* %0)
|
||||
|
||||
|
||||
// Complex types
|
||||
|
||||
_Complex char pass_complex_char(_Complex char arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_complex_char({ i8, i8 }* noalias sret({ i8, i8 }) align 1 %{{.*}}, { i8, i8 }* %{{.*}}arg)
|
||||
// CHECK-LABEL: define{{.*}} void @pass_complex_char({ i8, i8 }* noalias sret({ i8, i8 }) align 1 %{{.*}}, { i8, i8 }* %{{.*}}arg)
|
||||
|
||||
_Complex short pass_complex_short(_Complex short arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_complex_short({ i16, i16 }* noalias sret({ i16, i16 }) align 2 %{{.*}}, { i16, i16 }* %{{.*}}arg)
|
||||
// CHECK-LABEL: define{{.*}} void @pass_complex_short({ i16, i16 }* noalias sret({ i16, i16 }) align 2 %{{.*}}, { i16, i16 }* %{{.*}}arg)
|
||||
|
||||
_Complex int pass_complex_int(_Complex int arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_complex_int({ i32, i32 }* noalias sret({ i32, i32 }) align 4 %{{.*}}, { i32, i32 }* %{{.*}}arg)
|
||||
// CHECK-LABEL: define{{.*}} void @pass_complex_int({ i32, i32 }* noalias sret({ i32, i32 }) align 4 %{{.*}}, { i32, i32 }* %{{.*}}arg)
|
||||
|
||||
_Complex long pass_complex_long(_Complex long arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_complex_long({ i64, i64 }* noalias sret({ i64, i64 }) align 8 %{{.*}}, { i64, i64 }* %{{.*}}arg)
|
||||
// CHECK-LABEL: define{{.*}} void @pass_complex_long({ i64, i64 }* noalias sret({ i64, i64 }) align 8 %{{.*}}, { i64, i64 }* %{{.*}}arg)
|
||||
|
||||
_Complex long long pass_complex_longlong(_Complex long long arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_complex_longlong({ i64, i64 }* noalias sret({ i64, i64 }) align 8 %{{.*}}, { i64, i64 }* %{{.*}}arg)
|
||||
// CHECK-LABEL: define{{.*}} void @pass_complex_longlong({ i64, i64 }* noalias sret({ i64, i64 }) align 8 %{{.*}}, { i64, i64 }* %{{.*}}arg)
|
||||
|
||||
_Complex float pass_complex_float(_Complex float arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_complex_float({ float, float }* noalias sret({ float, float }) align 4 %{{.*}}, { float, float }* %{{.*}}arg)
|
||||
// CHECK-LABEL: define{{.*}} void @pass_complex_float({ float, float }* noalias sret({ float, float }) align 4 %{{.*}}, { float, float }* %{{.*}}arg)
|
||||
|
||||
_Complex double pass_complex_double(_Complex double arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_complex_double({ double, double }* noalias sret({ double, double }) align 8 %{{.*}}, { double, double }* %{{.*}}arg)
|
||||
// CHECK-LABEL: define{{.*}} void @pass_complex_double({ double, double }* noalias sret({ double, double }) align 8 %{{.*}}, { double, double }* %{{.*}}arg)
|
||||
|
||||
_Complex long double pass_complex_longdouble(_Complex long double arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_complex_longdouble({ fp128, fp128 }* noalias sret({ fp128, fp128 }) align 8 %{{.*}}, { fp128, fp128 }* %{{.*}}arg)
|
||||
// CHECK-LABEL: define{{.*}} void @pass_complex_longdouble({ fp128, fp128 }* noalias sret({ fp128, fp128 }) align 8 %{{.*}}, { fp128, fp128 }* %{{.*}}arg)
|
||||
|
||||
|
||||
// Aggregate types
|
||||
|
||||
struct agg_1byte { char a[1]; };
|
||||
struct agg_1byte pass_agg_1byte(struct agg_1byte arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_1byte(%struct.agg_1byte* noalias sret(%struct.agg_1byte) align 1 %{{.*}}, i8 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_1byte(%struct.agg_1byte* noalias sret(%struct.agg_1byte) align 1 %{{.*}}, i8 %{{.*}})
|
||||
|
||||
struct agg_2byte { char a[2]; };
|
||||
struct agg_2byte pass_agg_2byte(struct agg_2byte arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_2byte(%struct.agg_2byte* noalias sret(%struct.agg_2byte) align 1 %{{.*}}, i16 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_2byte(%struct.agg_2byte* noalias sret(%struct.agg_2byte) align 1 %{{.*}}, i16 %{{.*}})
|
||||
|
||||
struct agg_3byte { char a[3]; };
|
||||
struct agg_3byte pass_agg_3byte(struct agg_3byte arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_3byte(%struct.agg_3byte* noalias sret(%struct.agg_3byte) align 1 %{{.*}}, %struct.agg_3byte* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_3byte(%struct.agg_3byte* noalias sret(%struct.agg_3byte) align 1 %{{.*}}, %struct.agg_3byte* %{{.*}})
|
||||
|
||||
struct agg_4byte { char a[4]; };
|
||||
struct agg_4byte pass_agg_4byte(struct agg_4byte arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_4byte(%struct.agg_4byte* noalias sret(%struct.agg_4byte) align 1 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_4byte(%struct.agg_4byte* noalias sret(%struct.agg_4byte) align 1 %{{.*}}, i32 %{{.*}})
|
||||
|
||||
struct agg_5byte { char a[5]; };
|
||||
struct agg_5byte pass_agg_5byte(struct agg_5byte arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_5byte(%struct.agg_5byte* noalias sret(%struct.agg_5byte) align 1 %{{.*}}, %struct.agg_5byte* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_5byte(%struct.agg_5byte* noalias sret(%struct.agg_5byte) align 1 %{{.*}}, %struct.agg_5byte* %{{.*}})
|
||||
|
||||
struct agg_6byte { char a[6]; };
|
||||
struct agg_6byte pass_agg_6byte(struct agg_6byte arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_6byte(%struct.agg_6byte* noalias sret(%struct.agg_6byte) align 1 %{{.*}}, %struct.agg_6byte* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_6byte(%struct.agg_6byte* noalias sret(%struct.agg_6byte) align 1 %{{.*}}, %struct.agg_6byte* %{{.*}})
|
||||
|
||||
struct agg_7byte { char a[7]; };
|
||||
struct agg_7byte pass_agg_7byte(struct agg_7byte arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_7byte(%struct.agg_7byte* noalias sret(%struct.agg_7byte) align 1 %{{.*}}, %struct.agg_7byte* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_7byte(%struct.agg_7byte* noalias sret(%struct.agg_7byte) align 1 %{{.*}}, %struct.agg_7byte* %{{.*}})
|
||||
|
||||
struct agg_8byte { char a[8]; };
|
||||
struct agg_8byte pass_agg_8byte(struct agg_8byte arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_8byte(%struct.agg_8byte* noalias sret(%struct.agg_8byte) align 1 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_8byte(%struct.agg_8byte* noalias sret(%struct.agg_8byte) align 1 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
struct agg_16byte { char a[16]; };
|
||||
struct agg_16byte pass_agg_16byte(struct agg_16byte arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_16byte(%struct.agg_16byte* noalias sret(%struct.agg_16byte) align 1 %{{.*}}, %struct.agg_16byte* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_16byte(%struct.agg_16byte* noalias sret(%struct.agg_16byte) align 1 %{{.*}}, %struct.agg_16byte* %{{.*}})
|
||||
|
||||
|
||||
// Float-like aggregate types
|
||||
|
||||
struct agg_float { float a; };
|
||||
struct agg_float pass_agg_float(struct agg_float arg) { return arg; }
|
||||
// HARD-FLOAT-LABEL: define void @pass_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, float %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @pass_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// HARD-FLOAT-LABEL: define{{.*}} void @pass_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, float %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @pass_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, i32 %{{.*}})
|
||||
|
||||
struct agg_double { double a; };
|
||||
struct agg_double pass_agg_double(struct agg_double arg) { return arg; }
|
||||
// HARD-FLOAT-LABEL: define void @pass_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, double %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @pass_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, i64 %{{.*}})
|
||||
// HARD-FLOAT-LABEL: define{{.*}} void @pass_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, double %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @pass_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
struct agg_longdouble { long double a; };
|
||||
struct agg_longdouble pass_agg_longdouble(struct agg_longdouble arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_longdouble(%struct.agg_longdouble* noalias sret(%struct.agg_longdouble) align 8 %{{.*}}, %struct.agg_longdouble* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_longdouble(%struct.agg_longdouble* noalias sret(%struct.agg_longdouble) align 8 %{{.*}}, %struct.agg_longdouble* %{{.*}})
|
||||
|
||||
struct agg_float_a8 { float a __attribute__((aligned (8))); };
|
||||
struct agg_float_a8 pass_agg_float_a8(struct agg_float_a8 arg) { return arg; }
|
||||
// HARD-FLOAT-LABEL: define void @pass_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, double %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @pass_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, i64 %{{.*}})
|
||||
// HARD-FLOAT-LABEL: define{{.*}} void @pass_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, double %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @pass_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
struct agg_float_a16 { float a __attribute__((aligned (16))); };
|
||||
struct agg_float_a16 pass_agg_float_a16(struct agg_float_a16 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_float_a16(%struct.agg_float_a16* noalias sret(%struct.agg_float_a16) align 16 %{{.*}}, %struct.agg_float_a16* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_float_a16(%struct.agg_float_a16* noalias sret(%struct.agg_float_a16) align 16 %{{.*}}, %struct.agg_float_a16* %{{.*}})
|
||||
|
||||
|
||||
// Verify that the following are *not* float-like aggregate types
|
||||
|
||||
struct agg_nofloat1 { float a; float b; };
|
||||
struct agg_nofloat1 pass_agg_nofloat1(struct agg_nofloat1 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_nofloat1(%struct.agg_nofloat1* noalias sret(%struct.agg_nofloat1) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_nofloat1(%struct.agg_nofloat1* noalias sret(%struct.agg_nofloat1) align 4 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
struct agg_nofloat2 { float a; int b; };
|
||||
struct agg_nofloat2 pass_agg_nofloat2(struct agg_nofloat2 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_nofloat2(%struct.agg_nofloat2* noalias sret(%struct.agg_nofloat2) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_nofloat2(%struct.agg_nofloat2* noalias sret(%struct.agg_nofloat2) align 4 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
struct agg_nofloat3 { float a; int : 0; };
|
||||
struct agg_nofloat3 pass_agg_nofloat3(struct agg_nofloat3 arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_agg_nofloat3(%struct.agg_nofloat3* noalias sret(%struct.agg_nofloat3) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_agg_nofloat3(%struct.agg_nofloat3* noalias sret(%struct.agg_nofloat3) align 4 %{{.*}}, i32 %{{.*}})
|
||||
|
||||
|
||||
// Union types likewise are *not* float-like aggregate types
|
||||
|
||||
union union_float { float a; };
|
||||
union union_float pass_union_float(union union_float arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_union_float(%union.union_float* noalias sret(%union.union_float) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_union_float(%union.union_float* noalias sret(%union.union_float) align 4 %{{.*}}, i32 %{{.*}})
|
||||
|
||||
union union_double { double a; };
|
||||
union union_double pass_union_double(union union_double arg) { return arg; }
|
||||
// CHECK-LABEL: define void @pass_union_double(%union.union_double* noalias sret(%union.union_double) align 8 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @pass_union_double(%union.union_double* noalias sret(%union.union_double) align 8 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
|
||||
// Accessing variable argument lists
|
||||
|
||||
int va_int(__builtin_va_list l) { return __builtin_va_arg(l, int); }
|
||||
// CHECK-LABEL: define signext i32 @va_int(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @va_int(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -193,7 +193,7 @@ int va_int(__builtin_va_list l) { return __builtin_va_arg(l, int); }
|
||||
// CHECK: ret i32 [[RET]]
|
||||
|
||||
long va_long(__builtin_va_list l) { return __builtin_va_arg(l, long); }
|
||||
// CHECK-LABEL: define i64 @va_long(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} i64 @va_long(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -217,7 +217,7 @@ long va_long(__builtin_va_list l) { return __builtin_va_arg(l, long); }
|
||||
// CHECK: ret i64 [[RET]]
|
||||
|
||||
long long va_longlong(__builtin_va_list l) { return __builtin_va_arg(l, long long); }
|
||||
// CHECK-LABEL: define i64 @va_longlong(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} i64 @va_longlong(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -241,7 +241,7 @@ long long va_longlong(__builtin_va_list l) { return __builtin_va_arg(l, long lon
|
||||
// CHECK: ret i64 [[RET]]
|
||||
|
||||
double va_double(__builtin_va_list l) { return __builtin_va_arg(l, double); }
|
||||
// CHECK-LABEL: define double @va_double(%struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} double @va_double(%struct.__va_list_tag* %{{.*}})
|
||||
// HARD-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 1
|
||||
// SOFT-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
@ -268,7 +268,7 @@ double va_double(__builtin_va_list l) { return __builtin_va_arg(l, double); }
|
||||
// CHECK: ret double [[RET]]
|
||||
|
||||
long double va_longdouble(__builtin_va_list l) { return __builtin_va_arg(l, long double); }
|
||||
// CHECK-LABEL: define void @va_longdouble(fp128* noalias sret(fp128) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @va_longdouble(fp128* noalias sret(fp128) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}})
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -294,7 +294,7 @@ long double va_longdouble(__builtin_va_list l) { return __builtin_va_arg(l, long
|
||||
// CHECK: ret void
|
||||
|
||||
_Complex char va_complex_char(__builtin_va_list l) { return __builtin_va_arg(l, _Complex char); }
|
||||
// CHECK-LABEL: define void @va_complex_char({ i8, i8 }* noalias sret({ i8, i8 }) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_complex_char({ i8, i8 }* noalias sret({ i8, i8 }) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -318,7 +318,7 @@ _Complex char va_complex_char(__builtin_va_list l) { return __builtin_va_arg(l,
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_1byte va_agg_1byte(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_1byte); }
|
||||
// CHECK-LABEL: define void @va_agg_1byte(%struct.agg_1byte* noalias sret(%struct.agg_1byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_1byte(%struct.agg_1byte* noalias sret(%struct.agg_1byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -341,7 +341,7 @@ struct agg_1byte va_agg_1byte(__builtin_va_list l) { return __builtin_va_arg(l,
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_2byte va_agg_2byte(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_2byte); }
|
||||
// CHECK-LABEL: define void @va_agg_2byte(%struct.agg_2byte* noalias sret(%struct.agg_2byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_2byte(%struct.agg_2byte* noalias sret(%struct.agg_2byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -364,7 +364,7 @@ struct agg_2byte va_agg_2byte(__builtin_va_list l) { return __builtin_va_arg(l,
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_3byte va_agg_3byte(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_3byte); }
|
||||
// CHECK-LABEL: define void @va_agg_3byte(%struct.agg_3byte* noalias sret(%struct.agg_3byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_3byte(%struct.agg_3byte* noalias sret(%struct.agg_3byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -388,7 +388,7 @@ struct agg_3byte va_agg_3byte(__builtin_va_list l) { return __builtin_va_arg(l,
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_4byte va_agg_4byte(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_4byte); }
|
||||
// CHECK-LABEL: define void @va_agg_4byte(%struct.agg_4byte* noalias sret(%struct.agg_4byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_4byte(%struct.agg_4byte* noalias sret(%struct.agg_4byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -411,7 +411,7 @@ struct agg_4byte va_agg_4byte(__builtin_va_list l) { return __builtin_va_arg(l,
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_8byte va_agg_8byte(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_8byte); }
|
||||
// CHECK-LABEL: define void @va_agg_8byte(%struct.agg_8byte* noalias sret(%struct.agg_8byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_8byte(%struct.agg_8byte* noalias sret(%struct.agg_8byte) align 1 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -434,7 +434,7 @@ struct agg_8byte va_agg_8byte(__builtin_va_list l) { return __builtin_va_arg(l,
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_float va_agg_float(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_float); }
|
||||
// CHECK-LABEL: define void @va_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_float(%struct.agg_float* noalias sret(%struct.agg_float) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// HARD-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 1
|
||||
// SOFT-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
@ -460,7 +460,7 @@ struct agg_float va_agg_float(__builtin_va_list l) { return __builtin_va_arg(l,
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_double va_agg_double(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_double); }
|
||||
// CHECK-LABEL: define void @va_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_double(%struct.agg_double* noalias sret(%struct.agg_double) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// HARD-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 1
|
||||
// SOFT-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
@ -486,7 +486,7 @@ struct agg_double va_agg_double(__builtin_va_list l) { return __builtin_va_arg(l
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_longdouble va_agg_longdouble(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_longdouble); }
|
||||
// CHECK-LABEL: define void @va_agg_longdouble(%struct.agg_longdouble* noalias sret(%struct.agg_longdouble) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_longdouble(%struct.agg_longdouble* noalias sret(%struct.agg_longdouble) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -510,7 +510,7 @@ struct agg_longdouble va_agg_longdouble(__builtin_va_list l) { return __builtin_
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_float_a8 va_agg_float_a8(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_float_a8); }
|
||||
// CHECK-LABEL: define void @va_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_float_a8(%struct.agg_float_a8* noalias sret(%struct.agg_float_a8) align 8 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// HARD-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 1
|
||||
// SOFT-FLOAT: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
@ -536,7 +536,7 @@ struct agg_float_a8 va_agg_float_a8(__builtin_va_list l) { return __builtin_va_a
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_float_a16 va_agg_float_a16(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_float_a16); }
|
||||
// CHECK-LABEL: define void @va_agg_float_a16(%struct.agg_float_a16* noalias sret(%struct.agg_float_a16) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_float_a16(%struct.agg_float_a16* noalias sret(%struct.agg_float_a16) align 16 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -560,7 +560,7 @@ struct agg_float_a16 va_agg_float_a16(__builtin_va_list l) { return __builtin_va
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_nofloat1 va_agg_nofloat1(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_nofloat1); }
|
||||
// CHECK-LABEL: define void @va_agg_nofloat1(%struct.agg_nofloat1* noalias sret(%struct.agg_nofloat1) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_nofloat1(%struct.agg_nofloat1* noalias sret(%struct.agg_nofloat1) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -583,7 +583,7 @@ struct agg_nofloat1 va_agg_nofloat1(__builtin_va_list l) { return __builtin_va_a
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_nofloat2 va_agg_nofloat2(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_nofloat2); }
|
||||
// CHECK-LABEL: define void @va_agg_nofloat2(%struct.agg_nofloat2* noalias sret(%struct.agg_nofloat2) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_nofloat2(%struct.agg_nofloat2* noalias sret(%struct.agg_nofloat2) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
@ -606,7 +606,7 @@ struct agg_nofloat2 va_agg_nofloat2(__builtin_va_list l) { return __builtin_va_a
|
||||
// CHECK: ret void
|
||||
|
||||
struct agg_nofloat3 va_agg_nofloat3(__builtin_va_list l) { return __builtin_va_arg(l, struct agg_nofloat3); }
|
||||
// CHECK-LABEL: define void @va_agg_nofloat3(%struct.agg_nofloat3* noalias sret(%struct.agg_nofloat3) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK-LABEL: define{{.*}} void @va_agg_nofloat3(%struct.agg_nofloat3* noalias sret(%struct.agg_nofloat3) align 4 %{{.*}}, %struct.__va_list_tag* %{{.*}}
|
||||
// CHECK: [[REG_COUNT_PTR:%[^ ]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{.*}}, i32 0, i32 0
|
||||
// CHECK: [[REG_COUNT:%[^ ]+]] = load i64, i64* [[REG_COUNT_PTR]]
|
||||
// CHECK: [[FITS_IN_REGS:%[^ ]+]] = icmp ult i64 [[REG_COUNT]], 5
|
||||
|
||||
@ -6,13 +6,13 @@
|
||||
|
||||
class agg_float_class { float a; };
|
||||
class agg_float_class pass_agg_float_class(class agg_float_class arg) { return arg; }
|
||||
// CHECK-LABEL: define void @_Z20pass_agg_float_class15agg_float_class(%class.agg_float_class* noalias sret(%class.agg_float_class) align 4 %{{.*}}, float %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @_Z20pass_agg_float_class15agg_float_class(%class.agg_float_class* noalias sret(%class.agg_float_class) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @_Z20pass_agg_float_class15agg_float_class(%class.agg_float_class* noalias sret(%class.agg_float_class) align 4 %{{.*}}, float %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @_Z20pass_agg_float_class15agg_float_class(%class.agg_float_class* noalias sret(%class.agg_float_class) align 4 %{{.*}}, i32 %{{.*}})
|
||||
|
||||
class agg_double_class { double a; };
|
||||
class agg_double_class pass_agg_double_class(class agg_double_class arg) { return arg; }
|
||||
// CHECK-LABEL: define void @_Z21pass_agg_double_class16agg_double_class(%class.agg_double_class* noalias sret(%class.agg_double_class) align 8 %{{.*}}, double %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @_Z21pass_agg_double_class16agg_double_class(%class.agg_double_class* noalias sret(%class.agg_double_class) align 8 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @_Z21pass_agg_double_class16agg_double_class(%class.agg_double_class* noalias sret(%class.agg_double_class) align 8 %{{.*}}, double %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @_Z21pass_agg_double_class16agg_double_class(%class.agg_double_class* noalias sret(%class.agg_double_class) align 8 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
|
||||
// For compatibility with GCC, this structure is passed in an FPR in C++,
|
||||
@ -20,8 +20,8 @@ class agg_double_class pass_agg_double_class(class agg_double_class arg) { retur
|
||||
|
||||
struct agg_float_cpp { float a; int : 0; };
|
||||
struct agg_float_cpp pass_agg_float_cpp(struct agg_float_cpp arg) { return arg; }
|
||||
// CHECK-LABEL: define void @_Z18pass_agg_float_cpp13agg_float_cpp(%struct.agg_float_cpp* noalias sret(%struct.agg_float_cpp) align 4 %{{.*}}, float %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @_Z18pass_agg_float_cpp13agg_float_cpp(%struct.agg_float_cpp* noalias sret(%struct.agg_float_cpp) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @_Z18pass_agg_float_cpp13agg_float_cpp(%struct.agg_float_cpp* noalias sret(%struct.agg_float_cpp) align 4 %{{.*}}, float %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @_Z18pass_agg_float_cpp13agg_float_cpp(%struct.agg_float_cpp* noalias sret(%struct.agg_float_cpp) align 4 %{{.*}}, i32 %{{.*}})
|
||||
|
||||
|
||||
// A field member of empty class type in C++ makes the record nonhomogeneous,
|
||||
@ -29,31 +29,31 @@ struct agg_float_cpp pass_agg_float_cpp(struct agg_float_cpp arg) { return arg;
|
||||
struct empty { };
|
||||
struct agg_nofloat_empty { float a; empty dummy; };
|
||||
struct agg_nofloat_empty pass_agg_nofloat_empty(struct agg_nofloat_empty arg) { return arg; }
|
||||
// CHECK-LABEL: define void @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(%struct.agg_nofloat_empty* noalias sret(%struct.agg_nofloat_empty) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(%struct.agg_nofloat_empty* noalias sret(%struct.agg_nofloat_empty) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(%struct.agg_nofloat_empty* noalias sret(%struct.agg_nofloat_empty) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @_Z22pass_agg_nofloat_empty17agg_nofloat_empty(%struct.agg_nofloat_empty* noalias sret(%struct.agg_nofloat_empty) align 4 %{{.*}}, i64 %{{.*}})
|
||||
struct agg_float_empty { float a; [[no_unique_address]] empty dummy; };
|
||||
struct agg_float_empty pass_agg_float_empty(struct agg_float_empty arg) { return arg; }
|
||||
// CHECK-LABEL: define void @_Z20pass_agg_float_empty15agg_float_empty(%struct.agg_float_empty* noalias sret(%struct.agg_float_empty) align 4 %{{.*}}, float %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @_Z20pass_agg_float_empty15agg_float_empty(%struct.agg_float_empty* noalias sret(%struct.agg_float_empty) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @_Z20pass_agg_float_empty15agg_float_empty(%struct.agg_float_empty* noalias sret(%struct.agg_float_empty) align 4 %{{.*}}, float %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @_Z20pass_agg_float_empty15agg_float_empty(%struct.agg_float_empty* noalias sret(%struct.agg_float_empty) align 4 %{{.*}}, i32 %{{.*}})
|
||||
struct agg_nofloat_emptyarray { float a; [[no_unique_address]] empty dummy[3]; };
|
||||
struct agg_nofloat_emptyarray pass_agg_nofloat_emptyarray(struct agg_nofloat_emptyarray arg) { return arg; }
|
||||
// CHECK-LABEL: define void @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(%struct.agg_nofloat_emptyarray* noalias sret(%struct.agg_nofloat_emptyarray) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(%struct.agg_nofloat_emptyarray* noalias sret(%struct.agg_nofloat_emptyarray) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(%struct.agg_nofloat_emptyarray* noalias sret(%struct.agg_nofloat_emptyarray) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @_Z27pass_agg_nofloat_emptyarray22agg_nofloat_emptyarray(%struct.agg_nofloat_emptyarray* noalias sret(%struct.agg_nofloat_emptyarray) align 4 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
// And likewise for members of base classes.
|
||||
struct noemptybase { empty dummy; };
|
||||
struct agg_nofloat_emptybase : noemptybase { float a; };
|
||||
struct agg_nofloat_emptybase pass_agg_nofloat_emptybase(struct agg_nofloat_emptybase arg) { return arg; }
|
||||
// CHECK-LABEL: define void @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(%struct.agg_nofloat_emptybase* noalias sret(%struct.agg_nofloat_emptybase) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(%struct.agg_nofloat_emptybase* noalias sret(%struct.agg_nofloat_emptybase) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(%struct.agg_nofloat_emptybase* noalias sret(%struct.agg_nofloat_emptybase) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @_Z26pass_agg_nofloat_emptybase21agg_nofloat_emptybase(%struct.agg_nofloat_emptybase* noalias sret(%struct.agg_nofloat_emptybase) align 4 %{{.*}}, i64 %{{.*}})
|
||||
struct emptybase { [[no_unique_address]] empty dummy; };
|
||||
struct agg_float_emptybase : emptybase { float a; };
|
||||
struct agg_float_emptybase pass_agg_float_emptybase(struct agg_float_emptybase arg) { return arg; }
|
||||
// CHECK-LABEL: define void @_Z24pass_agg_float_emptybase19agg_float_emptybase(%struct.agg_float_emptybase* noalias sret(%struct.agg_float_emptybase) align 4 %{{.*}}, float %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @_Z24pass_agg_float_emptybase19agg_float_emptybase(%struct.agg_float_emptybase* noalias sret(%struct.agg_float_emptybase) align 4 %{{.*}}, i32 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @_Z24pass_agg_float_emptybase19agg_float_emptybase(%struct.agg_float_emptybase* noalias sret(%struct.agg_float_emptybase) align 4 %{{.*}}, float %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @_Z24pass_agg_float_emptybase19agg_float_emptybase(%struct.agg_float_emptybase* noalias sret(%struct.agg_float_emptybase) align 4 %{{.*}}, i32 %{{.*}})
|
||||
struct noemptybasearray { [[no_unique_address]] empty dummy[3]; };
|
||||
struct agg_nofloat_emptybasearray : noemptybasearray { float a; };
|
||||
struct agg_nofloat_emptybasearray pass_agg_nofloat_emptybasearray(struct agg_nofloat_emptybasearray arg) { return arg; }
|
||||
// CHECK-LABEL: define void @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(%struct.agg_nofloat_emptybasearray* noalias sret(%struct.agg_nofloat_emptybasearray) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define void @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(%struct.agg_nofloat_emptybasearray* noalias sret(%struct.agg_nofloat_emptybasearray) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// CHECK-LABEL: define{{.*}} void @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(%struct.agg_nofloat_emptybasearray* noalias sret(%struct.agg_nofloat_emptybasearray) align 4 %{{.*}}, i64 %{{.*}})
|
||||
// SOFT-FLOAT-LABEL: define{{.*}} void @_Z31pass_agg_nofloat_emptybasearray26agg_nofloat_emptybasearray(%struct.agg_nofloat_emptybasearray* noalias sret(%struct.agg_nofloat_emptybasearray) align 4 %{{.*}}, i64 %{{.*}})
|
||||
|
||||
|
||||
@ -5,31 +5,31 @@ unsigned long gl;
|
||||
|
||||
void test_store_m(unsigned int i) {
|
||||
asm("st %1, %0" : "=m" (gi) : "r" (i));
|
||||
// CHECK-LABEL: define void @test_store_m(i32 zeroext %i)
|
||||
// CHECK-LABEL: define{{.*}} void @test_store_m(i32 zeroext %i)
|
||||
// CHECK: call void asm "st $1, $0", "=*m,r"(i32* nonnull @gi, i32 %i)
|
||||
}
|
||||
|
||||
void test_store_Q(unsigned int i) {
|
||||
asm("st %1, %0" : "=Q" (gi) : "r" (i));
|
||||
// CHECK-LABEL: define void @test_store_Q(i32 zeroext %i)
|
||||
// CHECK-LABEL: define{{.*}} void @test_store_Q(i32 zeroext %i)
|
||||
// CHECK: call void asm "st $1, $0", "=*Q,r"(i32* nonnull @gi, i32 %i)
|
||||
}
|
||||
|
||||
void test_store_R(unsigned int i) {
|
||||
asm("st %1, %0" : "=R" (gi) : "r" (i));
|
||||
// CHECK-LABEL: define void @test_store_R(i32 zeroext %i)
|
||||
// CHECK-LABEL: define{{.*}} void @test_store_R(i32 zeroext %i)
|
||||
// CHECK: call void asm "st $1, $0", "=*R,r"(i32* nonnull @gi, i32 %i)
|
||||
}
|
||||
|
||||
void test_store_S(unsigned int i) {
|
||||
asm("st %1, %0" : "=S" (gi) : "r" (i));
|
||||
// CHECK-LABEL: define void @test_store_S(i32 zeroext %i)
|
||||
// CHECK-LABEL: define{{.*}} void @test_store_S(i32 zeroext %i)
|
||||
// CHECK: call void asm "st $1, $0", "=*S,r"(i32* nonnull @gi, i32 %i)
|
||||
}
|
||||
|
||||
void test_store_T(unsigned int i) {
|
||||
asm("st %1, %0" : "=T" (gi) : "r" (i));
|
||||
// CHECK-LABEL: define void @test_store_T(i32 zeroext %i)
|
||||
// CHECK-LABEL: define{{.*}} void @test_store_T(i32 zeroext %i)
|
||||
// CHECK: call void asm "st $1, $0", "=*T,r"(i32* nonnull @gi, i32 %i)
|
||||
}
|
||||
|
||||
@ -37,7 +37,7 @@ int test_load_m() {
|
||||
unsigned int i;
|
||||
asm("l %0, %1" : "=r" (i) : "m" (gi));
|
||||
return i;
|
||||
// CHECK-LABEL: define signext i32 @test_load_m()
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @test_load_m()
|
||||
// CHECK: call i32 asm "l $0, $1", "=r,*m"(i32* nonnull @gi)
|
||||
}
|
||||
|
||||
@ -45,7 +45,7 @@ int test_load_Q() {
|
||||
unsigned int i;
|
||||
asm("l %0, %1" : "=r" (i) : "Q" (gi));
|
||||
return i;
|
||||
// CHECK-LABEL: define signext i32 @test_load_Q()
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @test_load_Q()
|
||||
// CHECK: call i32 asm "l $0, $1", "=r,*Q"(i32* nonnull @gi)
|
||||
}
|
||||
|
||||
@ -53,7 +53,7 @@ int test_load_R() {
|
||||
unsigned int i;
|
||||
asm("l %0, %1" : "=r" (i) : "R" (gi));
|
||||
return i;
|
||||
// CHECK-LABEL: define signext i32 @test_load_R()
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @test_load_R()
|
||||
// CHECK: call i32 asm "l $0, $1", "=r,*R"(i32* nonnull @gi)
|
||||
}
|
||||
|
||||
@ -61,7 +61,7 @@ int test_load_S() {
|
||||
unsigned int i;
|
||||
asm("l %0, %1" : "=r" (i) : "S" (gi));
|
||||
return i;
|
||||
// CHECK-LABEL: define signext i32 @test_load_S()
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @test_load_S()
|
||||
// CHECK: call i32 asm "l $0, $1", "=r,*S"(i32* nonnull @gi)
|
||||
}
|
||||
|
||||
@ -69,61 +69,61 @@ int test_load_T() {
|
||||
unsigned int i;
|
||||
asm("l %0, %1" : "=r" (i) : "T" (gi));
|
||||
return i;
|
||||
// CHECK-LABEL: define signext i32 @test_load_T()
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @test_load_T()
|
||||
// CHECK: call i32 asm "l $0, $1", "=r,*T"(i32* nonnull @gi)
|
||||
}
|
||||
|
||||
void test_mI(unsigned char *c) {
|
||||
asm volatile("cli %0, %1" :: "Q" (*c), "I" (100));
|
||||
// CHECK-LABEL: define void @test_mI(i8* %c)
|
||||
// CHECK-LABEL: define{{.*}} void @test_mI(i8* %c)
|
||||
// CHECK: call void asm sideeffect "cli $0, $1", "*Q,I"(i8* %c, i32 100)
|
||||
}
|
||||
|
||||
unsigned int test_dJa(unsigned int i, unsigned int j) {
|
||||
asm("sll %0, %2(%3)" : "=d" (i) : "0" (i), "J" (1000), "a" (j));
|
||||
return i;
|
||||
// CHECK-LABEL: define zeroext i32 @test_dJa(i32 zeroext %i, i32 zeroext %j)
|
||||
// CHECK-LABEL: define{{.*}} zeroext i32 @test_dJa(i32 zeroext %i, i32 zeroext %j)
|
||||
// CHECK: call i32 asm "sll $0, $2($3)", "=d,0,J,a"(i32 %i, i32 1000, i32 %j)
|
||||
}
|
||||
|
||||
unsigned long test_rK(unsigned long i) {
|
||||
asm("aghi %0, %2" : "=r" (i) : "0" (i), "K" (-30000));
|
||||
return i;
|
||||
// CHECK-LABEL: define i64 @test_rK(i64 %i)
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_rK(i64 %i)
|
||||
// CHECK: call i64 asm "aghi $0, $2", "=r,0,K"(i64 %i, i32 -30000)
|
||||
}
|
||||
|
||||
unsigned long test_rL(unsigned long i) {
|
||||
asm("sllg %0, %1, %2" : "=r" (i) : "r" (i), "L" (500000));
|
||||
return i;
|
||||
// CHECK-LABEL: define i64 @test_rL(i64 %i)
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_rL(i64 %i)
|
||||
// CHECK: call i64 asm "sllg $0, $1, $2", "=r,r,L"(i64 %i, i32 500000)
|
||||
}
|
||||
|
||||
void test_M() {
|
||||
asm volatile("#FOO %0" :: "M"(0x7fffffff));
|
||||
// CHECK-LABEL: define void @test_M()
|
||||
// CHECK-LABEL: define{{.*}} void @test_M()
|
||||
// CHECK: call void asm sideeffect "#FOO $0", "M"(i32 2147483647)
|
||||
}
|
||||
|
||||
float test_f32(float f, float g) {
|
||||
asm("aebr %0, %2" : "=f" (f) : "0" (f), "f" (g));
|
||||
return f;
|
||||
// CHECK-LABEL: define float @test_f32(float %f, float %g)
|
||||
// CHECK-LABEL: define{{.*}} float @test_f32(float %f, float %g)
|
||||
// CHECK: call float asm "aebr $0, $2", "=f,0,f"(float %f, float %g)
|
||||
}
|
||||
|
||||
double test_f64(double f, double g) {
|
||||
asm("adbr %0, %2" : "=f" (f) : "0" (f), "f" (g));
|
||||
return f;
|
||||
// CHECK-LABEL: define double @test_f64(double %f, double %g)
|
||||
// CHECK-LABEL: define{{.*}} double @test_f64(double %f, double %g)
|
||||
// CHECK: call double asm "adbr $0, $2", "=f,0,f"(double %f, double %g)
|
||||
}
|
||||
|
||||
long double test_f128(long double f, long double g) {
|
||||
asm("axbr %0, %2" : "=f" (f) : "0" (f), "f" (g));
|
||||
return f;
|
||||
// CHECK: define void @test_f128(fp128* noalias nocapture sret(fp128) align 8 [[DEST:%.*]], fp128* nocapture readonly %0, fp128* nocapture readonly %1)
|
||||
// CHECK: define{{.*}} void @test_f128(fp128* noalias nocapture sret(fp128) align 8 [[DEST:%.*]], fp128* nocapture readonly %0, fp128* nocapture readonly %1)
|
||||
// CHECK: %f = load fp128, fp128* %0
|
||||
// CHECK: %g = load fp128, fp128* %1
|
||||
// CHECK: [[RESULT:%.*]] = tail call fp128 asm "axbr $0, $2", "=f,0,f"(fp128 %f, fp128 %g)
|
||||
@ -132,7 +132,7 @@ long double test_f128(long double f, long double g) {
|
||||
|
||||
// Test that there are no tied physreg uses. TwoAddress pass cannot deal with them.
|
||||
int test_physregs(void) {
|
||||
// CHECK-LABEL: define signext i32 @test_physregs()
|
||||
// CHECK-LABEL: define{{.*}} signext i32 @test_physregs()
|
||||
register int l __asm__("r7") = 0;
|
||||
|
||||
// CHECK: call i32 asm "lr $0, $1", "={r7},{r7}"
|
||||
|
||||
@ -20,7 +20,7 @@ volatile vector double fd, fd2;
|
||||
|
||||
volatile int cnt;
|
||||
|
||||
// CHECK-LABEL: define void @test_assign() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_assign() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: store volatile <16 x i8> [[TMP0]], <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @uc2, align 8
|
||||
@ -57,7 +57,7 @@ void test_assign(void) {
|
||||
fd = fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_pos() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_pos() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: store volatile <16 x i8> [[TMP0]], <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @uc2, align 8
|
||||
@ -94,7 +94,7 @@ void test_pos(void) {
|
||||
fd = +fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_neg() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_neg() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[SUB:%.*]] = sub <16 x i8> zeroinitializer, [[TMP0]]
|
||||
// CHECK: store volatile <16 x i8> [[SUB]], <16 x i8>* @sc, align 8
|
||||
@ -120,7 +120,7 @@ void test_neg(void) {
|
||||
fd = -fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_preinc() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_preinc() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[INC:%.*]] = add <16 x i8> [[TMP0]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
|
||||
// CHECK: store volatile <16 x i8> [[INC]], <16 x i8>* @sc2, align 8
|
||||
@ -166,7 +166,7 @@ void test_preinc(void) {
|
||||
++fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_postinc() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_postinc() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[INC:%.*]] = add <16 x i8> [[TMP0]], <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
|
||||
// CHECK: store volatile <16 x i8> [[INC]], <16 x i8>* @sc2, align 8
|
||||
@ -212,7 +212,7 @@ void test_postinc(void) {
|
||||
fd2++;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_predec() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_predec() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[DEC:%.*]] = add <16 x i8> [[TMP0]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
// CHECK: store volatile <16 x i8> [[DEC]], <16 x i8>* @sc2, align 8
|
||||
@ -258,7 +258,7 @@ void test_predec(void) {
|
||||
--fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_postdec() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_postdec() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[DEC:%.*]] = add <16 x i8> [[TMP0]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
// CHECK: store volatile <16 x i8> [[DEC]], <16 x i8>* @sc2, align 8
|
||||
@ -304,7 +304,7 @@ void test_postdec(void) {
|
||||
fd2--;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_add() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_add() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[ADD:%.*]] = add <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -439,7 +439,7 @@ void test_add(void) {
|
||||
fd = fd + fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_add_assign() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_add_assign() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[ADD:%.*]] = add <16 x i8> [[TMP1]], [[TMP0]]
|
||||
@ -534,7 +534,7 @@ void test_add_assign(void) {
|
||||
fd += fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_sub() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_sub() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[SUB:%.*]] = sub <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -669,7 +669,7 @@ void test_sub(void) {
|
||||
fd = fd - fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_sub_assign() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_sub_assign() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[SUB:%.*]] = sub <16 x i8> [[TMP1]], [[TMP0]]
|
||||
@ -764,7 +764,7 @@ void test_sub_assign(void) {
|
||||
fd -= fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_mul() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_mul() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[MUL:%.*]] = mul <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -819,7 +819,7 @@ void test_mul(void) {
|
||||
fd = fd * fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_mul_assign() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_mul_assign() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[MUL:%.*]] = mul <16 x i8> [[TMP1]], [[TMP0]]
|
||||
@ -874,7 +874,7 @@ void test_mul_assign(void) {
|
||||
fd *= fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_div() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_div() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[DIV:%.*]] = sdiv <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -929,7 +929,7 @@ void test_div(void) {
|
||||
fd = fd / fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_div_assign() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_div_assign() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[DIV:%.*]] = sdiv <16 x i8> [[TMP1]], [[TMP0]]
|
||||
@ -984,7 +984,7 @@ void test_div_assign(void) {
|
||||
fd /= fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_rem() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_rem() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[REM:%.*]] = srem <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -1033,7 +1033,7 @@ void test_rem(void) {
|
||||
ul = ul % ul2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_rem_assign() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_rem_assign() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[REM:%.*]] = srem <16 x i8> [[TMP1]], [[TMP0]]
|
||||
@ -1082,7 +1082,7 @@ void test_rem_assign(void) {
|
||||
ul %= ul2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_not() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_not() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[NEG:%.*]] = xor <16 x i8> [[TMP0]], <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
// CHECK: store volatile <16 x i8> [[NEG]], <16 x i8>* @sc, align 8
|
||||
@ -1139,7 +1139,7 @@ void test_not(void) {
|
||||
bl = ~bl2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_and() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_and() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[AND:%.*]] = and <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -1288,7 +1288,7 @@ void test_and(void) {
|
||||
bl = bl & bl2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_and_assign() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_and_assign() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[AND:%.*]] = and <16 x i8> [[TMP1]], [[TMP0]]
|
||||
@ -1397,7 +1397,7 @@ void test_and_assign(void) {
|
||||
bl &= bl2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_or() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_or() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[OR:%.*]] = or <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -1546,7 +1546,7 @@ void test_or(void) {
|
||||
bl = bl | bl2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_or_assign() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_or_assign() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[OR:%.*]] = or <16 x i8> [[TMP1]], [[TMP0]]
|
||||
@ -1655,7 +1655,7 @@ void test_or_assign(void) {
|
||||
bl |= bl2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_xor() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_xor() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[XOR:%.*]] = xor <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -1804,7 +1804,7 @@ void test_xor(void) {
|
||||
bl = bl ^ bl2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_xor_assign() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_xor_assign() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[XOR:%.*]] = xor <16 x i8> [[TMP1]], [[TMP0]]
|
||||
@ -1913,7 +1913,7 @@ void test_xor_assign(void) {
|
||||
bl ^= bl2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_sl() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_sl() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[SHL:%.*]] = shl <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -2096,7 +2096,7 @@ void test_sl(void) {
|
||||
ul = ul << 5;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_sl_assign() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_sl_assign() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[SHL:%.*]] = shl <16 x i8> [[TMP1]], [[TMP0]]
|
||||
@ -2279,7 +2279,7 @@ void test_sl_assign(void) {
|
||||
ul <<= 5;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_sr() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_sr() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[SHR:%.*]] = ashr <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -2462,7 +2462,7 @@ void test_sr(void) {
|
||||
ul = ul >> 5;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_sr_assign() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_sr_assign() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[SHR:%.*]] = ashr <16 x i8> [[TMP1]], [[TMP0]]
|
||||
@ -2646,7 +2646,7 @@ void test_sr_assign(void) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define void @test_cmpeq() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_cmpeq() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[CMP:%.*]] = icmp eq <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -2830,7 +2830,7 @@ void test_cmpeq(void) {
|
||||
bl = fd == fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_cmpne() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_cmpne() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[CMP:%.*]] = icmp ne <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -3014,7 +3014,7 @@ void test_cmpne(void) {
|
||||
bl = fd != fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_cmpge() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_cmpge() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[CMP:%.*]] = icmp sge <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -3102,7 +3102,7 @@ void test_cmpge(void) {
|
||||
bl = fd >= fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_cmpgt() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_cmpgt() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[CMP:%.*]] = icmp sgt <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -3190,7 +3190,7 @@ void test_cmpgt(void) {
|
||||
bl = fd > fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_cmple() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_cmple() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[CMP:%.*]] = icmp sle <16 x i8> [[TMP0]], [[TMP1]]
|
||||
@ -3278,7 +3278,7 @@ void test_cmple(void) {
|
||||
bl = fd <= fd2;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_cmplt() #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_cmplt() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc, align 8
|
||||
// CHECK: [[TMP1:%.*]] = load volatile <16 x i8>, <16 x i8>* @sc2, align 8
|
||||
// CHECK: [[CMP:%.*]] = icmp slt <16 x i8> [[TMP0]], [[TMP1]]
|
||||
|
||||
@ -5,176 +5,176 @@
|
||||
#include <x86intrin.h>
|
||||
|
||||
__m64 test_m_pavgusb(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pavgusb
|
||||
// GCC-LABEL: define double @test_m_pavgusb
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pavgusb
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pavgusb
|
||||
// CHECK: @llvm.x86.3dnow.pavgusb
|
||||
return _m_pavgusb(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pf2id(__m64 m) {
|
||||
// PS4-LABEL: define i64 @test_m_pf2id
|
||||
// GCC-LABEL: define double @test_m_pf2id
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pf2id
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pf2id
|
||||
// CHECK: @llvm.x86.3dnow.pf2id
|
||||
return _m_pf2id(m);
|
||||
}
|
||||
|
||||
__m64 test_m_pfacc(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfacc
|
||||
// GCC-LABEL: define double @test_m_pfacc
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfacc
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfacc
|
||||
// CHECK: @llvm.x86.3dnow.pfacc
|
||||
return _m_pfacc(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfadd(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfadd
|
||||
// GCC-LABEL: define double @test_m_pfadd
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfadd
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfadd
|
||||
// CHECK: @llvm.x86.3dnow.pfadd
|
||||
return _m_pfadd(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfcmpeq(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfcmpeq
|
||||
// GCC-LABEL: define double @test_m_pfcmpeq
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfcmpeq
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfcmpeq
|
||||
// CHECK: @llvm.x86.3dnow.pfcmpeq
|
||||
return _m_pfcmpeq(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfcmpge(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfcmpge
|
||||
// GCC-LABEL: define double @test_m_pfcmpge
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfcmpge
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfcmpge
|
||||
// CHECK: @llvm.x86.3dnow.pfcmpge
|
||||
return _m_pfcmpge(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfcmpgt(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfcmpgt
|
||||
// GCC-LABEL: define double @test_m_pfcmpgt
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfcmpgt
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfcmpgt
|
||||
// CHECK: @llvm.x86.3dnow.pfcmpgt
|
||||
return _m_pfcmpgt(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfmax(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfmax
|
||||
// GCC-LABEL: define double @test_m_pfmax
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfmax
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfmax
|
||||
// CHECK: @llvm.x86.3dnow.pfmax
|
||||
return _m_pfmax(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfmin(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfmin
|
||||
// GCC-LABEL: define double @test_m_pfmin
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfmin
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfmin
|
||||
// CHECK: @llvm.x86.3dnow.pfmin
|
||||
return _m_pfmin(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfmul(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfmul
|
||||
// GCC-LABEL: define double @test_m_pfmul
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfmul
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfmul
|
||||
// CHECK: @llvm.x86.3dnow.pfmul
|
||||
return _m_pfmul(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfrcp(__m64 m) {
|
||||
// PS4-LABEL: define i64 @test_m_pfrcp
|
||||
// GCC-LABEL: define double @test_m_pfrcp
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfrcp
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfrcp
|
||||
// CHECK: @llvm.x86.3dnow.pfrcp
|
||||
return _m_pfrcp(m);
|
||||
}
|
||||
|
||||
__m64 test_m_pfrcpit1(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfrcpit1
|
||||
// GCC-LABEL: define double @test_m_pfrcpit1
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfrcpit1
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfrcpit1
|
||||
// CHECK: @llvm.x86.3dnow.pfrcpit1
|
||||
return _m_pfrcpit1(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfrcpit2(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfrcpit2
|
||||
// GCC-LABEL: define double @test_m_pfrcpit2
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfrcpit2
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfrcpit2
|
||||
// CHECK: @llvm.x86.3dnow.pfrcpit2
|
||||
return _m_pfrcpit2(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfrsqrt(__m64 m) {
|
||||
// PS4-LABEL: define i64 @test_m_pfrsqrt
|
||||
// GCC-LABEL: define double @test_m_pfrsqrt
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfrsqrt
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfrsqrt
|
||||
// CHECK: @llvm.x86.3dnow.pfrsqrt
|
||||
return _m_pfrsqrt(m);
|
||||
}
|
||||
|
||||
__m64 test_m_pfrsqrtit1(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfrsqrtit1
|
||||
// GCC-LABEL: define double @test_m_pfrsqrtit1
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfrsqrtit1
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfrsqrtit1
|
||||
// CHECK: @llvm.x86.3dnow.pfrsqit1
|
||||
return _m_pfrsqrtit1(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfsub(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfsub
|
||||
// GCC-LABEL: define double @test_m_pfsub
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfsub
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfsub
|
||||
// CHECK: @llvm.x86.3dnow.pfsub
|
||||
return _m_pfsub(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfsubr(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfsubr
|
||||
// GCC-LABEL: define double @test_m_pfsubr
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfsubr
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfsubr
|
||||
// CHECK: @llvm.x86.3dnow.pfsubr
|
||||
return _m_pfsubr(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pi2fd(__m64 m) {
|
||||
// PS4-LABEL: define i64 @test_m_pi2fd
|
||||
// GCC-LABEL: define double @test_m_pi2fd
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pi2fd
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pi2fd
|
||||
// CHECK: @llvm.x86.3dnow.pi2fd
|
||||
return _m_pi2fd(m);
|
||||
}
|
||||
|
||||
__m64 test_m_pmulhrw(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pmulhrw
|
||||
// GCC-LABEL: define double @test_m_pmulhrw
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pmulhrw
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pmulhrw
|
||||
// CHECK: @llvm.x86.3dnow.pmulhrw
|
||||
return _m_pmulhrw(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pf2iw(__m64 m) {
|
||||
// PS4-LABEL: define i64 @test_m_pf2iw
|
||||
// GCC-LABEL: define double @test_m_pf2iw
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pf2iw
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pf2iw
|
||||
// CHECK: @llvm.x86.3dnowa.pf2iw
|
||||
return _m_pf2iw(m);
|
||||
}
|
||||
|
||||
__m64 test_m_pfnacc(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfnacc
|
||||
// GCC-LABEL: define double @test_m_pfnacc
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfnacc
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfnacc
|
||||
// CHECK: @llvm.x86.3dnowa.pfnacc
|
||||
return _m_pfnacc(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pfpnacc(__m64 m1, __m64 m2) {
|
||||
// PS4-LABEL: define i64 @test_m_pfpnacc
|
||||
// GCC-LABEL: define double @test_m_pfpnacc
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pfpnacc
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pfpnacc
|
||||
// CHECK: @llvm.x86.3dnowa.pfpnacc
|
||||
return _m_pfpnacc(m1, m2);
|
||||
}
|
||||
|
||||
__m64 test_m_pi2fw(__m64 m) {
|
||||
// PS4-LABEL: define i64 @test_m_pi2fw
|
||||
// GCC-LABEL: define double @test_m_pi2fw
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pi2fw
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pi2fw
|
||||
// CHECK: @llvm.x86.3dnowa.pi2fw
|
||||
return _m_pi2fw(m);
|
||||
}
|
||||
|
||||
__m64 test_m_pswapdsf(__m64 m) {
|
||||
// PS4-LABEL: define i64 @test_m_pswapdsf
|
||||
// GCC-LABEL: define double @test_m_pswapdsf
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pswapdsf
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pswapdsf
|
||||
// CHECK: @llvm.x86.3dnowa.pswapd
|
||||
return _m_pswapdsf(m);
|
||||
}
|
||||
|
||||
__m64 test_m_pswapdsi(__m64 m) {
|
||||
// PS4-LABEL: define i64 @test_m_pswapdsi
|
||||
// GCC-LABEL: define double @test_m_pswapdsi
|
||||
// PS4-LABEL: define{{.*}} i64 @test_m_pswapdsi
|
||||
// GCC-LABEL: define{{.*}} double @test_m_pswapdsi
|
||||
// CHECK: @llvm.x86.3dnowa.pswapd
|
||||
return _m_pswapdsi(m);
|
||||
}
|
||||
|
||||
@ -25,7 +25,7 @@ extern void foo1(union M256 A);
|
||||
extern void foo2(union M512 A);
|
||||
union M256 m1;
|
||||
union M512 m2;
|
||||
// CHECK-LABEL: define void @test()
|
||||
// CHECK-LABEL: define{{.*}} void @test()
|
||||
// CHECK: call void @foo1(<4 x double>
|
||||
// CHECK-LEGACY: call void @foo1(%union.M256* byval(%union.M256) align 32
|
||||
// AVX: call void @foo2(%union.M512* byval(%union.M512) align 64
|
||||
|
||||
@ -5,12 +5,12 @@
|
||||
|
||||
void test_m_prefetch(void *p) {
|
||||
return _m_prefetch(p);
|
||||
// CHECK-LABEL: define void @test_m_prefetch
|
||||
// CHECK-LABEL: define{{.*}} void @test_m_prefetch
|
||||
// CHECK: call void @llvm.prefetch.p0i8({{.*}}, i32 0, i32 3, i32 1)
|
||||
}
|
||||
|
||||
void test_m_prefetch_w(void *p) {
|
||||
return _m_prefetchw(p);
|
||||
// CHECK-LABEL: define void @test_m_prefetch_w
|
||||
// CHECK-LABEL: define{{.*}} void @test_m_prefetch_w
|
||||
// CHECK: call void @llvm.prefetch.p0i8({{.*}}, i32 1, i32 3, i32 1)
|
||||
}
|
||||
|
||||
@ -4,38 +4,38 @@ typedef long long __m128i __attribute__ ((vector_size (16)));
|
||||
typedef long long __m256i __attribute__ ((vector_size (32)));
|
||||
typedef long long __m512i __attribute__ ((vector_size (64)));
|
||||
|
||||
// CHECK: define <2 x i64> @testXMMout(<2 x i64>* %p) #0
|
||||
// CHECK: define{{.*}} <2 x i64> @testXMMout(<2 x i64>* %p) #0
|
||||
__m128i testXMMout(__m128i *p) {
|
||||
__m128i xmm0;
|
||||
__asm__("vmovdqu %1, %0" :"=v"(xmm0) : "m"(*(__m128i*)p));
|
||||
return xmm0;
|
||||
}
|
||||
|
||||
// CHECK: define <4 x i64> @testYMMout(<4 x i64>* %p) #1
|
||||
// CHECK: define{{.*}} <4 x i64> @testYMMout(<4 x i64>* %p) #1
|
||||
__m256i testYMMout(__m256i *p) {
|
||||
__m256i ymm0;
|
||||
__asm__("vmovdqu %1, %0" :"=v"(ymm0) : "m"(*(__m256i*)p));
|
||||
return ymm0;
|
||||
}
|
||||
|
||||
// CHECK: define <8 x i64> @testZMMout(<8 x i64>* %p) #2
|
||||
// CHECK: define{{.*}} <8 x i64> @testZMMout(<8 x i64>* %p) #2
|
||||
__m512i testZMMout(__m512i *p) {
|
||||
__m512i zmm0;
|
||||
__asm__("vmovdqu64 %1, %0" :"=v"(zmm0) : "m"(*(__m512i*)p));
|
||||
return zmm0;
|
||||
}
|
||||
|
||||
// CHECK: define void @testXMMin(<2 x i64> %xmm0, <2 x i64>* %p) #0
|
||||
// CHECK: define{{.*}} void @testXMMin(<2 x i64> %xmm0, <2 x i64>* %p) #0
|
||||
void testXMMin(__m128i xmm0, __m128i *p) {
|
||||
__asm__("vmovdqu %0, %1" : : "v"(xmm0), "m"(*(__m128i*)p));
|
||||
}
|
||||
|
||||
// CHECK: define void @testYMMin(<4 x i64> %ymm0, <4 x i64>* %p) #1
|
||||
// CHECK: define{{.*}} void @testYMMin(<4 x i64> %ymm0, <4 x i64>* %p) #1
|
||||
void testYMMin(__m256i ymm0, __m256i *p) {
|
||||
__asm__("vmovdqu %0, %1" : : "v"(ymm0), "m"(*(__m256i*)p));
|
||||
}
|
||||
|
||||
// CHECK: define void @testZMMin(<8 x i64> %zmm0, <8 x i64>* %p) #2
|
||||
// CHECK: define{{.*}} void @testZMMin(<8 x i64> %zmm0, <8 x i64>* %p) #2
|
||||
void testZMMin(__m512i zmm0, __m512i *p) {
|
||||
__asm__("vmovdqu64 %0, %1" : : "v"(zmm0), "m"(*(__m512i*)p));
|
||||
}
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
// RUN: %clang_cc1 -triple i386-unknown-unknown -mregparm 3 -emit-llvm %s -o - | FileCheck %s -check-prefix=HARD
|
||||
// RUN: %clang_cc1 -triple i386-unknown-unknown -mregparm 3 -mfloat-abi soft -emit-llvm %s -o - | FileCheck %s -check-prefix=SOFT
|
||||
|
||||
// HARD: define void @f1(float %a)
|
||||
// SOFT: define void @f1(float inreg %a)
|
||||
// HARD: define{{.*}} void @f1(float %a)
|
||||
// SOFT: define{{.*}} void @f1(float inreg %a)
|
||||
void f1(float a) {}
|
||||
|
||||
@ -1,18 +1,18 @@
|
||||
// RUN: %clang_cc1 -w -triple i386-pc-elfiamcu -mfloat-abi soft -emit-llvm -o - %s | FileCheck %s
|
||||
|
||||
// CHECK-LABEL: define void @ints(i32 %a, i32 %b, i32 %c, i32 %d)
|
||||
// CHECK-LABEL: define{{.*}} void @ints(i32 %a, i32 %b, i32 %c, i32 %d)
|
||||
void ints(int a, int b, int c, int d) {}
|
||||
|
||||
// CHECK-LABEL: define void @floats(float %a, float %b, float %c, float %d)
|
||||
// CHECK-LABEL: define{{.*}} void @floats(float %a, float %b, float %c, float %d)
|
||||
void floats(float a, float b, float c, float d) {}
|
||||
|
||||
// CHECK-LABEL: define void @mixed(i32 %a, float %b, i32 %c, float %d)
|
||||
// CHECK-LABEL: define{{.*}} void @mixed(i32 %a, float %b, i32 %c, float %d)
|
||||
void mixed(int a, float b, int c, float d) {}
|
||||
|
||||
// CHECK-LABEL: define void @doubles(double %d1, double %d2)
|
||||
// CHECK-LABEL: define{{.*}} void @doubles(double %d1, double %d2)
|
||||
void doubles(double d1, double d2) {}
|
||||
|
||||
// CHECK-LABEL: define void @mixedDoubles(i32 %a, double %d1)
|
||||
// CHECK-LABEL: define{{.*}} void @mixedDoubles(i32 %a, double %d1)
|
||||
void mixedDoubles(int a, double d1) {}
|
||||
|
||||
typedef struct st3_t {
|
||||
@ -34,36 +34,36 @@ typedef struct st12_t {
|
||||
int c;
|
||||
} st12_t;
|
||||
|
||||
// CHECK-LABEL: define void @smallStructs(i32 %st1.coerce, i32 %st2.coerce, i32 %st3.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @smallStructs(i32 %st1.coerce, i32 %st2.coerce, i32 %st3.coerce)
|
||||
void smallStructs(st4_t st1, st4_t st2, st4_t st3) {}
|
||||
|
||||
// CHECK-LABEL: define void @paddedStruct(i32 %i1, i32 %st.coerce0, i32 %st.coerce1, i32 %st4.0)
|
||||
// CHECK-LABEL: define{{.*}} void @paddedStruct(i32 %i1, i32 %st.coerce0, i32 %st.coerce1, i32 %st4.0)
|
||||
void paddedStruct(int i1, st5_t st, st4_t st4) {}
|
||||
|
||||
// CHECK-LABEL: define void @largeStructBegin(%struct.st12_t* byval(%struct.st12_t) align 4 %st)
|
||||
// CHECK-LABEL: define{{.*}} void @largeStructBegin(%struct.st12_t* byval(%struct.st12_t) align 4 %st)
|
||||
void largeStructBegin(st12_t st) {}
|
||||
|
||||
// CHECK-LABEL: define void @largeStructMiddle(i32 %i1, %struct.st12_t* byval(%struct.st12_t) align 4 %st, i32 %i2, i32 %i3)
|
||||
// CHECK-LABEL: define{{.*}} void @largeStructMiddle(i32 %i1, %struct.st12_t* byval(%struct.st12_t) align 4 %st, i32 %i2, i32 %i3)
|
||||
void largeStructMiddle(int i1, st12_t st, int i2, int i3) {}
|
||||
|
||||
// CHECK-LABEL: define void @largeStructEnd(i32 %i1, i32 %i2, i32 %i3, i32 %st.0, i32 %st.1, i32 %st.2)
|
||||
// CHECK-LABEL: define{{.*}} void @largeStructEnd(i32 %i1, i32 %i2, i32 %i3, i32 %st.0, i32 %st.1, i32 %st.2)
|
||||
void largeStructEnd(int i1, int i2, int i3, st12_t st) {}
|
||||
|
||||
// CHECK-LABEL: define i24 @retNonPow2Struct(i32 %r.coerce)
|
||||
// CHECK-LABEL: define{{.*}} i24 @retNonPow2Struct(i32 %r.coerce)
|
||||
st3_t retNonPow2Struct(st3_t r) { return r; }
|
||||
|
||||
// CHECK-LABEL: define i32 @retSmallStruct(i32 %r.coerce)
|
||||
// CHECK-LABEL: define{{.*}} i32 @retSmallStruct(i32 %r.coerce)
|
||||
st4_t retSmallStruct(st4_t r) { return r; }
|
||||
|
||||
// CHECK-LABEL: define i64 @retPaddedStruct(i32 %r.coerce0, i32 %r.coerce1)
|
||||
// CHECK-LABEL: define{{.*}} i64 @retPaddedStruct(i32 %r.coerce0, i32 %r.coerce1)
|
||||
st5_t retPaddedStruct(st5_t r) { return r; }
|
||||
|
||||
// CHECK-LABEL: define void @retLargeStruct(%struct.st12_t* noalias sret(%struct.st12_t) align 4 %agg.result, i32 %i1, %struct.st12_t* byval(%struct.st12_t) align 4 %r)
|
||||
// CHECK-LABEL: define{{.*}} void @retLargeStruct(%struct.st12_t* noalias sret(%struct.st12_t) align 4 %agg.result, i32 %i1, %struct.st12_t* byval(%struct.st12_t) align 4 %r)
|
||||
st12_t retLargeStruct(int i1, st12_t r) { return r; }
|
||||
|
||||
// CHECK-LABEL: define i32 @varArgs(i32 %i1, ...)
|
||||
// CHECK-LABEL: define{{.*}} i32 @varArgs(i32 %i1, ...)
|
||||
int varArgs(int i1, ...) { return i1; }
|
||||
|
||||
// CHECK-LABEL: define double @longDoubleArg(double %ld1)
|
||||
// CHECK-LABEL: define{{.*}} double @longDoubleArg(double %ld1)
|
||||
long double longDoubleArg(long double ld1) { return ld1; }
|
||||
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
// RUN: %clang_cc1 -w -fblocks -triple i386-pc-linux-gnu -target-cpu pentium4 -emit-llvm -o %t %s
|
||||
// RUN: FileCheck < %t %s
|
||||
|
||||
// CHECK-LABEL: define void @f56(
|
||||
// CHECK-LABEL: define{{.*}} void @f56(
|
||||
// CHECK: i8 signext %a0, %struct.s56_0* byval(%struct.s56_0) align 4 %a1,
|
||||
// CHECK: i64 %a2.coerce, %struct.s56_1* byval(%struct.s56_1) align 4 %0,
|
||||
// CHECK: <1 x double> %a4, %struct.s56_2* byval(%struct.s56_2) align 4 %1,
|
||||
|
||||
@ -3,9 +3,9 @@
|
||||
// no-mmx should put mmx into memory
|
||||
typedef int __attribute__((vector_size (8))) i32v2;
|
||||
int a(i32v2 x) { return x[0]; }
|
||||
// CHECK-LABEL: define i32 @a(i64 %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} i32 @a(i64 %x.coerce)
|
||||
|
||||
// but SSE2 vectors should still go into an SSE2 register
|
||||
typedef int __attribute__((vector_size (16))) i32v4;
|
||||
int b(i32v4 x) { return x[0]; }
|
||||
// CHECK-LABEL: define i32 @b(<4 x i32> %x)
|
||||
// CHECK-LABEL: define{{.*}} i32 @b(<4 x i32> %x)
|
||||
|
||||
@ -15,27 +15,27 @@ struct PP_Var {
|
||||
union PP_VarValue value;
|
||||
};
|
||||
|
||||
// CHECK: define { i64, i64 } @f0()
|
||||
// CHECK: define{{.*}} { i64, i64 } @f0()
|
||||
struct PP_Var f0() {
|
||||
struct PP_Var result = { 0, 0, 0 };
|
||||
return result;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @f1(i64 %p1.coerce0, i64 %p1.coerce1)
|
||||
// CHECK-LABEL: define{{.*}} void @f1(i64 %p1.coerce0, i64 %p1.coerce1)
|
||||
void f1(struct PP_Var p1) { while(1) {} }
|
||||
|
||||
// long doubles are 64 bits on NaCl
|
||||
// CHECK-LABEL: define double @f5()
|
||||
// CHECK-LABEL: define{{.*}} double @f5()
|
||||
long double f5(void) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
|
||||
// CHECK-LABEL: define{{.*}} void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
|
||||
void f6(char a0, short a1, int a2, long long a3, void *a4) {
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @f8_1()
|
||||
// CHECK-LABEL: define void @f8_2(i64 %a0.coerce)
|
||||
// CHECK-LABEL: define{{.*}} i64 @f8_1()
|
||||
// CHECK-LABEL: define{{.*}} void @f8_2(i64 %a0.coerce)
|
||||
union u8 {
|
||||
long double a;
|
||||
int b;
|
||||
@ -43,32 +43,32 @@ union u8 {
|
||||
union u8 f8_1() { while (1) {} }
|
||||
void f8_2(union u8 a0) {}
|
||||
|
||||
// CHECK-LABEL: define i64 @f9()
|
||||
// CHECK-LABEL: define{{.*}} i64 @f9()
|
||||
struct s9 { int a; int b; int : 0; } f9(void) { while (1) {} }
|
||||
|
||||
// CHECK-LABEL: define void @f10(i64 %a0.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f10(i64 %a0.coerce)
|
||||
struct s10 { int a; int b; int : 0; };
|
||||
void f10(struct s10 a0) {}
|
||||
|
||||
// CHECK-LABEL: define double @f11()
|
||||
// CHECK-LABEL: define{{.*}} double @f11()
|
||||
union { long double a; float b; } f11() { while (1) {} }
|
||||
|
||||
// CHECK-LABEL: define i32 @f12_0()
|
||||
// CHECK-LABEL: define void @f12_1(i32 %a0.coerce)
|
||||
// CHECK-LABEL: define{{.*}} i32 @f12_0()
|
||||
// CHECK-LABEL: define{{.*}} void @f12_1(i32 %a0.coerce)
|
||||
struct s12 { int a __attribute__((aligned(16))); };
|
||||
struct s12 f12_0(void) { while (1) {} }
|
||||
void f12_1(struct s12 a0) {}
|
||||
|
||||
// Check that sret parameter is accounted for when checking available integer
|
||||
// registers.
|
||||
// CHECK: define void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f)
|
||||
// CHECK: define{{.*}} void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f)
|
||||
|
||||
struct s13_0 { long long f0[3]; };
|
||||
struct s13_1 { long long f0[2]; };
|
||||
struct s13_0 f13(int a, int b, int c, int d,
|
||||
struct s13_1 e, int f) { while (1) {} }
|
||||
|
||||
// CHECK-LABEL: define void @f20(%struct.s20* byval(%struct.s20) align 32 %x)
|
||||
// CHECK-LABEL: define{{.*}} void @f20(%struct.s20* byval(%struct.s20) align 32 %x)
|
||||
struct __attribute__((aligned(32))) s20 {
|
||||
int x;
|
||||
int y;
|
||||
|
||||
@ -6,49 +6,49 @@
|
||||
// RUN: FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX512
|
||||
#include <stdarg.h>
|
||||
|
||||
// CHECK-LABEL: define signext i8 @f0()
|
||||
// CHECK-LABEL: define{{.*}} signext i8 @f0()
|
||||
char f0(void) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define signext i16 @f1()
|
||||
// CHECK-LABEL: define{{.*}} signext i16 @f1()
|
||||
short f1(void) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @f2()
|
||||
// CHECK-LABEL: define{{.*}} i32 @f2()
|
||||
int f2(void) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define float @f3()
|
||||
// CHECK-LABEL: define{{.*}} float @f3()
|
||||
float f3(void) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define double @f4()
|
||||
// CHECK-LABEL: define{{.*}} double @f4()
|
||||
double f4(void) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define x86_fp80 @f5()
|
||||
// CHECK-LABEL: define{{.*}} x86_fp80 @f5()
|
||||
long double f5(void) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
|
||||
// CHECK-LABEL: define{{.*}} void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
|
||||
void f6(char a0, short a1, int a2, long long a3, void *a4) {
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @f7(i32 %a0)
|
||||
// CHECK-LABEL: define{{.*}} void @f7(i32 %a0)
|
||||
typedef enum { A, B, C } e7;
|
||||
void f7(e7 a0) {
|
||||
}
|
||||
|
||||
// Test merging/passing of upper eightbyte with X87 class.
|
||||
//
|
||||
// CHECK-LABEL: define void @f8_1(%union.u8* noalias sret(%union.u8) align 16 %agg.result)
|
||||
// CHECK-LABEL: define void @f8_2(%union.u8* byval(%union.u8) align 16 %a0)
|
||||
// CHECK-LABEL: define{{.*}} void @f8_1(%union.u8* noalias sret(%union.u8) align 16 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @f8_2(%union.u8* byval(%union.u8) align 16 %a0)
|
||||
union u8 {
|
||||
long double a;
|
||||
int b;
|
||||
@ -56,61 +56,61 @@ union u8 {
|
||||
union u8 f8_1() { while (1) {} }
|
||||
void f8_2(union u8 a0) {}
|
||||
|
||||
// CHECK-LABEL: define i64 @f9()
|
||||
// CHECK-LABEL: define{{.*}} i64 @f9()
|
||||
struct s9 { int a; int b; int : 0; } f9(void) { while (1) {} }
|
||||
|
||||
// CHECK-LABEL: define void @f10(i64 %a0.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f10(i64 %a0.coerce)
|
||||
struct s10 { int a; int b; int : 0; };
|
||||
void f10(struct s10 a0) {}
|
||||
|
||||
// CHECK-LABEL: define void @f11(%union.anon* noalias sret(%union.anon) align 16 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @f11(%union.anon* noalias sret(%union.anon) align 16 %agg.result)
|
||||
union { long double a; float b; } f11() { while (1) {} }
|
||||
|
||||
// CHECK-LABEL: define i32 @f12_0()
|
||||
// CHECK-LABEL: define void @f12_1(i32 %a0.coerce)
|
||||
// CHECK-LABEL: define{{.*}} i32 @f12_0()
|
||||
// CHECK-LABEL: define{{.*}} void @f12_1(i32 %a0.coerce)
|
||||
struct s12 { int a __attribute__((aligned(16))); };
|
||||
struct s12 f12_0(void) { while (1) {} }
|
||||
void f12_1(struct s12 a0) {}
|
||||
|
||||
// Check that sret parameter is accounted for when checking available integer
|
||||
// registers.
|
||||
// CHECK: define void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f)
|
||||
// CHECK: define{{.*}} void @f13(%struct.s13_0* noalias sret(%struct.s13_0) align 8 %agg.result, i32 %a, i32 %b, i32 %c, i32 %d, {{.*}}* byval({{.*}}) align 8 %e, i32 %f)
|
||||
|
||||
struct s13_0 { long long f0[3]; };
|
||||
struct s13_1 { long long f0[2]; };
|
||||
struct s13_0 f13(int a, int b, int c, int d,
|
||||
struct s13_1 e, int f) { while (1) {} }
|
||||
|
||||
// CHECK: define void @f14({{.*}}, i8 signext %X)
|
||||
// CHECK: define{{.*}} void @f14({{.*}}, i8 signext %X)
|
||||
void f14(int a, int b, int c, int d, int e, int f, char X) {}
|
||||
|
||||
// CHECK: define void @f15({{.*}}, i8* %X)
|
||||
// CHECK: define{{.*}} void @f15({{.*}}, i8* %X)
|
||||
void f15(int a, int b, int c, int d, int e, int f, void *X) {}
|
||||
|
||||
// CHECK: define void @f16({{.*}}, float %X)
|
||||
// CHECK: define{{.*}} void @f16({{.*}}, float %X)
|
||||
void f16(float a, float b, float c, float d, float e, float f, float g, float h,
|
||||
float X) {}
|
||||
|
||||
// CHECK: define void @f17({{.*}}, x86_fp80 %X)
|
||||
// CHECK: define{{.*}} void @f17({{.*}}, x86_fp80 %X)
|
||||
void f17(float a, float b, float c, float d, float e, float f, float g, float h,
|
||||
long double X) {}
|
||||
|
||||
// Check for valid coercion. The struct should be passed/returned as i32, not
|
||||
// as i64 for better code quality.
|
||||
// rdar://8135035
|
||||
// CHECK-LABEL: define void @f18(i32 %a, i32 %f18_arg1.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @f18(i32 %a, i32 %f18_arg1.coerce)
|
||||
struct f18_s0 { int f0; };
|
||||
void f18(int a, struct f18_s0 f18_arg1) { while (1) {} }
|
||||
|
||||
// Check byval alignment.
|
||||
|
||||
// CHECK-LABEL: define void @f19(%struct.s19* byval(%struct.s19) align 16 %x)
|
||||
// CHECK-LABEL: define{{.*}} void @f19(%struct.s19* byval(%struct.s19) align 16 %x)
|
||||
struct s19 {
|
||||
long double a;
|
||||
};
|
||||
void f19(struct s19 x) {}
|
||||
|
||||
// CHECK-LABEL: define void @f20(%struct.s20* byval(%struct.s20) align 32 %x)
|
||||
// CHECK-LABEL: define{{.*}} void @f20(%struct.s20* byval(%struct.s20) align 32 %x)
|
||||
struct __attribute__((aligned(32))) s20 {
|
||||
int x;
|
||||
int y;
|
||||
@ -123,7 +123,7 @@ struct StringRef {
|
||||
};
|
||||
|
||||
// rdar://7375902
|
||||
// CHECK-LABEL: define i8* @f21(i64 %S.coerce0, i8* %S.coerce1)
|
||||
// CHECK-LABEL: define{{.*}} i8* @f21(i64 %S.coerce0, i8* %S.coerce1)
|
||||
const char *f21(struct StringRef S) { return S.x+S.Ptr; }
|
||||
|
||||
// PR7567
|
||||
@ -144,7 +144,7 @@ struct f23S {
|
||||
|
||||
|
||||
void f23(int A, struct f23S B) {
|
||||
// CHECK-LABEL: define void @f23(i32 %A, i64 %B.coerce0, i32 %B.coerce1)
|
||||
// CHECK-LABEL: define{{.*}} void @f23(i32 %A, i64 %B.coerce0, i32 %B.coerce1)
|
||||
}
|
||||
|
||||
struct f24s { long a; int b; };
|
||||
@ -152,13 +152,13 @@ struct f24s { long a; int b; };
|
||||
struct f23S f24(struct f23S *X, struct f24s *P2) {
|
||||
return *X;
|
||||
|
||||
// CHECK: define { i64, i32 } @f24(%struct.f23S* %X, %struct.f24s* %P2)
|
||||
// CHECK: define{{.*}} { i64, i32 } @f24(%struct.f23S* %X, %struct.f24s* %P2)
|
||||
}
|
||||
|
||||
// rdar://8248065
|
||||
typedef float v4f32 __attribute__((__vector_size__(16)));
|
||||
v4f32 f25(v4f32 X) {
|
||||
// CHECK-LABEL: define <4 x float> @f25(<4 x float> %X)
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @f25(<4 x float> %X)
|
||||
// CHECK-NOT: alloca
|
||||
// CHECK: alloca <4 x float>
|
||||
// CHECK-NOT: alloca
|
||||
@ -174,7 +174,7 @@ struct foo26 {
|
||||
};
|
||||
|
||||
struct foo26 f26(struct foo26 *P) {
|
||||
// CHECK: define { i32*, float* } @f26(%struct.foo26* %P)
|
||||
// CHECK: define{{.*}} { i32*, float* } @f26(%struct.foo26* %P)
|
||||
return *P;
|
||||
}
|
||||
|
||||
@ -184,7 +184,7 @@ struct v4f32wrapper {
|
||||
};
|
||||
|
||||
struct v4f32wrapper f27(struct v4f32wrapper X) {
|
||||
// CHECK-LABEL: define <4 x float> @f27(<4 x float> %X.coerce)
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @f27(<4 x float> %X.coerce)
|
||||
return X;
|
||||
}
|
||||
|
||||
@ -197,7 +197,7 @@ struct v8f32wrapper {
|
||||
};
|
||||
|
||||
struct v8f32wrapper f27a(struct v8f32wrapper X) {
|
||||
// AVX-LABEL: define <8 x float> @f27a(<8 x float> %X.coerce)
|
||||
// AVX-LABEL: define{{.*}} <8 x float> @f27a(<8 x float> %X.coerce)
|
||||
return X;
|
||||
}
|
||||
|
||||
@ -206,7 +206,7 @@ struct v8f32wrapper_wrapper {
|
||||
};
|
||||
|
||||
struct v8f32wrapper_wrapper f27b(struct v8f32wrapper_wrapper X) {
|
||||
// AVX-LABEL: define <8 x float> @f27b(<8 x float> %X.coerce)
|
||||
// AVX-LABEL: define{{.*}} <8 x float> @f27b(<8 x float> %X.coerce)
|
||||
return X;
|
||||
}
|
||||
|
||||
@ -216,7 +216,7 @@ struct f28c {
|
||||
int y;
|
||||
};
|
||||
void f28(struct f28c C) {
|
||||
// CHECK-LABEL: define void @f28(double %C.coerce0, i32 %C.coerce1)
|
||||
// CHECK-LABEL: define{{.*}} void @f28(double %C.coerce0, i32 %C.coerce1)
|
||||
}
|
||||
|
||||
struct f29a {
|
||||
@ -227,26 +227,26 @@ struct f29a {
|
||||
};
|
||||
|
||||
void f29a(struct f29a A) {
|
||||
// CHECK-LABEL: define void @f29a(double %A.coerce0, i32 %A.coerce1)
|
||||
// CHECK-LABEL: define{{.*}} void @f29a(double %A.coerce0, i32 %A.coerce1)
|
||||
}
|
||||
|
||||
// rdar://8249586
|
||||
struct S0 { char f0[8]; char f2; char f3; char f4; };
|
||||
void f30(struct S0 p_4) {
|
||||
// CHECK-LABEL: define void @f30(i64 %p_4.coerce0, i24 %p_4.coerce1)
|
||||
// CHECK-LABEL: define{{.*}} void @f30(i64 %p_4.coerce0, i24 %p_4.coerce1)
|
||||
}
|
||||
|
||||
// Pass the third element as a float when followed by tail padding.
|
||||
// rdar://8251384
|
||||
struct f31foo { float a, b, c; };
|
||||
float f31(struct f31foo X) {
|
||||
// CHECK-LABEL: define float @f31(<2 x float> %X.coerce0, float %X.coerce1)
|
||||
// CHECK-LABEL: define{{.*}} float @f31(<2 x float> %X.coerce0, float %X.coerce1)
|
||||
return X.c;
|
||||
}
|
||||
|
||||
_Complex float f32(_Complex float A, _Complex float B) {
|
||||
// rdar://6379669
|
||||
// CHECK-LABEL: define <2 x float> @f32(<2 x float> %A.coerce, <2 x float> %B.coerce)
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @f32(<2 x float> %A.coerce, <2 x float> %B.coerce)
|
||||
return A+B;
|
||||
}
|
||||
|
||||
@ -261,12 +261,12 @@ void f33(va_list X) {
|
||||
typedef unsigned long long v1i64 __attribute__((__vector_size__(8)));
|
||||
|
||||
// rdar://8359248
|
||||
// CHECK-LABEL: define double @f34(double %arg.coerce)
|
||||
// CHECK-LABEL: define{{.*}} double @f34(double %arg.coerce)
|
||||
v1i64 f34(v1i64 arg) { return arg; }
|
||||
|
||||
|
||||
// rdar://8358475
|
||||
// CHECK-LABEL: define double @f35(double %arg.coerce)
|
||||
// CHECK-LABEL: define{{.*}} double @f35(double %arg.coerce)
|
||||
typedef unsigned long v1i64_2 __attribute__((__vector_size__(8)));
|
||||
v1i64_2 f35(v1i64_2 arg) { return arg+arg; }
|
||||
|
||||
@ -286,7 +286,7 @@ void f9122143()
|
||||
func(ss);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define double @f36(double %arg.coerce)
|
||||
// CHECK-LABEL: define{{.*}} double @f36(double %arg.coerce)
|
||||
typedef unsigned v2i32 __attribute((__vector_size__(8)));
|
||||
v2i32 f36(v2i32 arg) { return arg; }
|
||||
|
||||
@ -334,7 +334,7 @@ void func43(SA s) {
|
||||
func42(s);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @f44
|
||||
// CHECK-LABEL: define{{.*}} i32 @f44
|
||||
// CHECK: ptrtoint
|
||||
// CHECK-NEXT: add i64 %{{[0-9]+}}, 31
|
||||
// CHECK-NEXT: and i64 %{{[0-9]+}}, -32
|
||||
@ -350,7 +350,7 @@ int f44(int i, ...) {
|
||||
}
|
||||
|
||||
// Text that vec3 returns the correct LLVM IR type.
|
||||
// AVX-LABEL: define i32 @foo(<3 x i64> %X)
|
||||
// AVX-LABEL: define{{.*}} i32 @foo(<3 x i64> %X)
|
||||
typedef long long3 __attribute((ext_vector_type(3)));
|
||||
int foo(long3 X)
|
||||
{
|
||||
@ -406,7 +406,7 @@ void test49_helper(double, ...);
|
||||
void test49(double d, double e) {
|
||||
test49_helper(d, e);
|
||||
}
|
||||
// CHECK-LABEL: define void @test49(
|
||||
// CHECK-LABEL: define{{.*}} void @test49(
|
||||
// CHECK: [[T0:%.*]] = load double, double*
|
||||
// CHECK-NEXT: [[T1:%.*]] = load double, double*
|
||||
// CHECK-NEXT: call void (double, ...) @test49_helper(double [[T0]], double [[T1]])
|
||||
@ -415,7 +415,7 @@ void test50_helper();
|
||||
void test50(double d, double e) {
|
||||
test50_helper(d, e);
|
||||
}
|
||||
// CHECK-LABEL: define void @test50(
|
||||
// CHECK-LABEL: define{{.*}} void @test50(
|
||||
// CHECK: [[T0:%.*]] = load double, double*
|
||||
// CHECK-NEXT: [[T1:%.*]] = load double, double*
|
||||
// CHECK-NEXT: call void (double, double, ...) bitcast (void (...)* @test50_helper to void (double, double, ...)*)(double [[T0]], double [[T1]])
|
||||
@ -425,7 +425,7 @@ void test51(struct test51_s *s, __builtin_va_list argList) {
|
||||
*s = __builtin_va_arg(argList, struct test51_s);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test51
|
||||
// CHECK-LABEL: define{{.*}} void @test51
|
||||
// CHECK: [[TMP_ADDR:%.*]] = alloca [[STRUCT_TEST51:%.*]], align 16
|
||||
// CHECK: br i1
|
||||
// CHECK: [[REG_SAVE_AREA_PTR:%.*]] = getelementptr inbounds {{.*}}, i32 0, i32 3
|
||||
@ -449,7 +449,7 @@ void test52() {
|
||||
void test53(__m256 *m, __builtin_va_list argList) {
|
||||
*m = __builtin_va_arg(argList, __m256);
|
||||
}
|
||||
// AVX-LABEL: define void @test53
|
||||
// AVX-LABEL: define{{.*}} void @test53
|
||||
// AVX-NOT: br i1
|
||||
// AVX: ret void
|
||||
|
||||
@ -521,7 +521,7 @@ void f62() {
|
||||
// Like for __m256 on AVX, we always pass __m512 in memory, and don't
|
||||
// need to use the register save area.
|
||||
//
|
||||
// AVX512-LABEL: define void @f63
|
||||
// AVX512-LABEL: define{{.*}} void @f63
|
||||
// AVX512-NOT: br i1
|
||||
// AVX512: ret void
|
||||
void f63(__m512 *m, __builtin_va_list argList) {
|
||||
|
||||
@ -11,7 +11,7 @@ double Vec3FTest(__builtin_va_list ap) {
|
||||
vec3f vec = __builtin_va_arg(ap, vec3f);
|
||||
return vec.x + vec.y + vec.z;
|
||||
}
|
||||
// CHECK: define double @Vec3FTest
|
||||
// CHECK: define{{.*}} double @Vec3FTest
|
||||
// CHECK: vaarg.in_reg:
|
||||
// CHECK: [[Vec3FLoad1:%.*]] = load <2 x float>, <2 x float>*
|
||||
// CHECK: [[Vec3FGEP1:%.*]] = getelementptr inbounds { <2 x float>, float }, { <2 x float>, float }* {{%.*}}, i32 0, i32 0
|
||||
@ -28,7 +28,7 @@ double Vec4FTest(__builtin_va_list ap) {
|
||||
vec4f vec = __builtin_va_arg(ap, vec4f);
|
||||
return vec.x + vec.y + vec.z + vec.q;
|
||||
}
|
||||
// CHECK: define double @Vec4FTest
|
||||
// CHECK: define{{.*}} double @Vec4FTest
|
||||
// CHECK: vaarg.in_reg:
|
||||
// CHECK: [[Vec4FLoad1:%.*]] = load <2 x float>, <2 x float>*
|
||||
// CHECK: [[Vec4FGEP1:%.*]] = getelementptr inbounds { <2 x float>, <2 x float> }, { <2 x float>, <2 x float> }* {{%.*}}, i32 0, i32 0
|
||||
@ -44,7 +44,7 @@ double Vec2DTest(__builtin_va_list ap) {
|
||||
vec2d vec = __builtin_va_arg(ap, vec2d);
|
||||
return vec.x + vec.y;
|
||||
}
|
||||
// CHECK: define double @Vec2DTest
|
||||
// CHECK: define{{.*}} double @Vec2DTest
|
||||
// CHECK: vaarg.in_reg:
|
||||
// CHECK: [[Vec2DLoad1:%.*]] = load double, double*
|
||||
// CHECK: [[Vec2DGEP1:%.*]] = getelementptr inbounds { double, double }, { double, double }* {{%.*}}, i32 0, i32 0
|
||||
@ -63,7 +63,7 @@ double Vec2F1DTest(__builtin_va_list ap) {
|
||||
vec2f1d vec = __builtin_va_arg(ap, vec2f1d);
|
||||
return vec.x + vec.y + vec.z;
|
||||
}
|
||||
// CHECK: define double @Vec2F1DTest
|
||||
// CHECK: define{{.*}} double @Vec2F1DTest
|
||||
// CHECK: vaarg.in_reg:
|
||||
// CHECK: [[Vec2F1DLoad1:%.*]] = load <2 x float>, <2 x float>*
|
||||
// CHECK: [[Vec2F1DGEP1:%.*]] = getelementptr inbounds { <2 x float>, double }, { <2 x float>, double }* {{%.*}}, i32 0, i32 0
|
||||
@ -82,7 +82,7 @@ double Vec1D2FTest(__builtin_va_list ap) {
|
||||
vec1d2f vec = __builtin_va_arg(ap, vec1d2f);
|
||||
return vec.x + vec.y + vec.z;
|
||||
}
|
||||
// CHECK: define double @Vec1D2FTest
|
||||
// CHECK: define{{.*}} double @Vec1D2FTest
|
||||
// CHECK: vaarg.in_reg:
|
||||
// CHECK: [[Vec1D2FLoad1:%.*]] = load double, double*
|
||||
// CHECK: [[Vec1D2FGEP1:%.*]] = getelementptr inbounds { double, <2 x float> }, { double, <2 x float> }* {{%.*}}, i32 0, i32 0
|
||||
@ -101,7 +101,7 @@ double Vec1F1DTest(__builtin_va_list ap) {
|
||||
vec1f1d vec = __builtin_va_arg(ap, vec1f1d);
|
||||
return vec.x + vec.z;
|
||||
}
|
||||
// CHECK: define double @Vec1F1DTest
|
||||
// CHECK: define{{.*}} double @Vec1F1DTest
|
||||
// CHECK: vaarg.in_reg:
|
||||
// CHECK: [[Vec1F1DLoad1:%.*]] = load float, float*
|
||||
// CHECK: [[Vec1F1DGEP1:%.*]] = getelementptr inbounds { float, double }, { float, double }* {{%.*}}, i32 0, i32 0
|
||||
@ -120,7 +120,7 @@ double Vec1D1FTest(__builtin_va_list ap) {
|
||||
vec1d1f vec = __builtin_va_arg(ap, vec1d1f);
|
||||
return vec.x + vec.z;
|
||||
}
|
||||
// CHECK: define double @Vec1D1FTest
|
||||
// CHECK: define{{.*}} double @Vec1D1FTest
|
||||
// CHECK: vaarg.in_reg:
|
||||
// CHECK: [[Vec1D1FLoad1:%.*]] = load double, double*
|
||||
// CHECK: [[Vec1D1FGEP1:%.*]] = getelementptr inbounds { double, float }, { double, float }* {{%.*}}, i32 0, i32 0
|
||||
|
||||
@ -11,25 +11,25 @@
|
||||
// Android uses fp128 for long double but other x86_64 targets use x86_fp80.
|
||||
|
||||
long double dataLD = 1.0L;
|
||||
// ANDROID: @dataLD = local_unnamed_addr global fp128 0xL00000000000000003FFF000000000000, align 16
|
||||
// GNU: @dataLD = local_unnamed_addr global x86_fp80 0xK3FFF8000000000000000, align 16
|
||||
// ANDROID: @dataLD ={{.*}} local_unnamed_addr global fp128 0xL00000000000000003FFF000000000000, align 16
|
||||
// GNU: @dataLD ={{.*}} local_unnamed_addr global x86_fp80 0xK3FFF8000000000000000, align 16
|
||||
|
||||
long double _Complex dataLDC = {1.0L, 1.0L};
|
||||
// ANDROID: @dataLDC = local_unnamed_addr global { fp128, fp128 } { fp128 0xL00000000000000003FFF000000000000, fp128 0xL00000000000000003FFF000000000000 }, align 16
|
||||
// GNU: @dataLDC = local_unnamed_addr global { x86_fp80, x86_fp80 } { x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000 }, align 16
|
||||
// ANDROID: @dataLDC ={{.*}} local_unnamed_addr global { fp128, fp128 } { fp128 0xL00000000000000003FFF000000000000, fp128 0xL00000000000000003FFF000000000000 }, align 16
|
||||
// GNU: @dataLDC ={{.*}} local_unnamed_addr global { x86_fp80, x86_fp80 } { x86_fp80 0xK3FFF8000000000000000, x86_fp80 0xK3FFF8000000000000000 }, align 16
|
||||
|
||||
long double TestLD(long double x) {
|
||||
return x * x;
|
||||
// ANDROID: define fp128 @TestLD(fp128 %x)
|
||||
// GNU: define x86_fp80 @TestLD(x86_fp80 %x)
|
||||
// NACL: define double @TestLD(double %x)
|
||||
// ANDROID: define{{.*}} fp128 @TestLD(fp128 %x)
|
||||
// GNU: define{{.*}} x86_fp80 @TestLD(x86_fp80 %x)
|
||||
// NACL: define{{.*}} double @TestLD(double %x)
|
||||
}
|
||||
|
||||
long double _Complex TestLDC(long double _Complex x) {
|
||||
return x * x;
|
||||
// ANDROID: define void @TestLDC({ fp128, fp128 }* {{.*}}, { fp128, fp128 }* {{.*}} %x)
|
||||
// GNU: define { x86_fp80, x86_fp80 } @TestLDC({ x86_fp80, x86_fp80 }* {{.*}} %x)
|
||||
// NACL: define { double, double } @TestLDC(double %x{{.*}}, double %x{{.*}})
|
||||
// ANDROID: define{{.*}} void @TestLDC({ fp128, fp128 }* {{.*}}, { fp128, fp128 }* {{.*}} %x)
|
||||
// GNU: define{{.*}} { x86_fp80, x86_fp80 } @TestLDC({ x86_fp80, x86_fp80 }* {{.*}} %x)
|
||||
// NACL: define{{.*}} { double, double } @TestLDC(double %x{{.*}}, double %x{{.*}})
|
||||
}
|
||||
|
||||
typedef __builtin_va_list va_list;
|
||||
@ -37,7 +37,7 @@ typedef __builtin_va_list va_list;
|
||||
int TestGetVarInt(va_list ap) {
|
||||
return __builtin_va_arg(ap, int);
|
||||
// Since int can be passed in memory or register there are two branches.
|
||||
// CHECK: define i32 @TestGetVarInt(
|
||||
// CHECK: define{{.*}} i32 @TestGetVarInt(
|
||||
// CHECK: br label
|
||||
// CHECK: br label
|
||||
// CHECK: = phi
|
||||
@ -47,7 +47,7 @@ int TestGetVarInt(va_list ap) {
|
||||
double TestGetVarDouble(va_list ap) {
|
||||
return __builtin_va_arg(ap, double);
|
||||
// Since double can be passed in memory or register there are two branches.
|
||||
// CHECK: define double @TestGetVarDouble(
|
||||
// CHECK: define{{.*}} double @TestGetVarDouble(
|
||||
// CHECK: br label
|
||||
// CHECK: br label
|
||||
// CHECK: = phi
|
||||
@ -58,9 +58,9 @@ long double TestGetVarLD(va_list ap) {
|
||||
return __builtin_va_arg(ap, long double);
|
||||
// fp128 and double can be passed in memory or in register, but x86_fp80 is in
|
||||
// memory.
|
||||
// ANDROID: define fp128 @TestGetVarLD(
|
||||
// GNU: define x86_fp80 @TestGetVarLD(
|
||||
// NACL: define double @TestGetVarLD(
|
||||
// ANDROID: define{{.*}} fp128 @TestGetVarLD(
|
||||
// GNU: define{{.*}} x86_fp80 @TestGetVarLD(
|
||||
// NACL: define{{.*}} double @TestGetVarLD(
|
||||
// ANDROID: br label
|
||||
// ANDROID: br label
|
||||
// NACL: br
|
||||
@ -75,10 +75,10 @@ long double TestGetVarLD(va_list ap) {
|
||||
long double _Complex TestGetVarLDC(va_list ap) {
|
||||
return __builtin_va_arg(ap, long double _Complex);
|
||||
// Pair of fp128 or x86_fp80 are passed as struct in memory.
|
||||
// ANDROID: define void @TestGetVarLDC({ fp128, fp128 }* {{.*}}, %struct.__va_list_tag*
|
||||
// GNU: define { x86_fp80, x86_fp80 } @TestGetVarLDC(
|
||||
// ANDROID: define{{.*}} void @TestGetVarLDC({ fp128, fp128 }* {{.*}}, %struct.__va_list_tag*
|
||||
// GNU: define{{.*}} { x86_fp80, x86_fp80 } @TestGetVarLDC(
|
||||
// Pair of double can go in SSE registers or memory
|
||||
// NACL: define { double, double } @TestGetVarLDC(
|
||||
// NACL: define{{.*}} { double, double } @TestGetVarLDC(
|
||||
// ANDROID-NOT: br
|
||||
// GNU-NOT: br
|
||||
// NACL: br
|
||||
@ -94,42 +94,42 @@ void TestVarArg(const char *s, ...);
|
||||
|
||||
void TestPassVarInt(int x) {
|
||||
TestVarArg("A", x);
|
||||
// CHECK: define void @TestPassVarInt(i32 %x)
|
||||
// CHECK: define{{.*}} void @TestPassVarInt(i32 %x)
|
||||
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, i32 %x)
|
||||
}
|
||||
|
||||
void TestPassVarFloat(float x) {
|
||||
TestVarArg("A", x);
|
||||
// CHECK: define void @TestPassVarFloat(float %x)
|
||||
// CHECK: define{{.*}} void @TestPassVarFloat(float %x)
|
||||
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double %
|
||||
}
|
||||
|
||||
void TestPassVarDouble(double x) {
|
||||
TestVarArg("A", x);
|
||||
// CHECK: define void @TestPassVarDouble(double %x)
|
||||
// CHECK: define{{.*}} void @TestPassVarDouble(double %x)
|
||||
// CHECK: call {{.*}} @TestVarArg(i8* {{.*}}, double %x
|
||||
}
|
||||
|
||||
void TestPassVarLD(long double x) {
|
||||
TestVarArg("A", x);
|
||||
// ANDROID: define void @TestPassVarLD(fp128 %x)
|
||||
// ANDROID: define{{.*}} void @TestPassVarLD(fp128 %x)
|
||||
// ANDROID: call {{.*}} @TestVarArg(i8* {{.*}}, fp128 %x
|
||||
// GNU: define void @TestPassVarLD(x86_fp80 %x)
|
||||
// GNU: define{{.*}} void @TestPassVarLD(x86_fp80 %x)
|
||||
// GNU: call {{.*}} @TestVarArg(i8* {{.*}}, x86_fp80 %x
|
||||
// NACL: define void @TestPassVarLD(double %x)
|
||||
// NACL: define{{.*}} void @TestPassVarLD(double %x)
|
||||
// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double %x
|
||||
}
|
||||
|
||||
void TestPassVarLDC(long double _Complex x) {
|
||||
TestVarArg("A", x);
|
||||
// ANDROID: define void @TestPassVarLDC({ fp128, fp128 }* {{.*}} %x)
|
||||
// ANDROID: define{{.*}} void @TestPassVarLDC({ fp128, fp128 }* {{.*}} %x)
|
||||
// ANDROID: store fp128 %{{.*}}, fp128* %
|
||||
// ANDROID-NEXT: store fp128 %{{.*}}, fp128* %
|
||||
// ANDROID-NEXT: call {{.*}} @TestVarArg(i8* {{.*}}, { fp128, fp128 }* {{.*}} %
|
||||
// GNU: define void @TestPassVarLDC({ x86_fp80, x86_fp80 }* {{.*}} %x)
|
||||
// GNU: define{{.*}} void @TestPassVarLDC({ x86_fp80, x86_fp80 }* {{.*}} %x)
|
||||
// GNU: store x86_fp80 %{{.*}}, x86_fp80* %
|
||||
// GNU-NEXT: store x86_fp80 %{{.*}}, x86_fp80* %
|
||||
// GNU-NEXT: call {{.*}} @TestVarArg(i8* {{.*}}, { x86_fp80, x86_fp80 }* {{.*}} %
|
||||
// NACL: define void @TestPassVarLDC(double %x{{.*}}, double %x{{.*}})
|
||||
// NACL: define{{.*}} void @TestPassVarLDC(double %x{{.*}}, double %x{{.*}})
|
||||
// NACL: call {{.*}} @TestVarArg(i8* {{.*}}, double %x{{.*}}, double %x{{.*}})
|
||||
}
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
// RUN: %clang_cc1 -triple i386 -emit-llvm -O2 -o - %s | FileCheck %s
|
||||
|
||||
// CHECK-LABEL: define i32 @f0()
|
||||
// CHECK-LABEL: define{{.*}} i32 @f0()
|
||||
// CHECK: ret i32 1
|
||||
// CHECK: }
|
||||
|
||||
|
||||
@ -18,7 +18,7 @@ void g0() {
|
||||
f0(1, s);
|
||||
f0m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g0
|
||||
// CHECK: define{{.*}} void @g0
|
||||
// CHECK: call void @f0(i32 1, [2 x i32] [i32 6, i32 7]
|
||||
// CHECK: call void @f0m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
|
||||
// CHECK: declare void @f0(i32, [2 x i32])
|
||||
@ -36,7 +36,7 @@ void g1() {
|
||||
f1(1, s);
|
||||
f1m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g1
|
||||
// CHECK: define{{.*}} void @g1
|
||||
// CHECK: call void @f1(i32 1, [2 x i32] [i32 6, i32 7]
|
||||
// CHECK: call void @f1m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
|
||||
// CHECK: declare void @f1(i32, [2 x i32])
|
||||
@ -55,7 +55,7 @@ void g2() {
|
||||
f2(1, s);
|
||||
f2m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g2
|
||||
// CHECK: define{{.*}} void @g2
|
||||
// CHECK: call void @f2(i32 1, [4 x i32] [i32 6, i32 7
|
||||
// CHECK: call void @f2m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7
|
||||
// CHECK: declare void @f2(i32, [4 x i32])
|
||||
@ -74,7 +74,7 @@ void g3() {
|
||||
f3(1, s);
|
||||
f3m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g3
|
||||
// CHECK: define{{.*}} void @g3
|
||||
// CHECK: call void @f3(i32 1, [1 x i64] [i64 30064771078]
|
||||
// CHECK: call void @f3m(i32 1, i32 2, i32 3, i32 4, i32 5, [1 x i64] [i64 30064771078]
|
||||
// CHECK: declare void @f3(i32, [1 x i64])
|
||||
@ -94,7 +94,7 @@ void g4() {
|
||||
f4(1, s);
|
||||
f4m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g4
|
||||
// CHECK: define{{.*}} void @g4
|
||||
// CHECK: call void @f4(i32 1, %struct.SF16* nonnull byval(%struct.SF16) align 8
|
||||
// CHECK: call void @f4m(i32 1, i32 2, i32 3, i32 4, i32 5, %struct.SF16* nonnull byval(%struct.SF16) align 8
|
||||
// CHECK: declare void @f4(i32, %struct.SF16* byval(%struct.SF16) align 8)
|
||||
@ -113,7 +113,7 @@ void g5() {
|
||||
f5(1, s);
|
||||
f5m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g5
|
||||
// CHECK: define{{.*}} void @g5
|
||||
// CHECK: call void @f5(i32 1, [3 x i32] [i32 6, i32 7, i32 0])
|
||||
// CHECK: call void @f5m(i32 1, i32 2, i32 3, i32 4, i32 5, [3 x i32] [i32 6, i32 7, i32 0])
|
||||
// CHECK: declare void @f5(i32, [3 x i32])
|
||||
@ -133,7 +133,7 @@ void g6() {
|
||||
f6(1, s);
|
||||
f6m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g6
|
||||
// CHECK: define{{.*}} void @g6
|
||||
// CHECK: call void @f6(i32 1, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
|
||||
// CHECK: call void @f6m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
|
||||
// CHECK: declare void @f6(i32, [4 x i32])
|
||||
|
||||
@ -17,7 +17,7 @@ void g0() {
|
||||
f0(1, s);
|
||||
f0m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g0
|
||||
// CHECK: define{{.*}} void @g0
|
||||
// CHECK: call void @f0(i64 1, [2 x i64] [i64 6, i64 7]
|
||||
// CHECK: call void @f0m{{.*}}[2 x i64] [i64 6, i64 7]
|
||||
// CHECK: declare void @f0(i64, [2 x i64])
|
||||
@ -35,7 +35,7 @@ void g1() {
|
||||
f1(1, s);
|
||||
f1m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g1
|
||||
// CHECK: define{{.*}} void @g1
|
||||
// CHECK: call void @f1{{.*}}[2 x i64] [i64 6, i64 7]
|
||||
// CHECK: call void @f1m{{.*}}[2 x i64] [i64 6, i64 7]
|
||||
// CHECK: declare void @f1(i64, [2 x i64])
|
||||
@ -54,7 +54,7 @@ void g3() {
|
||||
f3(1, s);
|
||||
f3m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g3
|
||||
// CHECK: define{{.*}} void @g3
|
||||
// CHECK: call void @f3(i64 1, i128 129127208515966861318)
|
||||
// CHECK: call void @f3m(i64 1, i64 2, i64 3, i64 4, i64 5, i128 129127208515966861318)
|
||||
// CHECK: declare void @f3(i64, i128)
|
||||
@ -74,7 +74,7 @@ void g4() {
|
||||
f4(1, s);
|
||||
f4m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g4()
|
||||
// CHECK: define{{.*}} void @g4()
|
||||
// CHECK: call void @f4(i32 1, [2 x i64] [i64 30064771078, i64 0])
|
||||
// CHECK: void @f4m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i64] [i64 30064771078, i64 0])
|
||||
// CHECK: declare void @f4(i32, [2 x i64])
|
||||
@ -94,7 +94,7 @@ void f5m(int, int, int, int, int, P16);
|
||||
f5(1, s);
|
||||
f5m(1, 2, 3, 4, 5, s);
|
||||
}
|
||||
// CHECK: define void @g5()
|
||||
// CHECK: define{{.*}} void @g5()
|
||||
// CHECK: call void @f5(i32 1, [2 x i64] [i64 30064771078, i64 0])
|
||||
// CHECK: void @f5m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i64] [i64 30064771078, i64 0])
|
||||
// CHECK: declare void @f5(i32, [2 x i64])
|
||||
|
||||
@ -4,47 +4,47 @@
|
||||
|
||||
__attribute__ ((target("branch-protection=none")))
|
||||
void none() {}
|
||||
// CHECK: define void @none() #[[#NONE:]]
|
||||
// CHECK: define{{.*}} void @none() #[[#NONE:]]
|
||||
|
||||
__attribute__ ((target("branch-protection=standard")))
|
||||
void std() {}
|
||||
// CHECK: define void @std() #[[#STD:]]
|
||||
// CHECK: define{{.*}} void @std() #[[#STD:]]
|
||||
|
||||
__attribute__ ((target("branch-protection=bti")))
|
||||
void btionly() {}
|
||||
// CHECK: define void @btionly() #[[#BTI:]]
|
||||
// CHECK: define{{.*}} void @btionly() #[[#BTI:]]
|
||||
|
||||
__attribute__ ((target("branch-protection=pac-ret")))
|
||||
void paconly() {}
|
||||
// CHECK: define void @paconly() #[[#PAC:]]
|
||||
// CHECK: define{{.*}} void @paconly() #[[#PAC:]]
|
||||
|
||||
__attribute__ ((target("branch-protection=pac-ret+bti")))
|
||||
void pacbti0() {}
|
||||
// CHECK: define void @pacbti0() #[[#PACBTI:]]
|
||||
// CHECK: define{{.*}} void @pacbti0() #[[#PACBTI:]]
|
||||
|
||||
__attribute__ ((target("branch-protection=bti+pac-ret")))
|
||||
void pacbti1() {}
|
||||
// CHECK: define void @pacbti1() #[[#PACBTI]]
|
||||
// CHECK: define{{.*}} void @pacbti1() #[[#PACBTI]]
|
||||
|
||||
__attribute__ ((target("branch-protection=pac-ret+leaf")))
|
||||
void leaf() {}
|
||||
// CHECK: define void @leaf() #[[#PACLEAF:]]
|
||||
// CHECK: define{{.*}} void @leaf() #[[#PACLEAF:]]
|
||||
|
||||
__attribute__ ((target("branch-protection=pac-ret+b-key")))
|
||||
void bkey() {}
|
||||
// CHECK: define void @bkey() #[[#PACBKEY:]]
|
||||
// CHECK: define{{.*}} void @bkey() #[[#PACBKEY:]]
|
||||
|
||||
__attribute__ ((target("branch-protection=pac-ret+b-key+leaf")))
|
||||
void bkeyleaf0() {}
|
||||
// CHECK: define void @bkeyleaf0() #[[#PACBKEYLEAF:]]
|
||||
// CHECK: define{{.*}} void @bkeyleaf0() #[[#PACBKEYLEAF:]]
|
||||
|
||||
__attribute__ ((target("branch-protection=pac-ret+leaf+b-key")))
|
||||
void bkeyleaf1() {}
|
||||
// CHECK: define void @bkeyleaf1() #[[#PACBKEYLEAF]]
|
||||
// CHECK: define{{.*}} void @bkeyleaf1() #[[#PACBKEYLEAF]]
|
||||
|
||||
__attribute__ ((target("branch-protection=pac-ret+leaf+bti")))
|
||||
void btileaf() {}
|
||||
// CHECK: define void @btileaf() #[[#BTIPACLEAF:]]
|
||||
// CHECK: define{{.*}} void @btileaf() #[[#BTIPACLEAF:]]
|
||||
|
||||
// CHECK-DAG: attributes #[[#NONE]] = { {{.*}} "branch-target-enforcement"="false" {{.*}} "sign-return-address"="none"
|
||||
|
||||
|
||||
@ -17,7 +17,7 @@ void example() {
|
||||
pass_large(l);
|
||||
pass_large(l);
|
||||
}
|
||||
// CHECK-O0-LABEL: define void @example(
|
||||
// CHECK-O0-LABEL: define{{.*}} void @example(
|
||||
// The alloca for the struct on the stack.
|
||||
// CHECK-O0: %[[l:[0-9A-Za-z-]+]] = alloca %struct.large, align 8
|
||||
// The alloca for the temporary stack space that we use to pass the argument.
|
||||
@ -42,7 +42,7 @@ void example() {
|
||||
//
|
||||
// At O3, we should have lifetime markers to help the optimizer re-use the temporary allocas.
|
||||
//
|
||||
// CHECK-O3-LABEL: define void @example(
|
||||
// CHECK-O3-LABEL: define{{.*}} void @example(
|
||||
// The alloca for the struct on the stack.
|
||||
// CHECK-O3: %[[l:[0-9A-Za-z-]+]] = alloca %struct.large, align 8
|
||||
// The alloca for the temporary stack space that we use to pass the argument.
|
||||
|
||||
@ -3,6 +3,6 @@
|
||||
#ifdef __ARM_FEATURE_MATMUL_INT8
|
||||
extern "C" void arm_feature_matmulint8_defined() {}
|
||||
#endif
|
||||
// CHECK: define void @arm_feature_matmulint8_defined()
|
||||
// CHECK: define{{.*}} void @arm_feature_matmulint8_defined()
|
||||
|
||||
|
||||
|
||||
@ -4,343 +4,343 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vand_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vand_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b
|
||||
// CHECK: ret <8 x i8> [[AND_I]]
|
||||
int8x8_t test_vand_s8(int8x8_t a, int8x8_t b) {
|
||||
return vand_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vandq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vandq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b
|
||||
// CHECK: ret <16 x i8> [[AND_I]]
|
||||
int8x16_t test_vandq_s8(int8x16_t a, int8x16_t b) {
|
||||
return vandq_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vand_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vand_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b
|
||||
// CHECK: ret <4 x i16> [[AND_I]]
|
||||
int16x4_t test_vand_s16(int16x4_t a, int16x4_t b) {
|
||||
return vand_s16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vandq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vandq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b
|
||||
// CHECK: ret <8 x i16> [[AND_I]]
|
||||
int16x8_t test_vandq_s16(int16x8_t a, int16x8_t b) {
|
||||
return vandq_s16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vand_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vand_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b
|
||||
// CHECK: ret <2 x i32> [[AND_I]]
|
||||
int32x2_t test_vand_s32(int32x2_t a, int32x2_t b) {
|
||||
return vand_s32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vandq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vandq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b
|
||||
// CHECK: ret <4 x i32> [[AND_I]]
|
||||
int32x4_t test_vandq_s32(int32x4_t a, int32x4_t b) {
|
||||
return vandq_s32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vand_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vand_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b
|
||||
// CHECK: ret <1 x i64> [[AND_I]]
|
||||
int64x1_t test_vand_s64(int64x1_t a, int64x1_t b) {
|
||||
return vand_s64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vandq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vandq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b
|
||||
// CHECK: ret <2 x i64> [[AND_I]]
|
||||
int64x2_t test_vandq_s64(int64x2_t a, int64x2_t b) {
|
||||
return vandq_s64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vand_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vand_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b
|
||||
// CHECK: ret <8 x i8> [[AND_I]]
|
||||
uint8x8_t test_vand_u8(uint8x8_t a, uint8x8_t b) {
|
||||
return vand_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vandq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vandq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b
|
||||
// CHECK: ret <16 x i8> [[AND_I]]
|
||||
uint8x16_t test_vandq_u8(uint8x16_t a, uint8x16_t b) {
|
||||
return vandq_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vand_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vand_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b
|
||||
// CHECK: ret <4 x i16> [[AND_I]]
|
||||
uint16x4_t test_vand_u16(uint16x4_t a, uint16x4_t b) {
|
||||
return vand_u16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vandq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vandq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b
|
||||
// CHECK: ret <8 x i16> [[AND_I]]
|
||||
uint16x8_t test_vandq_u16(uint16x8_t a, uint16x8_t b) {
|
||||
return vandq_u16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vand_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vand_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b
|
||||
// CHECK: ret <2 x i32> [[AND_I]]
|
||||
uint32x2_t test_vand_u32(uint32x2_t a, uint32x2_t b) {
|
||||
return vand_u32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vandq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vandq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b
|
||||
// CHECK: ret <4 x i32> [[AND_I]]
|
||||
uint32x4_t test_vandq_u32(uint32x4_t a, uint32x4_t b) {
|
||||
return vandq_u32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vand_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vand_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b
|
||||
// CHECK: ret <1 x i64> [[AND_I]]
|
||||
uint64x1_t test_vand_u64(uint64x1_t a, uint64x1_t b) {
|
||||
return vand_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vandq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vandq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b
|
||||
// CHECK: ret <2 x i64> [[AND_I]]
|
||||
uint64x2_t test_vandq_u64(uint64x2_t a, uint64x2_t b) {
|
||||
return vandq_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vorr_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vorr_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, %b
|
||||
// CHECK: ret <8 x i8> [[OR_I]]
|
||||
int8x8_t test_vorr_s8(int8x8_t a, int8x8_t b) {
|
||||
return vorr_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vorrq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vorrq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, %b
|
||||
// CHECK: ret <16 x i8> [[OR_I]]
|
||||
int8x16_t test_vorrq_s8(int8x16_t a, int8x16_t b) {
|
||||
return vorrq_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vorr_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vorr_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, %b
|
||||
// CHECK: ret <4 x i16> [[OR_I]]
|
||||
int16x4_t test_vorr_s16(int16x4_t a, int16x4_t b) {
|
||||
return vorr_s16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vorrq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vorrq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, %b
|
||||
// CHECK: ret <8 x i16> [[OR_I]]
|
||||
int16x8_t test_vorrq_s16(int16x8_t a, int16x8_t b) {
|
||||
return vorrq_s16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vorr_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vorr_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, %b
|
||||
// CHECK: ret <2 x i32> [[OR_I]]
|
||||
int32x2_t test_vorr_s32(int32x2_t a, int32x2_t b) {
|
||||
return vorr_s32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vorrq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vorrq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, %b
|
||||
// CHECK: ret <4 x i32> [[OR_I]]
|
||||
int32x4_t test_vorrq_s32(int32x4_t a, int32x4_t b) {
|
||||
return vorrq_s32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vorr_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vorr_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, %b
|
||||
// CHECK: ret <1 x i64> [[OR_I]]
|
||||
int64x1_t test_vorr_s64(int64x1_t a, int64x1_t b) {
|
||||
return vorr_s64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vorrq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vorrq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, %b
|
||||
// CHECK: ret <2 x i64> [[OR_I]]
|
||||
int64x2_t test_vorrq_s64(int64x2_t a, int64x2_t b) {
|
||||
return vorrq_s64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vorr_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vorr_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, %b
|
||||
// CHECK: ret <8 x i8> [[OR_I]]
|
||||
uint8x8_t test_vorr_u8(uint8x8_t a, uint8x8_t b) {
|
||||
return vorr_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vorrq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vorrq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, %b
|
||||
// CHECK: ret <16 x i8> [[OR_I]]
|
||||
uint8x16_t test_vorrq_u8(uint8x16_t a, uint8x16_t b) {
|
||||
return vorrq_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vorr_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vorr_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, %b
|
||||
// CHECK: ret <4 x i16> [[OR_I]]
|
||||
uint16x4_t test_vorr_u16(uint16x4_t a, uint16x4_t b) {
|
||||
return vorr_u16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vorrq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vorrq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, %b
|
||||
// CHECK: ret <8 x i16> [[OR_I]]
|
||||
uint16x8_t test_vorrq_u16(uint16x8_t a, uint16x8_t b) {
|
||||
return vorrq_u16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vorr_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vorr_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, %b
|
||||
// CHECK: ret <2 x i32> [[OR_I]]
|
||||
uint32x2_t test_vorr_u32(uint32x2_t a, uint32x2_t b) {
|
||||
return vorr_u32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vorrq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vorrq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, %b
|
||||
// CHECK: ret <4 x i32> [[OR_I]]
|
||||
uint32x4_t test_vorrq_u32(uint32x4_t a, uint32x4_t b) {
|
||||
return vorrq_u32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vorr_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vorr_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, %b
|
||||
// CHECK: ret <1 x i64> [[OR_I]]
|
||||
uint64x1_t test_vorr_u64(uint64x1_t a, uint64x1_t b) {
|
||||
return vorr_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vorrq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vorrq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, %b
|
||||
// CHECK: ret <2 x i64> [[OR_I]]
|
||||
uint64x2_t test_vorrq_u64(uint64x2_t a, uint64x2_t b) {
|
||||
return vorrq_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_veor_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_veor_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <8 x i8> %a, %b
|
||||
// CHECK: ret <8 x i8> [[XOR_I]]
|
||||
int8x8_t test_veor_s8(int8x8_t a, int8x8_t b) {
|
||||
return veor_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_veorq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_veorq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <16 x i8> %a, %b
|
||||
// CHECK: ret <16 x i8> [[XOR_I]]
|
||||
int8x16_t test_veorq_s8(int8x16_t a, int8x16_t b) {
|
||||
return veorq_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_veor_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_veor_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <4 x i16> %a, %b
|
||||
// CHECK: ret <4 x i16> [[XOR_I]]
|
||||
int16x4_t test_veor_s16(int16x4_t a, int16x4_t b) {
|
||||
return veor_s16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_veorq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_veorq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <8 x i16> %a, %b
|
||||
// CHECK: ret <8 x i16> [[XOR_I]]
|
||||
int16x8_t test_veorq_s16(int16x8_t a, int16x8_t b) {
|
||||
return veorq_s16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_veor_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_veor_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <2 x i32> %a, %b
|
||||
// CHECK: ret <2 x i32> [[XOR_I]]
|
||||
int32x2_t test_veor_s32(int32x2_t a, int32x2_t b) {
|
||||
return veor_s32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_veorq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_veorq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <4 x i32> %a, %b
|
||||
// CHECK: ret <4 x i32> [[XOR_I]]
|
||||
int32x4_t test_veorq_s32(int32x4_t a, int32x4_t b) {
|
||||
return veorq_s32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_veor_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_veor_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <1 x i64> %a, %b
|
||||
// CHECK: ret <1 x i64> [[XOR_I]]
|
||||
int64x1_t test_veor_s64(int64x1_t a, int64x1_t b) {
|
||||
return veor_s64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_veorq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_veorq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <2 x i64> %a, %b
|
||||
// CHECK: ret <2 x i64> [[XOR_I]]
|
||||
int64x2_t test_veorq_s64(int64x2_t a, int64x2_t b) {
|
||||
return veorq_s64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_veor_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_veor_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <8 x i8> %a, %b
|
||||
// CHECK: ret <8 x i8> [[XOR_I]]
|
||||
uint8x8_t test_veor_u8(uint8x8_t a, uint8x8_t b) {
|
||||
return veor_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_veorq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_veorq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <16 x i8> %a, %b
|
||||
// CHECK: ret <16 x i8> [[XOR_I]]
|
||||
uint8x16_t test_veorq_u8(uint8x16_t a, uint8x16_t b) {
|
||||
return veorq_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_veor_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_veor_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <4 x i16> %a, %b
|
||||
// CHECK: ret <4 x i16> [[XOR_I]]
|
||||
uint16x4_t test_veor_u16(uint16x4_t a, uint16x4_t b) {
|
||||
return veor_u16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_veorq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_veorq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <8 x i16> %a, %b
|
||||
// CHECK: ret <8 x i16> [[XOR_I]]
|
||||
uint16x8_t test_veorq_u16(uint16x8_t a, uint16x8_t b) {
|
||||
return veorq_u16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_veor_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_veor_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <2 x i32> %a, %b
|
||||
// CHECK: ret <2 x i32> [[XOR_I]]
|
||||
uint32x2_t test_veor_u32(uint32x2_t a, uint32x2_t b) {
|
||||
return veor_u32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_veorq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_veorq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <4 x i32> %a, %b
|
||||
// CHECK: ret <4 x i32> [[XOR_I]]
|
||||
uint32x4_t test_veorq_u32(uint32x4_t a, uint32x4_t b) {
|
||||
return veorq_u32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_veor_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_veor_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <1 x i64> %a, %b
|
||||
// CHECK: ret <1 x i64> [[XOR_I]]
|
||||
uint64x1_t test_veor_u64(uint64x1_t a, uint64x1_t b) {
|
||||
return veor_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_veorq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_veorq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[XOR_I:%.*]] = xor <2 x i64> %a, %b
|
||||
// CHECK: ret <2 x i64> [[XOR_I]]
|
||||
uint64x2_t test_veorq_u64(uint64x2_t a, uint64x2_t b) {
|
||||
return veorq_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vbic_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vbic_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]]
|
||||
// CHECK: ret <8 x i8> [[AND_I]]
|
||||
@ -348,7 +348,7 @@ int8x8_t test_vbic_s8(int8x8_t a, int8x8_t b) {
|
||||
return vbic_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vbicq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vbicq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]]
|
||||
// CHECK: ret <16 x i8> [[AND_I]]
|
||||
@ -356,7 +356,7 @@ int8x16_t test_vbicq_s8(int8x16_t a, int8x16_t b) {
|
||||
return vbicq_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vbic_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vbic_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]]
|
||||
// CHECK: ret <4 x i16> [[AND_I]]
|
||||
@ -364,7 +364,7 @@ int16x4_t test_vbic_s16(int16x4_t a, int16x4_t b) {
|
||||
return vbic_s16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vbicq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vbicq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]]
|
||||
// CHECK: ret <8 x i16> [[AND_I]]
|
||||
@ -372,7 +372,7 @@ int16x8_t test_vbicq_s16(int16x8_t a, int16x8_t b) {
|
||||
return vbicq_s16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vbic_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vbic_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]]
|
||||
// CHECK: ret <2 x i32> [[AND_I]]
|
||||
@ -380,7 +380,7 @@ int32x2_t test_vbic_s32(int32x2_t a, int32x2_t b) {
|
||||
return vbic_s32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vbicq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vbicq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]]
|
||||
// CHECK: ret <4 x i32> [[AND_I]]
|
||||
@ -388,7 +388,7 @@ int32x4_t test_vbicq_s32(int32x4_t a, int32x4_t b) {
|
||||
return vbicq_s32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vbic_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vbic_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]]
|
||||
// CHECK: ret <1 x i64> [[AND_I]]
|
||||
@ -396,7 +396,7 @@ int64x1_t test_vbic_s64(int64x1_t a, int64x1_t b) {
|
||||
return vbic_s64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vbicq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vbicq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]]
|
||||
// CHECK: ret <2 x i64> [[AND_I]]
|
||||
@ -404,7 +404,7 @@ int64x2_t test_vbicq_s64(int64x2_t a, int64x2_t b) {
|
||||
return vbicq_s64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vbic_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vbic_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]]
|
||||
// CHECK: ret <8 x i8> [[AND_I]]
|
||||
@ -412,7 +412,7 @@ uint8x8_t test_vbic_u8(uint8x8_t a, uint8x8_t b) {
|
||||
return vbic_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vbicq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vbicq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]]
|
||||
// CHECK: ret <16 x i8> [[AND_I]]
|
||||
@ -420,7 +420,7 @@ uint8x16_t test_vbicq_u8(uint8x16_t a, uint8x16_t b) {
|
||||
return vbicq_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vbic_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vbic_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]]
|
||||
// CHECK: ret <4 x i16> [[AND_I]]
|
||||
@ -428,7 +428,7 @@ uint16x4_t test_vbic_u16(uint16x4_t a, uint16x4_t b) {
|
||||
return vbic_u16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vbicq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vbicq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]]
|
||||
// CHECK: ret <8 x i16> [[AND_I]]
|
||||
@ -436,7 +436,7 @@ uint16x8_t test_vbicq_u16(uint16x8_t a, uint16x8_t b) {
|
||||
return vbicq_u16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vbic_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vbic_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]]
|
||||
// CHECK: ret <2 x i32> [[AND_I]]
|
||||
@ -444,7 +444,7 @@ uint32x2_t test_vbic_u32(uint32x2_t a, uint32x2_t b) {
|
||||
return vbic_u32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vbicq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vbicq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]]
|
||||
// CHECK: ret <4 x i32> [[AND_I]]
|
||||
@ -452,7 +452,7 @@ uint32x4_t test_vbicq_u32(uint32x4_t a, uint32x4_t b) {
|
||||
return vbicq_u32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vbic_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vbic_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]]
|
||||
// CHECK: ret <1 x i64> [[AND_I]]
|
||||
@ -460,7 +460,7 @@ uint64x1_t test_vbic_u64(uint64x1_t a, uint64x1_t b) {
|
||||
return vbic_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vbicq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vbicq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
|
||||
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]]
|
||||
// CHECK: ret <2 x i64> [[AND_I]]
|
||||
@ -468,7 +468,7 @@ uint64x2_t test_vbicq_u64(uint64x2_t a, uint64x2_t b) {
|
||||
return vbicq_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vorn_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vorn_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, [[NEG_I]]
|
||||
// CHECK: ret <8 x i8> [[OR_I]]
|
||||
@ -476,7 +476,7 @@ int8x8_t test_vorn_s8(int8x8_t a, int8x8_t b) {
|
||||
return vorn_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vornq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vornq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, [[NEG_I]]
|
||||
// CHECK: ret <16 x i8> [[OR_I]]
|
||||
@ -484,7 +484,7 @@ int8x16_t test_vornq_s8(int8x16_t a, int8x16_t b) {
|
||||
return vornq_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vorn_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vorn_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, [[NEG_I]]
|
||||
// CHECK: ret <4 x i16> [[OR_I]]
|
||||
@ -492,7 +492,7 @@ int16x4_t test_vorn_s16(int16x4_t a, int16x4_t b) {
|
||||
return vorn_s16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vornq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vornq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, [[NEG_I]]
|
||||
// CHECK: ret <8 x i16> [[OR_I]]
|
||||
@ -500,7 +500,7 @@ int16x8_t test_vornq_s16(int16x8_t a, int16x8_t b) {
|
||||
return vornq_s16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vorn_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vorn_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, [[NEG_I]]
|
||||
// CHECK: ret <2 x i32> [[OR_I]]
|
||||
@ -508,7 +508,7 @@ int32x2_t test_vorn_s32(int32x2_t a, int32x2_t b) {
|
||||
return vorn_s32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vornq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vornq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, [[NEG_I]]
|
||||
// CHECK: ret <4 x i32> [[OR_I]]
|
||||
@ -516,7 +516,7 @@ int32x4_t test_vornq_s32(int32x4_t a, int32x4_t b) {
|
||||
return vornq_s32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vorn_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vorn_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, [[NEG_I]]
|
||||
// CHECK: ret <1 x i64> [[OR_I]]
|
||||
@ -524,7 +524,7 @@ int64x1_t test_vorn_s64(int64x1_t a, int64x1_t b) {
|
||||
return vorn_s64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vornq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vornq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, [[NEG_I]]
|
||||
// CHECK: ret <2 x i64> [[OR_I]]
|
||||
@ -532,7 +532,7 @@ int64x2_t test_vornq_s64(int64x2_t a, int64x2_t b) {
|
||||
return vornq_s64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vorn_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vorn_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, [[NEG_I]]
|
||||
// CHECK: ret <8 x i8> [[OR_I]]
|
||||
@ -540,7 +540,7 @@ uint8x8_t test_vorn_u8(uint8x8_t a, uint8x8_t b) {
|
||||
return vorn_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vornq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vornq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, [[NEG_I]]
|
||||
// CHECK: ret <16 x i8> [[OR_I]]
|
||||
@ -548,7 +548,7 @@ uint8x16_t test_vornq_u8(uint8x16_t a, uint8x16_t b) {
|
||||
return vornq_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vorn_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vorn_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, [[NEG_I]]
|
||||
// CHECK: ret <4 x i16> [[OR_I]]
|
||||
@ -556,7 +556,7 @@ uint16x4_t test_vorn_u16(uint16x4_t a, uint16x4_t b) {
|
||||
return vorn_u16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vornq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vornq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, [[NEG_I]]
|
||||
// CHECK: ret <8 x i16> [[OR_I]]
|
||||
@ -564,7 +564,7 @@ uint16x8_t test_vornq_u16(uint16x8_t a, uint16x8_t b) {
|
||||
return vornq_u16(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vorn_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vorn_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, [[NEG_I]]
|
||||
// CHECK: ret <2 x i32> [[OR_I]]
|
||||
@ -572,7 +572,7 @@ uint32x2_t test_vorn_u32(uint32x2_t a, uint32x2_t b) {
|
||||
return vorn_u32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vornq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vornq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, [[NEG_I]]
|
||||
// CHECK: ret <4 x i32> [[OR_I]]
|
||||
@ -580,7 +580,7 @@ uint32x4_t test_vornq_u32(uint32x4_t a, uint32x4_t b) {
|
||||
return vornq_u32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vorn_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vorn_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, [[NEG_I]]
|
||||
// CHECK: ret <1 x i64> [[OR_I]]
|
||||
@ -588,7 +588,7 @@ uint64x1_t test_vorn_u64(uint64x1_t a, uint64x1_t b) {
|
||||
return vorn_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vornq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vornq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
|
||||
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, [[NEG_I]]
|
||||
// CHECK: ret <2 x i64> [[OR_I]]
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vaddlv_s8(<8 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vaddlv_s8(<8 x i8> %a) #0 {
|
||||
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP0]]
|
||||
@ -13,14 +13,14 @@ int16_t test_vaddlv_s8(int8x8_t a) {
|
||||
return vaddlv_s8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vaddlv_s16(<4 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vaddlv_s16(<4 x i16> %a) #0 {
|
||||
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16> %a) #3
|
||||
// CHECK: ret i32 [[VADDLV_I]]
|
||||
int32_t test_vaddlv_s16(int16x4_t a) {
|
||||
return vaddlv_s16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vaddlv_u8(<8 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vaddlv_u8(<8 x i8> %a) #0 {
|
||||
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i8(<8 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP0]]
|
||||
@ -28,14 +28,14 @@ uint16_t test_vaddlv_u8(uint8x8_t a) {
|
||||
return vaddlv_u8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vaddlv_u16(<4 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vaddlv_u16(<4 x i16> %a) #0 {
|
||||
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v4i16(<4 x i16> %a) #3
|
||||
// CHECK: ret i32 [[VADDLV_I]]
|
||||
uint32_t test_vaddlv_u16(uint16x4_t a) {
|
||||
return vaddlv_u16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vaddlvq_s8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vaddlvq_s8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v16i8(<16 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP0]]
|
||||
@ -43,21 +43,21 @@ int16_t test_vaddlvq_s8(int8x16_t a) {
|
||||
return vaddlvq_s8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vaddlvq_s16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vaddlvq_s16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16> %a) #3
|
||||
// CHECK: ret i32 [[VADDLV_I]]
|
||||
int32_t test_vaddlvq_s16(int16x8_t a) {
|
||||
return vaddlvq_s16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vaddlvq_s32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vaddlvq_s32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[VADDLVQ_S32_I:%.*]] = call i64 @llvm.aarch64.neon.saddlv.i64.v4i32(<4 x i32> %a) #3
|
||||
// CHECK: ret i64 [[VADDLVQ_S32_I]]
|
||||
int64_t test_vaddlvq_s32(int32x4_t a) {
|
||||
return vaddlvq_s32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vaddlvq_u8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vaddlvq_u8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP0]]
|
||||
@ -65,21 +65,21 @@ uint16_t test_vaddlvq_u8(uint8x16_t a) {
|
||||
return vaddlvq_u8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vaddlvq_u16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vaddlvq_u16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i16(<8 x i16> %a) #3
|
||||
// CHECK: ret i32 [[VADDLV_I]]
|
||||
uint32_t test_vaddlvq_u16(uint16x8_t a) {
|
||||
return vaddlvq_u16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vaddlvq_u32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vaddlvq_u32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[VADDLVQ_U32_I:%.*]] = call i64 @llvm.aarch64.neon.uaddlv.i64.v4i32(<4 x i32> %a) #3
|
||||
// CHECK: ret i64 [[VADDLVQ_U32_I]]
|
||||
uint64_t test_vaddlvq_u32(uint32x4_t a) {
|
||||
return vaddlvq_u32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vmaxv_s8(<8 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vmaxv_s8(<8 x i8> %a) #0 {
|
||||
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i8(<8 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -87,7 +87,7 @@ int8_t test_vmaxv_s8(int8x8_t a) {
|
||||
return vmaxv_s8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vmaxv_s16(<4 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vmaxv_s16(<4 x i16> %a) #0 {
|
||||
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i16(<4 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -95,7 +95,7 @@ int16_t test_vmaxv_s16(int16x4_t a) {
|
||||
return vmaxv_s16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vmaxv_u8(<8 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vmaxv_u8(<8 x i8> %a) #0 {
|
||||
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i8(<8 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -103,7 +103,7 @@ uint8_t test_vmaxv_u8(uint8x8_t a) {
|
||||
return vmaxv_u8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vmaxv_u16(<4 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vmaxv_u16(<4 x i16> %a) #0 {
|
||||
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i16(<4 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -111,7 +111,7 @@ uint16_t test_vmaxv_u16(uint16x4_t a) {
|
||||
return vmaxv_u16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vmaxvq_s8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vmaxvq_s8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v16i8(<16 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -119,7 +119,7 @@ int8_t test_vmaxvq_s8(int8x16_t a) {
|
||||
return vmaxvq_s8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vmaxvq_s16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vmaxvq_s16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i16(<8 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -127,14 +127,14 @@ int16_t test_vmaxvq_s16(int16x8_t a) {
|
||||
return vmaxvq_s16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vmaxvq_s32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vmaxvq_s32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[VMAXVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i32(<4 x i32> %a) #3
|
||||
// CHECK: ret i32 [[VMAXVQ_S32_I]]
|
||||
int32_t test_vmaxvq_s32(int32x4_t a) {
|
||||
return vmaxvq_s32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vmaxvq_u8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vmaxvq_u8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v16i8(<16 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -142,7 +142,7 @@ uint8_t test_vmaxvq_u8(uint8x16_t a) {
|
||||
return vmaxvq_u8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vmaxvq_u16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vmaxvq_u16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i16(<8 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -150,14 +150,14 @@ uint16_t test_vmaxvq_u16(uint16x8_t a) {
|
||||
return vmaxvq_u16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vmaxvq_u32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vmaxvq_u32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[VMAXVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i32(<4 x i32> %a) #3
|
||||
// CHECK: ret i32 [[VMAXVQ_U32_I]]
|
||||
uint32_t test_vmaxvq_u32(uint32x4_t a) {
|
||||
return vmaxvq_u32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vminv_s8(<8 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vminv_s8(<8 x i8> %a) #0 {
|
||||
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i8(<8 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -165,7 +165,7 @@ int8_t test_vminv_s8(int8x8_t a) {
|
||||
return vminv_s8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vminv_s16(<4 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vminv_s16(<4 x i16> %a) #0 {
|
||||
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i16(<4 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -173,7 +173,7 @@ int16_t test_vminv_s16(int16x4_t a) {
|
||||
return vminv_s16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vminv_u8(<8 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vminv_u8(<8 x i8> %a) #0 {
|
||||
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i8(<8 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -181,7 +181,7 @@ uint8_t test_vminv_u8(uint8x8_t a) {
|
||||
return vminv_u8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vminv_u16(<4 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vminv_u16(<4 x i16> %a) #0 {
|
||||
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i16(<4 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -189,7 +189,7 @@ uint16_t test_vminv_u16(uint16x4_t a) {
|
||||
return vminv_u16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vminvq_s8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vminvq_s8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v16i8(<16 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -197,7 +197,7 @@ int8_t test_vminvq_s8(int8x16_t a) {
|
||||
return vminvq_s8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vminvq_s16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vminvq_s16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i16(<8 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -205,14 +205,14 @@ int16_t test_vminvq_s16(int16x8_t a) {
|
||||
return vminvq_s16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vminvq_s32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vminvq_s32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[VMINVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i32(<4 x i32> %a) #3
|
||||
// CHECK: ret i32 [[VMINVQ_S32_I]]
|
||||
int32_t test_vminvq_s32(int32x4_t a) {
|
||||
return vminvq_s32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vminvq_u8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vminvq_u8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v16i8(<16 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -220,7 +220,7 @@ uint8_t test_vminvq_u8(uint8x16_t a) {
|
||||
return vminvq_u8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vminvq_u16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vminvq_u16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i16(<8 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -228,14 +228,14 @@ uint16_t test_vminvq_u16(uint16x8_t a) {
|
||||
return vminvq_u16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vminvq_u32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vminvq_u32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[VMINVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i32(<4 x i32> %a) #3
|
||||
// CHECK: ret i32 [[VMINVQ_U32_I]]
|
||||
uint32_t test_vminvq_u32(uint32x4_t a) {
|
||||
return vminvq_u32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vaddv_s8(<8 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vaddv_s8(<8 x i8> %a) #0 {
|
||||
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i8(<8 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -243,7 +243,7 @@ int8_t test_vaddv_s8(int8x8_t a) {
|
||||
return vaddv_s8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vaddv_s16(<4 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vaddv_s16(<4 x i16> %a) #0 {
|
||||
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i16(<4 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -251,7 +251,7 @@ int16_t test_vaddv_s16(int16x4_t a) {
|
||||
return vaddv_s16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vaddv_u8(<8 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vaddv_u8(<8 x i8> %a) #0 {
|
||||
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i8(<8 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -259,7 +259,7 @@ uint8_t test_vaddv_u8(uint8x8_t a) {
|
||||
return vaddv_u8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vaddv_u16(<4 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vaddv_u16(<4 x i16> %a) #0 {
|
||||
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i16(<4 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -267,7 +267,7 @@ uint16_t test_vaddv_u16(uint16x4_t a) {
|
||||
return vaddv_u16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vaddvq_s8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vaddvq_s8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v16i8(<16 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -275,7 +275,7 @@ int8_t test_vaddvq_s8(int8x16_t a) {
|
||||
return vaddvq_s8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vaddvq_s16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vaddvq_s16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i16(<8 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -283,14 +283,14 @@ int16_t test_vaddvq_s16(int16x8_t a) {
|
||||
return vaddvq_s16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vaddvq_s32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vaddvq_s32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[VADDVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i32(<4 x i32> %a) #3
|
||||
// CHECK: ret i32 [[VADDVQ_S32_I]]
|
||||
int32_t test_vaddvq_s32(int32x4_t a) {
|
||||
return vaddvq_s32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vaddvq_u8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vaddvq_u8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v16i8(<16 x i8> %a) #3
|
||||
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
|
||||
// CHECK: ret i8 [[TMP0]]
|
||||
@ -298,7 +298,7 @@ uint8_t test_vaddvq_u8(uint8x16_t a) {
|
||||
return vaddvq_u8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vaddvq_u16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vaddvq_u16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i16(<8 x i16> %a) #3
|
||||
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
|
||||
// CHECK: ret i16 [[TMP2]]
|
||||
@ -306,35 +306,35 @@ uint16_t test_vaddvq_u16(uint16x8_t a) {
|
||||
return vaddvq_u16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vaddvq_u32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vaddvq_u32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[VADDVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i32(<4 x i32> %a) #3
|
||||
// CHECK: ret i32 [[VADDVQ_U32_I]]
|
||||
uint32_t test_vaddvq_u32(uint32x4_t a) {
|
||||
return vaddvq_u32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define float @test_vmaxvq_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vmaxvq_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VMAXVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret float [[VMAXVQ_F32_I]]
|
||||
float32_t test_vmaxvq_f32(float32x4_t a) {
|
||||
return vmaxvq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define float @test_vminvq_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vminvq_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VMINVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret float [[VMINVQ_F32_I]]
|
||||
float32_t test_vminvq_f32(float32x4_t a) {
|
||||
return vminvq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define float @test_vmaxnmvq_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vmaxnmvq_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VMAXNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret float [[VMAXNMVQ_F32_I]]
|
||||
float32_t test_vmaxnmvq_f32(float32x4_t a) {
|
||||
return vmaxnmvq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define float @test_vminnmvq_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vminnmvq_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VMINNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret float [[VMINNMVQ_F32_I]]
|
||||
float32_t test_vminnmvq_f32(float32x4_t a) {
|
||||
|
||||
@ -8,35 +8,35 @@
|
||||
#include <arm_neon.h>
|
||||
|
||||
uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
|
||||
// CHECK-LABEL: define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: ret <2 x i32> [[RESULT]]
|
||||
return vdot_u32(a, b, c);
|
||||
}
|
||||
|
||||
uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
|
||||
// CHECK-LABEL: define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: ret <4 x i32> [[RESULT]]
|
||||
return vdotq_u32(a, b, c);
|
||||
}
|
||||
|
||||
int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
|
||||
// CHECK-LABEL: define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: ret <2 x i32> [[RESULT]]
|
||||
return vdot_s32(a, b, c);
|
||||
}
|
||||
|
||||
int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) {
|
||||
// CHECK-LABEL: define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: ret <4 x i32> [[RESULT]]
|
||||
return vdotq_s32(a, b, c);
|
||||
}
|
||||
|
||||
uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
|
||||
// CHECK-LABEL: define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
|
||||
@ -46,7 +46,7 @@ uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
|
||||
}
|
||||
|
||||
uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
|
||||
// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
|
||||
@ -56,7 +56,7 @@ uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
|
||||
}
|
||||
|
||||
uint32x2_t test_vdot_laneq_u32(uint32x2_t a, uint8x8_t b, uint8x16_t c) {
|
||||
// CHECK-LABEL: define <2 x i32> @test_vdot_laneq_u32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_laneq_u32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <2 x i32> <i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
|
||||
@ -66,7 +66,7 @@ uint32x2_t test_vdot_laneq_u32(uint32x2_t a, uint8x8_t b, uint8x16_t c) {
|
||||
}
|
||||
|
||||
uint32x4_t test_vdotq_laneq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
|
||||
// CHECK-LABEL: define <4 x i32> @test_vdotq_laneq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_laneq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
|
||||
@ -76,7 +76,7 @@ uint32x4_t test_vdotq_laneq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
|
||||
}
|
||||
|
||||
int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
|
||||
// CHECK-LABEL: define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
|
||||
@ -86,7 +86,7 @@ int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
|
||||
}
|
||||
|
||||
int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) {
|
||||
// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
|
||||
@ -96,7 +96,7 @@ int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) {
|
||||
}
|
||||
|
||||
int32x2_t test_vdot_laneq_s32(int32x2_t a, int8x8_t b, int8x16_t c) {
|
||||
// CHECK-LABEL: define <2 x i32> @test_vdot_laneq_s32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_laneq_s32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <2 x i32> <i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
|
||||
@ -106,7 +106,7 @@ int32x2_t test_vdot_laneq_s32(int32x2_t a, int8x8_t b, int8x16_t c) {
|
||||
}
|
||||
|
||||
int32x4_t test_vdotq_laneq_s32(int32x4_t a, int8x16_t b, int8x16_t c) {
|
||||
// CHECK-LABEL: define <4 x i32> @test_vdotq_laneq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_laneq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
|
||||
|
||||
@ -6,14 +6,14 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vext_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
|
||||
// CHECK: ret <8 x i8> [[VEXT]]
|
||||
int8x8_t test_vext_s8(int8x8_t a, int8x8_t b) {
|
||||
return vext_s8(a, b, 2);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vext_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_s16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
|
||||
@ -24,7 +24,7 @@ int16x4_t test_vext_s16(int16x4_t a, int16x4_t b) {
|
||||
return vext_s16(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vext_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vext_s32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
|
||||
@ -35,7 +35,7 @@ int32x2_t test_vext_s32(int32x2_t a, int32x2_t b) {
|
||||
return vext_s32(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vext_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vext_s64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
|
||||
@ -46,14 +46,14 @@ int64x1_t test_vext_s64(int64x1_t a, int64x1_t b) {
|
||||
return vext_s64(a, b, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vextq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
|
||||
// CHECK: ret <16 x i8> [[VEXT]]
|
||||
int8x16_t test_vextq_s8(int8x16_t a, int8x16_t b) {
|
||||
return vextq_s8(a, b, 2);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vextq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
|
||||
@ -64,7 +64,7 @@ int16x8_t test_vextq_s16(int16x8_t a, int16x8_t b) {
|
||||
return vextq_s16(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vextq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vextq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
|
||||
@ -75,7 +75,7 @@ int32x4_t test_vextq_s32(int32x4_t a, int32x4_t b) {
|
||||
return vextq_s32(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vextq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vextq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
|
||||
@ -86,14 +86,14 @@ int64x2_t test_vextq_s64(int64x2_t a, int64x2_t b) {
|
||||
return vextq_s64(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vext_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
|
||||
// CHECK: ret <8 x i8> [[VEXT]]
|
||||
uint8x8_t test_vext_u8(uint8x8_t a, uint8x8_t b) {
|
||||
return vext_u8(a, b, 2);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vext_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_u16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
|
||||
@ -104,7 +104,7 @@ uint16x4_t test_vext_u16(uint16x4_t a, uint16x4_t b) {
|
||||
return vext_u16(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vext_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vext_u32(<2 x i32> %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
|
||||
@ -115,7 +115,7 @@ uint32x2_t test_vext_u32(uint32x2_t a, uint32x2_t b) {
|
||||
return vext_u32(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vext_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vext_u64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
|
||||
@ -126,14 +126,14 @@ uint64x1_t test_vext_u64(uint64x1_t a, uint64x1_t b) {
|
||||
return vext_u64(a, b, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vextq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
|
||||
// CHECK: ret <16 x i8> [[VEXT]]
|
||||
uint8x16_t test_vextq_u8(uint8x16_t a, uint8x16_t b) {
|
||||
return vextq_u8(a, b, 2);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vextq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
|
||||
@ -144,7 +144,7 @@ uint16x8_t test_vextq_u16(uint16x8_t a, uint16x8_t b) {
|
||||
return vextq_u16(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vextq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vextq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
|
||||
@ -155,7 +155,7 @@ uint32x4_t test_vextq_u32(uint32x4_t a, uint32x4_t b) {
|
||||
return vextq_u32(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vextq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vextq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
|
||||
@ -166,7 +166,7 @@ uint64x2_t test_vextq_u64(uint64x2_t a, uint64x2_t b) {
|
||||
return vextq_u64(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vext_f32(<2 x float> %a, <2 x float> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vext_f32(<2 x float> %a, <2 x float> %b) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
|
||||
@ -177,7 +177,7 @@ float32x2_t test_vext_f32(float32x2_t a, float32x2_t b) {
|
||||
return vext_f32(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vext_f64(<1 x double> %a, <1 x double> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vext_f64(<1 x double> %a, <1 x double> %b) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x double>
|
||||
@ -188,7 +188,7 @@ float64x1_t test_vext_f64(float64x1_t a, float64x1_t b) {
|
||||
return vext_f64(a, b, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vextq_f32(<4 x float> %a, <4 x float> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vextq_f32(<4 x float> %a, <4 x float> %b) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
|
||||
@ -199,7 +199,7 @@ float32x4_t test_vextq_f32(float32x4_t a, float32x4_t b) {
|
||||
return vextq_f32(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x double> @test_vextq_f64(<2 x double> %a, <2 x double> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x double> @test_vextq_f64(<2 x double> %a, <2 x double> %b) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x double>
|
||||
@ -210,14 +210,14 @@ float64x2_t test_vextq_f64(float64x2_t a, float64x2_t b) {
|
||||
return vextq_f64(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vext_p8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vext_p8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
|
||||
// CHECK: ret <8 x i8> [[VEXT]]
|
||||
poly8x8_t test_vext_p8(poly8x8_t a, poly8x8_t b) {
|
||||
return vext_p8(a, b, 2);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vext_p16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vext_p16(<4 x i16> %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
|
||||
@ -228,14 +228,14 @@ poly16x4_t test_vext_p16(poly16x4_t a, poly16x4_t b) {
|
||||
return vext_p16(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vextq_p8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vextq_p8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
|
||||
// CHECK: ret <16 x i8> [[VEXT]]
|
||||
poly8x16_t test_vextq_p8(poly8x16_t a, poly8x16_t b) {
|
||||
return vextq_p8(a, b, 2);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vextq_p16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vextq_p16(<8 x i16> %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
|
||||
|
||||
@ -5,147 +5,147 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define float @test_vcvtxd_f32_f64(double %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vcvtxd_f32_f64(double %a) #0 {
|
||||
// CHECK: [[VCVTXD_F32_F64_I:%.*]] = call float @llvm.aarch64.sisd.fcvtxn(double %a) #2
|
||||
// CHECK: ret float [[VCVTXD_F32_F64_I]]
|
||||
float32_t test_vcvtxd_f32_f64(float64_t a) {
|
||||
return (float32_t)vcvtxd_f32_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vcvtas_s32_f32(float %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vcvtas_s32_f32(float %a) #0 {
|
||||
// CHECK: [[VCVTAS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f32(float %a) #2
|
||||
// CHECK: ret i32 [[VCVTAS_S32_F32_I]]
|
||||
int32_t test_vcvtas_s32_f32(float32_t a) {
|
||||
return (int32_t)vcvtas_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_test_vcvtad_s64_f64(double %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_test_vcvtad_s64_f64(double %a) #0 {
|
||||
// CHECK: [[VCVTAD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtas.i64.f64(double %a) #2
|
||||
// CHECK: ret i64 [[VCVTAD_S64_F64_I]]
|
||||
int64_t test_test_vcvtad_s64_f64(float64_t a) {
|
||||
return (int64_t)vcvtad_s64_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vcvtas_u32_f32(float %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vcvtas_u32_f32(float %a) #0 {
|
||||
// CHECK: [[VCVTAS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f32(float %a) #2
|
||||
// CHECK: ret i32 [[VCVTAS_U32_F32_I]]
|
||||
uint32_t test_vcvtas_u32_f32(float32_t a) {
|
||||
return (uint32_t)vcvtas_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vcvtad_u64_f64(double %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vcvtad_u64_f64(double %a) #0 {
|
||||
// CHECK: [[VCVTAD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtau.i64.f64(double %a) #2
|
||||
// CHECK: ret i64 [[VCVTAD_U64_F64_I]]
|
||||
uint64_t test_vcvtad_u64_f64(float64_t a) {
|
||||
return (uint64_t)vcvtad_u64_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vcvtms_s32_f32(float %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vcvtms_s32_f32(float %a) #0 {
|
||||
// CHECK: [[VCVTMS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float %a) #2
|
||||
// CHECK: ret i32 [[VCVTMS_S32_F32_I]]
|
||||
int32_t test_vcvtms_s32_f32(float32_t a) {
|
||||
return (int32_t)vcvtms_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vcvtmd_s64_f64(double %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vcvtmd_s64_f64(double %a) #0 {
|
||||
// CHECK: [[VCVTMD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double %a) #2
|
||||
// CHECK: ret i64 [[VCVTMD_S64_F64_I]]
|
||||
int64_t test_vcvtmd_s64_f64(float64_t a) {
|
||||
return (int64_t)vcvtmd_s64_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vcvtms_u32_f32(float %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vcvtms_u32_f32(float %a) #0 {
|
||||
// CHECK: [[VCVTMS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float %a) #2
|
||||
// CHECK: ret i32 [[VCVTMS_U32_F32_I]]
|
||||
uint32_t test_vcvtms_u32_f32(float32_t a) {
|
||||
return (uint32_t)vcvtms_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vcvtmd_u64_f64(double %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vcvtmd_u64_f64(double %a) #0 {
|
||||
// CHECK: [[VCVTMD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double %a) #2
|
||||
// CHECK: ret i64 [[VCVTMD_U64_F64_I]]
|
||||
uint64_t test_vcvtmd_u64_f64(float64_t a) {
|
||||
return (uint64_t)vcvtmd_u64_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vcvtns_s32_f32(float %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vcvtns_s32_f32(float %a) #0 {
|
||||
// CHECK: [[VCVTNS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f32(float %a) #2
|
||||
// CHECK: ret i32 [[VCVTNS_S32_F32_I]]
|
||||
int32_t test_vcvtns_s32_f32(float32_t a) {
|
||||
return (int32_t)vcvtns_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vcvtnd_s64_f64(double %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vcvtnd_s64_f64(double %a) #0 {
|
||||
// CHECK: [[VCVTND_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtns.i64.f64(double %a) #2
|
||||
// CHECK: ret i64 [[VCVTND_S64_F64_I]]
|
||||
int64_t test_vcvtnd_s64_f64(float64_t a) {
|
||||
return (int64_t)vcvtnd_s64_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vcvtns_u32_f32(float %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vcvtns_u32_f32(float %a) #0 {
|
||||
// CHECK: [[VCVTNS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float %a) #2
|
||||
// CHECK: ret i32 [[VCVTNS_U32_F32_I]]
|
||||
uint32_t test_vcvtns_u32_f32(float32_t a) {
|
||||
return (uint32_t)vcvtns_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vcvtnd_u64_f64(double %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vcvtnd_u64_f64(double %a) #0 {
|
||||
// CHECK: [[VCVTND_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double %a) #2
|
||||
// CHECK: ret i64 [[VCVTND_U64_F64_I]]
|
||||
uint64_t test_vcvtnd_u64_f64(float64_t a) {
|
||||
return (uint64_t)vcvtnd_u64_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vcvtps_s32_f32(float %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vcvtps_s32_f32(float %a) #0 {
|
||||
// CHECK: [[VCVTPS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float %a) #2
|
||||
// CHECK: ret i32 [[VCVTPS_S32_F32_I]]
|
||||
int32_t test_vcvtps_s32_f32(float32_t a) {
|
||||
return (int32_t)vcvtps_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vcvtpd_s64_f64(double %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vcvtpd_s64_f64(double %a) #0 {
|
||||
// CHECK: [[VCVTPD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double %a) #2
|
||||
// CHECK: ret i64 [[VCVTPD_S64_F64_I]]
|
||||
int64_t test_vcvtpd_s64_f64(float64_t a) {
|
||||
return (int64_t)vcvtpd_s64_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vcvtps_u32_f32(float %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vcvtps_u32_f32(float %a) #0 {
|
||||
// CHECK: [[VCVTPS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float %a) #2
|
||||
// CHECK: ret i32 [[VCVTPS_U32_F32_I]]
|
||||
uint32_t test_vcvtps_u32_f32(float32_t a) {
|
||||
return (uint32_t)vcvtps_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vcvtpd_u64_f64(double %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vcvtpd_u64_f64(double %a) #0 {
|
||||
// CHECK: [[VCVTPD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double %a) #2
|
||||
// CHECK: ret i64 [[VCVTPD_U64_F64_I]]
|
||||
uint64_t test_vcvtpd_u64_f64(float64_t a) {
|
||||
return (uint64_t)vcvtpd_u64_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vcvts_s32_f32(float %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vcvts_s32_f32(float %a) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = call i32 @llvm.aarch64.neon.fcvtzs.i32.f32(float %a)
|
||||
// CHECK: ret i32 [[TMP0]]
|
||||
int32_t test_vcvts_s32_f32(float32_t a) {
|
||||
return (int32_t)vcvts_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vcvtd_s64_f64(double %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vcvtd_s64_f64(double %a) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = call i64 @llvm.aarch64.neon.fcvtzs.i64.f64(double %a)
|
||||
// CHECK: ret i64 [[TMP0]]
|
||||
int64_t test_vcvtd_s64_f64(float64_t a) {
|
||||
return (int64_t)vcvtd_s64_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vcvts_u32_f32(float %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vcvts_u32_f32(float %a) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = call i32 @llvm.aarch64.neon.fcvtzu.i32.f32(float %a)
|
||||
// CHECK: ret i32 [[TMP0]]
|
||||
uint32_t test_vcvts_u32_f32(float32_t a) {
|
||||
return (uint32_t)vcvts_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vcvtd_u64_f64(double %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vcvtd_u64_f64(double %a) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = call i64 @llvm.aarch64.neon.fcvtzu.i64.f64(double %a)
|
||||
// CHECK: ret i64 [[TMP0]]
|
||||
uint64_t test_vcvtd_u64_f64(float64_t a) {
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vmla_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0
|
||||
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1
|
||||
// CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]]
|
||||
@ -14,7 +14,7 @@ float32x2_t test_vmla_n_f32(float32x2_t a, float32x2_t b, float32_t c) {
|
||||
return vmla_n_f32(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vmlaq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0
|
||||
// CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1
|
||||
// CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2
|
||||
@ -26,7 +26,7 @@ float32x4_t test_vmlaq_n_f32(float32x4_t a, float32x4_t b, float32_t c) {
|
||||
return vmlaq_n_f32(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vmlsq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0
|
||||
// CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1
|
||||
// CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2
|
||||
@ -38,7 +38,7 @@ float32x4_t test_vmlsq_n_f32(float32x4_t a, float32x4_t b, float32_t c) {
|
||||
return vmlsq_n_f32(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vmls_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0
|
||||
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1
|
||||
// CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]]
|
||||
@ -48,7 +48,7 @@ float32x2_t test_vmls_n_f32(float32x2_t a, float32x2_t b, float32_t c) {
|
||||
return vmls_n_f32(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vmla_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> zeroinitializer
|
||||
@ -59,7 +59,7 @@ float32x2_t test_vmla_lane_f32_0(float32x2_t a, float32x2_t b, float32x2_t v) {
|
||||
return vmla_lane_f32(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vmlaq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> zeroinitializer
|
||||
@ -70,7 +70,7 @@ float32x4_t test_vmlaq_lane_f32_0(float32x4_t a, float32x4_t b, float32x2_t v) {
|
||||
return vmlaq_lane_f32(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vmla_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> zeroinitializer
|
||||
@ -81,7 +81,7 @@ float32x2_t test_vmla_laneq_f32_0(float32x2_t a, float32x2_t b, float32x4_t v) {
|
||||
return vmla_laneq_f32(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> zeroinitializer
|
||||
@ -92,7 +92,7 @@ float32x4_t test_vmlaq_laneq_f32_0(float32x4_t a, float32x4_t b, float32x4_t v)
|
||||
return vmlaq_laneq_f32(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vmls_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> zeroinitializer
|
||||
@ -103,7 +103,7 @@ float32x2_t test_vmls_lane_f32_0(float32x2_t a, float32x2_t b, float32x2_t v) {
|
||||
return vmls_lane_f32(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vmlsq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> zeroinitializer
|
||||
@ -114,7 +114,7 @@ float32x4_t test_vmlsq_lane_f32_0(float32x4_t a, float32x4_t b, float32x2_t v) {
|
||||
return vmlsq_lane_f32(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vmls_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> zeroinitializer
|
||||
@ -125,7 +125,7 @@ float32x2_t test_vmls_laneq_f32_0(float32x2_t a, float32x2_t b, float32x4_t v) {
|
||||
return vmls_laneq_f32(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> zeroinitializer
|
||||
@ -136,7 +136,7 @@ float32x4_t test_vmlsq_laneq_f32_0(float32x4_t a, float32x4_t b, float32x4_t v)
|
||||
return vmlsq_laneq_f32(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vmla_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> <i32 1, i32 1>
|
||||
@ -147,7 +147,7 @@ float32x2_t test_vmla_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) {
|
||||
return vmla_lane_f32(a, b, v, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vmlaq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> <i32 1, i32 1, i32 1, i32 1>
|
||||
@ -158,7 +158,7 @@ float32x4_t test_vmlaq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) {
|
||||
return vmlaq_lane_f32(a, b, v, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vmla_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmla_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> <i32 3, i32 3>
|
||||
@ -169,7 +169,7 @@ float32x2_t test_vmla_laneq_f32(float32x2_t a, float32x2_t b, float32x4_t v) {
|
||||
return vmla_laneq_f32(a, b, v, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vmlaq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlaq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> <i32 3, i32 3, i32 3, i32 3>
|
||||
@ -180,7 +180,7 @@ float32x4_t test_vmlaq_laneq_f32(float32x4_t a, float32x4_t b, float32x4_t v) {
|
||||
return vmlaq_laneq_f32(a, b, v, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vmls_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <2 x i32> <i32 1, i32 1>
|
||||
@ -191,7 +191,7 @@ float32x2_t test_vmls_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) {
|
||||
return vmls_lane_f32(a, b, v, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vmlsq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> [[V:%.*]] to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> [[TMP1]], <4 x i32> <i32 1, i32 1, i32 1, i32 1>
|
||||
@ -202,7 +202,7 @@ float32x2_t test_vmls_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) {
|
||||
float32x4_t test_vmlsq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) {
|
||||
return vmlsq_lane_f32(a, b, v, 1);
|
||||
}
|
||||
// CHECK-LABEL: define <2 x float> @test_vmls_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmls_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <2 x i32> <i32 3, i32 3>
|
||||
@ -213,7 +213,7 @@ float32x2_t test_vmls_laneq_f32(float32x2_t a, float32x2_t b, float32x4_t v) {
|
||||
return vmls_laneq_f32(a, b, v, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vmlsq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmlsq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> [[V:%.*]] to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> [[TMP1]], <4 x i32> <i32 3, i32 3, i32 3, i32 3>
|
||||
@ -224,7 +224,7 @@ float32x4_t test_vmlsq_laneq_f32(float32x4_t a, float32x4_t b, float32x4_t v) {
|
||||
return vmlsq_laneq_f32(a, b, v, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x double> @test_vfmaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x double> @test_vfmaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0
|
||||
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1
|
||||
// CHECK: [[TMP6:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %b, <2 x double> [[VECINIT1_I]], <2 x double> %a)
|
||||
@ -233,7 +233,7 @@ float64x2_t test_vfmaq_n_f64(float64x2_t a, float64x2_t b, float64_t c) {
|
||||
return vfmaq_n_f64(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x double> @test_vfmsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x double> @test_vfmsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
|
||||
// CHECK: [[SUB_I:%.*]] = fneg <2 x double> %b
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0
|
||||
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -3,7 +3,7 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define float @test_vdups_lane_f32(<2 x float> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vdups_lane_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VDUPS_LANE:%.*]] = extractelement <2 x float> %a, i32 1
|
||||
// CHECK: ret float [[VDUPS_LANE]]
|
||||
float32_t test_vdups_lane_f32(float32x2_t a) {
|
||||
@ -11,7 +11,7 @@ float32_t test_vdups_lane_f32(float32x2_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define double @test_vdupd_lane_f64(<1 x double> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} double @test_vdupd_lane_f64(<1 x double> %a) #0 {
|
||||
// CHECK: [[VDUPD_LANE:%.*]] = extractelement <1 x double> %a, i32 0
|
||||
// CHECK: ret double [[VDUPD_LANE]]
|
||||
float64_t test_vdupd_lane_f64(float64x1_t a) {
|
||||
@ -19,7 +19,7 @@ float64_t test_vdupd_lane_f64(float64x1_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define float @test_vdups_laneq_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vdups_laneq_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a, i32 3
|
||||
// CHECK: ret float [[VGETQ_LANE]]
|
||||
float32_t test_vdups_laneq_f32(float32x4_t a) {
|
||||
@ -27,7 +27,7 @@ float32_t test_vdups_laneq_f32(float32x4_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define double @test_vdupd_laneq_f64(<2 x double> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} double @test_vdupd_laneq_f64(<2 x double> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %a, i32 1
|
||||
// CHECK: ret double [[VGETQ_LANE]]
|
||||
float64_t test_vdupd_laneq_f64(float64x2_t a) {
|
||||
@ -35,7 +35,7 @@ float64_t test_vdupd_laneq_f64(float64x2_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vdupb_lane_s8(<8 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_s8(<8 x i8> %a) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
|
||||
// CHECK: ret i8 [[VGET_LANE]]
|
||||
int8_t test_vdupb_lane_s8(int8x8_t a) {
|
||||
@ -43,7 +43,7 @@ int8_t test_vdupb_lane_s8(int8x8_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vduph_lane_s16(<4 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_s16(<4 x i16> %a) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
|
||||
// CHECK: ret i16 [[VGET_LANE]]
|
||||
int16_t test_vduph_lane_s16(int16x4_t a) {
|
||||
@ -51,7 +51,7 @@ int16_t test_vduph_lane_s16(int16x4_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vdups_lane_s32(<2 x i32> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vdups_lane_s32(<2 x i32> %a) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1
|
||||
// CHECK: ret i32 [[VGET_LANE]]
|
||||
int32_t test_vdups_lane_s32(int32x2_t a) {
|
||||
@ -59,7 +59,7 @@ int32_t test_vdups_lane_s32(int32x2_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vdupd_lane_s64(<1 x i64> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vdupd_lane_s64(<1 x i64> %a) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0
|
||||
// CHECK: ret i64 [[VGET_LANE]]
|
||||
int64_t test_vdupd_lane_s64(int64x1_t a) {
|
||||
@ -67,7 +67,7 @@ int64_t test_vdupd_lane_s64(int64x1_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vdupb_lane_u8(<8 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_u8(<8 x i8> %a) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
|
||||
// CHECK: ret i8 [[VGET_LANE]]
|
||||
uint8_t test_vdupb_lane_u8(uint8x8_t a) {
|
||||
@ -75,7 +75,7 @@ uint8_t test_vdupb_lane_u8(uint8x8_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vduph_lane_u16(<4 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_u16(<4 x i16> %a) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
|
||||
// CHECK: ret i16 [[VGET_LANE]]
|
||||
uint16_t test_vduph_lane_u16(uint16x4_t a) {
|
||||
@ -83,7 +83,7 @@ uint16_t test_vduph_lane_u16(uint16x4_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vdups_lane_u32(<2 x i32> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vdups_lane_u32(<2 x i32> %a) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1
|
||||
// CHECK: ret i32 [[VGET_LANE]]
|
||||
uint32_t test_vdups_lane_u32(uint32x2_t a) {
|
||||
@ -91,14 +91,14 @@ uint32_t test_vdups_lane_u32(uint32x2_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vdupd_lane_u64(<1 x i64> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vdupd_lane_u64(<1 x i64> %a) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0
|
||||
// CHECK: ret i64 [[VGET_LANE]]
|
||||
uint64_t test_vdupd_lane_u64(uint64x1_t a) {
|
||||
return vdupd_lane_u64(a, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vdupb_laneq_s8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_s8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
|
||||
// CHECK: ret i8 [[VGETQ_LANE]]
|
||||
int8_t test_vdupb_laneq_s8(int8x16_t a) {
|
||||
@ -106,7 +106,7 @@ int8_t test_vdupb_laneq_s8(int8x16_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vduph_laneq_s16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_s16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
|
||||
// CHECK: ret i16 [[VGETQ_LANE]]
|
||||
int16_t test_vduph_laneq_s16(int16x8_t a) {
|
||||
@ -114,7 +114,7 @@ int16_t test_vduph_laneq_s16(int16x8_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vdups_laneq_s32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vdups_laneq_s32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3
|
||||
// CHECK: ret i32 [[VGETQ_LANE]]
|
||||
int32_t test_vdups_laneq_s32(int32x4_t a) {
|
||||
@ -122,7 +122,7 @@ int32_t test_vdups_laneq_s32(int32x4_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vdupd_laneq_s64(<2 x i64> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vdupd_laneq_s64(<2 x i64> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1
|
||||
// CHECK: ret i64 [[VGETQ_LANE]]
|
||||
int64_t test_vdupd_laneq_s64(int64x2_t a) {
|
||||
@ -130,7 +130,7 @@ int64_t test_vdupd_laneq_s64(int64x2_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vdupb_laneq_u8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_u8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
|
||||
// CHECK: ret i8 [[VGETQ_LANE]]
|
||||
uint8_t test_vdupb_laneq_u8(uint8x16_t a) {
|
||||
@ -138,7 +138,7 @@ uint8_t test_vdupb_laneq_u8(uint8x16_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vduph_laneq_u16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_u16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
|
||||
// CHECK: ret i16 [[VGETQ_LANE]]
|
||||
uint16_t test_vduph_laneq_u16(uint16x8_t a) {
|
||||
@ -146,7 +146,7 @@ uint16_t test_vduph_laneq_u16(uint16x8_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vdups_laneq_u32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vdups_laneq_u32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3
|
||||
// CHECK: ret i32 [[VGETQ_LANE]]
|
||||
uint32_t test_vdups_laneq_u32(uint32x4_t a) {
|
||||
@ -154,35 +154,35 @@ uint32_t test_vdups_laneq_u32(uint32x4_t a) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vdupd_laneq_u64(<2 x i64> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vdupd_laneq_u64(<2 x i64> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1
|
||||
// CHECK: ret i64 [[VGETQ_LANE]]
|
||||
uint64_t test_vdupd_laneq_u64(uint64x2_t a) {
|
||||
return vdupd_laneq_u64(a, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vdupb_lane_p8(<8 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_lane_p8(<8 x i8> %a) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
|
||||
// CHECK: ret i8 [[VGET_LANE]]
|
||||
poly8_t test_vdupb_lane_p8(poly8x8_t a) {
|
||||
return vdupb_lane_p8(a, 7);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vduph_lane_p16(<4 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vduph_lane_p16(<4 x i16> %a) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
|
||||
// CHECK: ret i16 [[VGET_LANE]]
|
||||
poly16_t test_vduph_lane_p16(poly16x4_t a) {
|
||||
return vduph_lane_p16(a, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8 @test_vdupb_laneq_p8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i8 @test_vdupb_laneq_p8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
|
||||
// CHECK: ret i8 [[VGETQ_LANE]]
|
||||
poly8_t test_vdupb_laneq_p8(poly8x16_t a) {
|
||||
return vdupb_laneq_p8(a, 15);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vduph_laneq_p16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vduph_laneq_p16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
|
||||
// CHECK: ret i16 [[VGETQ_LANE]]
|
||||
poly16_t test_vduph_laneq_p16(poly16x8_t a) {
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
#include <arm_neon.h>
|
||||
|
||||
|
||||
// CHECK-LABEL: define float @test_vmuls_lane_f32(float %a, <2 x float> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vmuls_lane_f32(float %a, <2 x float> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1
|
||||
// CHECK: [[MUL:%.*]] = fmul float %a, [[VGET_LANE]]
|
||||
// CHECK: ret float [[MUL]]
|
||||
@ -14,7 +14,7 @@ float32_t test_vmuls_lane_f32(float32_t a, float32x2_t b) {
|
||||
return vmuls_lane_f32(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define double @test_vmuld_lane_f64(double %a, <1 x double> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} double @test_vmuld_lane_f64(double %a, <1 x double> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0
|
||||
// CHECK: [[MUL:%.*]] = fmul double %a, [[VGET_LANE]]
|
||||
// CHECK: ret double [[MUL]]
|
||||
@ -22,7 +22,7 @@ float64_t test_vmuld_lane_f64(float64_t a, float64x1_t b) {
|
||||
return vmuld_lane_f64(a, b, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define float @test_vmuls_laneq_f32(float %a, <4 x float> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vmuls_laneq_f32(float %a, <4 x float> %b) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3
|
||||
// CHECK: [[MUL:%.*]] = fmul float %a, [[VGETQ_LANE]]
|
||||
// CHECK: ret float [[MUL]]
|
||||
@ -30,7 +30,7 @@ float32_t test_vmuls_laneq_f32(float32_t a, float32x4_t b) {
|
||||
return vmuls_laneq_f32(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define double @test_vmuld_laneq_f64(double %a, <2 x double> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} double @test_vmuld_laneq_f64(double %a, <2 x double> %b) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1
|
||||
// CHECK: [[MUL:%.*]] = fmul double %a, [[VGETQ_LANE]]
|
||||
// CHECK: ret double [[MUL]]
|
||||
@ -38,7 +38,7 @@ float64_t test_vmuld_laneq_f64(float64_t a, float64x2_t b) {
|
||||
return vmuld_laneq_f64(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vmul_n_f64(<1 x double> %a, double %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vmul_n_f64(<1 x double> %a, double %b) #0 {
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <1 x double> %a to double
|
||||
// CHECK: [[TMP3:%.*]] = fmul double [[TMP2]], %b
|
||||
// CHECK: [[TMP4:%.*]] = bitcast double [[TMP3]] to <1 x double>
|
||||
@ -47,7 +47,7 @@ float64x1_t test_vmul_n_f64(float64x1_t a, float64_t b) {
|
||||
return vmul_n_f64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define float @test_vmulxs_lane_f32(float %a, <2 x float> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vmulxs_lane_f32(float %a, <2 x float> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1
|
||||
// CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGET_LANE]])
|
||||
// CHECK: ret float [[VMULXS_F32_I]]
|
||||
@ -55,7 +55,7 @@ float32_t test_vmulxs_lane_f32(float32_t a, float32x2_t b) {
|
||||
return vmulxs_lane_f32(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define float @test_vmulxs_laneq_f32(float %a, <4 x float> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vmulxs_laneq_f32(float %a, <4 x float> %b) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3
|
||||
// CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGETQ_LANE]])
|
||||
// CHECK: ret float [[VMULXS_F32_I]]
|
||||
@ -63,7 +63,7 @@ float32_t test_vmulxs_laneq_f32(float32_t a, float32x4_t b) {
|
||||
return vmulxs_laneq_f32(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define double @test_vmulxd_lane_f64(double %a, <1 x double> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} double @test_vmulxd_lane_f64(double %a, <1 x double> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0
|
||||
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGET_LANE]])
|
||||
// CHECK: ret double [[VMULXD_F64_I]]
|
||||
@ -71,7 +71,7 @@ float64_t test_vmulxd_lane_f64(float64_t a, float64x1_t b) {
|
||||
return vmulxd_lane_f64(a, b, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define double @test_vmulxd_laneq_f64(double %a, <2 x double> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} double @test_vmulxd_laneq_f64(double %a, <2 x double> %b) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1
|
||||
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGETQ_LANE]])
|
||||
// CHECK: ret double [[VMULXD_F64_I]]
|
||||
@ -79,7 +79,7 @@ float64_t test_vmulxd_laneq_f64(float64_t a, float64x2_t b) {
|
||||
return vmulxd_laneq_f64(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64(<1 x double> %a, <1 x double> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vmulx_lane_f64(<1 x double> %a, <1 x double> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0
|
||||
// CHECK: [[VGET_LANE6:%.*]] = extractelement <1 x double> %b, i32 0
|
||||
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGET_LANE6]])
|
||||
@ -90,7 +90,7 @@ float64x1_t test_vmulx_lane_f64(float64x1_t a, float64x1_t b) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_0(<1 x double> %a, <2 x double> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vmulx_laneq_f64_0(<1 x double> %a, <2 x double> %b) #1 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 0
|
||||
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]])
|
||||
@ -100,7 +100,7 @@ float64x1_t test_vmulx_laneq_f64_0(float64x1_t a, float64x2_t b) {
|
||||
return vmulx_laneq_f64(a, b, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_1(<1 x double> %a, <2 x double> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vmulx_laneq_f64_1(<1 x double> %a, <2 x double> %b) #1 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1
|
||||
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]])
|
||||
@ -111,7 +111,7 @@ float64x1_t test_vmulx_laneq_f64_1(float64x1_t a, float64x2_t b) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define float @test_vfmas_lane_f32(float %a, float %b, <2 x float> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vfmas_lane_f32(float %a, float %b, <2 x float> %c) #0 {
|
||||
// CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1
|
||||
// CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float %b, float [[EXTRACT]], float %a)
|
||||
// CHECK: ret float [[TMP2]]
|
||||
@ -119,7 +119,7 @@ float32_t test_vfmas_lane_f32(float32_t a, float32_t b, float32x2_t c) {
|
||||
return vfmas_lane_f32(a, b, c, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define double @test_vfmad_lane_f64(double %a, double %b, <1 x double> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} double @test_vfmad_lane_f64(double %a, double %b, <1 x double> %c) #0 {
|
||||
// CHECK: [[EXTRACT:%.*]] = extractelement <1 x double> %c, i32 0
|
||||
// CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a)
|
||||
// CHECK: ret double [[TMP2]]
|
||||
@ -127,7 +127,7 @@ float64_t test_vfmad_lane_f64(float64_t a, float64_t b, float64x1_t c) {
|
||||
return vfmad_lane_f64(a, b, c, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define double @test_vfmad_laneq_f64(double %a, double %b, <2 x double> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} double @test_vfmad_laneq_f64(double %a, double %b, <2 x double> %c) #1 {
|
||||
// CHECK: [[EXTRACT:%.*]] = extractelement <2 x double> %c, i32 1
|
||||
// CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a)
|
||||
// CHECK: ret double [[TMP2]]
|
||||
@ -135,7 +135,7 @@ float64_t test_vfmad_laneq_f64(float64_t a, float64_t b, float64x2_t c) {
|
||||
return vfmad_laneq_f64(a, b, c, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define float @test_vfmss_lane_f32(float %a, float %b, <2 x float> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} float @test_vfmss_lane_f32(float %a, float %b, <2 x float> %c) #0 {
|
||||
// CHECK: [[SUB:%.*]] = fneg float %b
|
||||
// CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1
|
||||
// CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float [[SUB]], float [[EXTRACT]], float %a)
|
||||
@ -144,7 +144,7 @@ float32_t test_vfmss_lane_f32(float32_t a, float32_t b, float32x2_t c) {
|
||||
return vfmss_lane_f32(a, b, c, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vfma_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vfma_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <1 x double> %v to <8 x i8>
|
||||
@ -158,7 +158,7 @@ float64x1_t test_vfma_lane_f64(float64x1_t a, float64x1_t b, float64x1_t v) {
|
||||
return vfma_lane_f64(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vfms_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vfms_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
|
||||
// CHECK: [[SUB:%.*]] = fneg <1 x double> %b
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8>
|
||||
@ -173,7 +173,7 @@ float64x1_t test_vfms_lane_f64(float64x1_t a, float64x1_t b, float64x1_t v) {
|
||||
return vfms_lane_f64(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vfma_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vfma_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8>
|
||||
@ -188,7 +188,7 @@ float64x1_t test_vfma_laneq_f64(float64x1_t a, float64x1_t b, float64x2_t v) {
|
||||
return vfma_laneq_f64(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vfms_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vfms_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
|
||||
// CHECK: [[SUB:%.*]] = fneg <1 x double> %b
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8>
|
||||
@ -204,7 +204,7 @@ float64x1_t test_vfms_laneq_f64(float64x1_t a, float64x1_t b, float64x2_t v) {
|
||||
return vfms_laneq_f64(a, b, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vqdmullh_lane_s16(i16 %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vqdmullh_lane_s16(i16 %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3
|
||||
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
|
||||
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
|
||||
@ -215,7 +215,7 @@ int32_t test_vqdmullh_lane_s16(int16_t a, int16x4_t b) {
|
||||
return vqdmullh_lane_s16(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vqdmulls_lane_s32(i32 %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vqdmulls_lane_s32(i32 %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1
|
||||
// CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGET_LANE]])
|
||||
// CHECK: ret i64 [[VQDMULLS_S32_I]]
|
||||
@ -223,7 +223,7 @@ int64_t test_vqdmulls_lane_s32(int32_t a, int32x2_t b) {
|
||||
return vqdmulls_lane_s32(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vqdmullh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vqdmullh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7
|
||||
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
|
||||
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
|
||||
@ -234,7 +234,7 @@ int32_t test_vqdmullh_laneq_s16(int16_t a, int16x8_t b) {
|
||||
return vqdmullh_laneq_s16(a, b, 7);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vqdmulls_laneq_s32(i32 %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vqdmulls_laneq_s32(i32 %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3
|
||||
// CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGETQ_LANE]])
|
||||
// CHECK: ret i64 [[VQDMULLS_S32_I]]
|
||||
@ -242,7 +242,7 @@ int64_t test_vqdmulls_laneq_s32(int32_t a, int32x4_t b) {
|
||||
return vqdmulls_laneq_s32(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vqdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vqdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3
|
||||
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
|
||||
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
|
||||
@ -253,7 +253,7 @@ int16_t test_vqdmulhh_lane_s16(int16_t a, int16x4_t b) {
|
||||
return vqdmulhh_lane_s16(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vqdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vqdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1
|
||||
// CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGET_LANE]])
|
||||
// CHECK: ret i32 [[VQDMULHS_S32_I]]
|
||||
@ -262,7 +262,7 @@ int32_t test_vqdmulhs_lane_s32(int32_t a, int32x2_t b) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vqdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vqdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7
|
||||
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
|
||||
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
|
||||
@ -274,7 +274,7 @@ int16_t test_vqdmulhh_laneq_s16(int16_t a, int16x8_t b) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vqdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vqdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3
|
||||
// CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGETQ_LANE]])
|
||||
// CHECK: ret i32 [[VQDMULHS_S32_I]]
|
||||
@ -282,7 +282,7 @@ int32_t test_vqdmulhs_laneq_s32(int32_t a, int32x4_t b) {
|
||||
return vqdmulhs_laneq_s32(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vqrdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vqrdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3
|
||||
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
|
||||
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
|
||||
@ -293,7 +293,7 @@ int16_t test_vqrdmulhh_lane_s16(int16_t a, int16x4_t b) {
|
||||
return vqrdmulhh_lane_s16(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vqrdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vqrdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1
|
||||
// CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGET_LANE]])
|
||||
// CHECK: ret i32 [[VQRDMULHS_S32_I]]
|
||||
@ -302,7 +302,7 @@ int32_t test_vqrdmulhs_lane_s32(int32_t a, int32x2_t b) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i16 @test_vqrdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i16 @test_vqrdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7
|
||||
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
|
||||
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
|
||||
@ -314,7 +314,7 @@ int16_t test_vqrdmulhh_laneq_s16(int16_t a, int16x8_t b) {
|
||||
}
|
||||
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vqrdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vqrdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3
|
||||
// CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGETQ_LANE]])
|
||||
// CHECK: ret i32 [[VQRDMULHS_S32_I]]
|
||||
@ -322,7 +322,7 @@ int32_t test_vqrdmulhs_laneq_s32(int32_t a, int32x4_t b) {
|
||||
return vqrdmulhs_laneq_s32(a, b, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vqdmlalh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vqdmlalh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
|
||||
// CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3
|
||||
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
|
||||
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
|
||||
@ -334,7 +334,7 @@ int32_t test_vqdmlalh_lane_s16(int32_t a, int16_t b, int16x4_t c) {
|
||||
return vqdmlalh_lane_s16(a, b, c, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vqdmlals_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vqdmlals_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
|
||||
// CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1
|
||||
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
|
||||
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]])
|
||||
@ -343,7 +343,7 @@ int64_t test_vqdmlals_lane_s32(int64_t a, int32_t b, int32x2_t c) {
|
||||
return vqdmlals_lane_s32(a, b, c, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vqdmlalh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vqdmlalh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
|
||||
// CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7
|
||||
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
|
||||
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
|
||||
@ -355,7 +355,7 @@ int32_t test_vqdmlalh_laneq_s16(int32_t a, int16_t b, int16x8_t c) {
|
||||
return vqdmlalh_laneq_s16(a, b, c, 7);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vqdmlals_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vqdmlals_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
|
||||
// CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3
|
||||
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
|
||||
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]])
|
||||
@ -364,7 +364,7 @@ int64_t test_vqdmlals_laneq_s32(int64_t a, int32_t b, int32x4_t c) {
|
||||
return vqdmlals_laneq_s32(a, b, c, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vqdmlslh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vqdmlslh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
|
||||
// CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3
|
||||
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
|
||||
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
|
||||
@ -376,7 +376,7 @@ int32_t test_vqdmlslh_lane_s16(int32_t a, int16_t b, int16x4_t c) {
|
||||
return vqdmlslh_lane_s16(a, b, c, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vqdmlsls_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vqdmlsls_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
|
||||
// CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1
|
||||
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
|
||||
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]])
|
||||
@ -385,7 +385,7 @@ int64_t test_vqdmlsls_lane_s32(int64_t a, int32_t b, int32x2_t c) {
|
||||
return vqdmlsls_lane_s32(a, b, c, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @test_vqdmlslh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i32 @test_vqdmlslh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
|
||||
// CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7
|
||||
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
|
||||
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
|
||||
@ -397,7 +397,7 @@ int32_t test_vqdmlslh_laneq_s16(int32_t a, int16_t b, int16x8_t c) {
|
||||
return vqdmlslh_laneq_s16(a, b, c, 7);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vqdmlsls_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vqdmlsls_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
|
||||
// CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3
|
||||
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
|
||||
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]])
|
||||
@ -406,7 +406,7 @@ int64_t test_vqdmlsls_laneq_s32(int64_t a, int32_t b, int32x4_t c) {
|
||||
return vqdmlsls_laneq_s32(a, b, c, 3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64_0() #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vmulx_lane_f64_0() #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double>
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> [[TMP0]], i32 0
|
||||
@ -425,7 +425,7 @@ float64x1_t test_vmulx_lane_f64_0() {
|
||||
return result;
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_2() #1 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vmulx_laneq_f64_2() #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double>
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> [[TMP0]], <1 x double> [[TMP1]], <2 x i32> <i32 0, i32 1>
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl1_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl1_s8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3
|
||||
// CHECK: ret <8 x i8> [[VTBL11_I]]
|
||||
@ -13,14 +13,14 @@ int8x8_t test_vtbl1_s8(int8x8_t a, int8x8_t b) {
|
||||
return vtbl1_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl1_s8(<16 x i8> %a, <8 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl1_s8(<16 x i8> %a, <8 x i8> %b) #1 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3
|
||||
// CHECK: ret <8 x i8> [[VTBL1_I]]
|
||||
int8x8_t test_vqtbl1_s8(int8x16_t a, uint8x8_t b) {
|
||||
return vqtbl1_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl2_s8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl2_s8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x2_t, align 8
|
||||
// CHECK: [[A:%.*]] = alloca %struct.int8x8x2_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[A]], i32 0, i32 0
|
||||
@ -42,7 +42,7 @@ int8x8_t test_vtbl2_s8(int8x8x2_t a, int8x8_t b) {
|
||||
return vtbl2_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl2_s8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl2_s8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x2_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.int8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[A]], i32 0, i32 0
|
||||
@ -63,7 +63,7 @@ int8x8_t test_vqtbl2_s8(int8x16x2_t a, uint8x8_t b) {
|
||||
return vqtbl2_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl3_s8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl3_s8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x3_t, align 8
|
||||
// CHECK: [[A:%.*]] = alloca %struct.int8x8x3_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[A]], i32 0, i32 0
|
||||
@ -89,7 +89,7 @@ int8x8_t test_vtbl3_s8(int8x8x3_t a, int8x8_t b) {
|
||||
return vtbl3_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl3_s8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl3_s8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x3_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.int8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[A]], i32 0, i32 0
|
||||
@ -113,7 +113,7 @@ int8x8_t test_vqtbl3_s8(int8x16x3_t a, uint8x8_t b) {
|
||||
return vqtbl3_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl4_s8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl4_s8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x4_t, align 8
|
||||
// CHECK: [[A:%.*]] = alloca %struct.int8x8x4_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[A]], i32 0, i32 0
|
||||
@ -142,7 +142,7 @@ int8x8_t test_vtbl4_s8(int8x8x4_t a, int8x8_t b) {
|
||||
return vtbl4_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl4_s8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl4_s8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x4_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.int8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[A]], i32 0, i32 0
|
||||
@ -169,14 +169,14 @@ int8x8_t test_vqtbl4_s8(int8x16x4_t a, uint8x8_t b) {
|
||||
return vqtbl4_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl1q_s8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3
|
||||
// CHECK: ret <16 x i8> [[VTBL1_I]]
|
||||
int8x16_t test_vqtbl1q_s8(int8x16_t a, int8x16_t b) {
|
||||
return vqtbl1q_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_s8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl2q_s8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x2_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.int8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[A]], i32 0, i32 0
|
||||
@ -197,7 +197,7 @@ int8x16_t test_vqtbl2q_s8(int8x16x2_t a, int8x16_t b) {
|
||||
return vqtbl2q_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_s8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl3q_s8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x3_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.int8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[A]], i32 0, i32 0
|
||||
@ -221,7 +221,7 @@ int8x16_t test_vqtbl3q_s8(int8x16x3_t a, int8x16_t b) {
|
||||
return vqtbl3q_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_s8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl4q_s8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x4_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.int8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[A]], i32 0, i32 0
|
||||
@ -248,7 +248,7 @@ int8x16_t test_vqtbl4q_s8(int8x16x4_t a, int8x16_t b) {
|
||||
return vqtbl4q_s8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx1_s8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx1_s8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3
|
||||
// CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>
|
||||
@ -262,7 +262,7 @@ int8x8_t test_vtbx1_s8(int8x8_t a, int8x8_t b, int8x8_t c) {
|
||||
return vtbx1_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx2_s8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx2_s8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x2_t, align 8
|
||||
// CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[B]], i32 0, i32 0
|
||||
@ -284,7 +284,7 @@ int8x8_t test_vtbx2_s8(int8x8_t a, int8x8x2_t b, int8x8_t c) {
|
||||
return vtbx2_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx3_s8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx3_s8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x3_t, align 8
|
||||
// CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[B]], i32 0, i32 0
|
||||
@ -316,7 +316,7 @@ int8x8_t test_vtbx3_s8(int8x8_t a, int8x8x3_t b, int8x8_t c) {
|
||||
return vtbx3_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx4_s8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx4_s8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x4_t, align 8
|
||||
// CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[B]], i32 0, i32 0
|
||||
@ -345,14 +345,14 @@ int8x8_t test_vtbx4_s8(int8x8_t a, int8x8x4_t b, int8x8_t c) {
|
||||
return vtbx4_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx1_s8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx1_s8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
|
||||
// CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3
|
||||
// CHECK: ret <8 x i8> [[VTBX1_I]]
|
||||
int8x8_t test_vqtbx1_s8(int8x8_t a, int8x16_t b, uint8x8_t c) {
|
||||
return vqtbx1_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx2_s8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx2_s8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x2_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0
|
||||
@ -373,7 +373,7 @@ int8x8_t test_vqtbx2_s8(int8x8_t a, int8x16x2_t b, uint8x8_t c) {
|
||||
return vqtbx2_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx3_s8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx3_s8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x3_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0
|
||||
@ -397,7 +397,7 @@ int8x8_t test_vqtbx3_s8(int8x8_t a, int8x16x3_t b, uint8x8_t c) {
|
||||
return vqtbx3_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx4_s8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx4_s8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x4_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0
|
||||
@ -424,14 +424,14 @@ int8x8_t test_vqtbx4_s8(int8x8_t a, int8x16x4_t b, uint8x8_t c) {
|
||||
return vqtbx4_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_s8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx1q_s8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
|
||||
// CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3
|
||||
// CHECK: ret <16 x i8> [[VTBX1_I]]
|
||||
int8x16_t test_vqtbx1q_s8(int8x16_t a, int8x16_t b, uint8x16_t c) {
|
||||
return vqtbx1q_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_s8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx2q_s8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x2_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0
|
||||
@ -452,7 +452,7 @@ int8x16_t test_vqtbx2q_s8(int8x16_t a, int8x16x2_t b, int8x16_t c) {
|
||||
return vqtbx2q_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_s8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx3q_s8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x3_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0
|
||||
@ -476,7 +476,7 @@ int8x16_t test_vqtbx3q_s8(int8x16_t a, int8x16x3_t b, int8x16_t c) {
|
||||
return vqtbx3q_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_s8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx4q_s8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x4_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0
|
||||
@ -503,7 +503,7 @@ int8x16_t test_vqtbx4q_s8(int8x16_t a, int8x16x4_t b, int8x16_t c) {
|
||||
return vqtbx4q_s8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl1_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl1_u8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3
|
||||
// CHECK: ret <8 x i8> [[VTBL11_I]]
|
||||
@ -511,14 +511,14 @@ uint8x8_t test_vtbl1_u8(uint8x8_t a, uint8x8_t b) {
|
||||
return vtbl1_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl1_u8(<16 x i8> %a, <8 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl1_u8(<16 x i8> %a, <8 x i8> %b) #1 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3
|
||||
// CHECK: ret <8 x i8> [[VTBL1_I]]
|
||||
uint8x8_t test_vqtbl1_u8(uint8x16_t a, uint8x8_t b) {
|
||||
return vqtbl1_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl2_u8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl2_u8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x2_t, align 8
|
||||
// CHECK: [[A:%.*]] = alloca %struct.uint8x8x2_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[A]], i32 0, i32 0
|
||||
@ -540,7 +540,7 @@ uint8x8_t test_vtbl2_u8(uint8x8x2_t a, uint8x8_t b) {
|
||||
return vtbl2_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl2_u8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl2_u8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[A]], i32 0, i32 0
|
||||
@ -561,7 +561,7 @@ uint8x8_t test_vqtbl2_u8(uint8x16x2_t a, uint8x8_t b) {
|
||||
return vqtbl2_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl3_u8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl3_u8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x3_t, align 8
|
||||
// CHECK: [[A:%.*]] = alloca %struct.uint8x8x3_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[A]], i32 0, i32 0
|
||||
@ -587,7 +587,7 @@ uint8x8_t test_vtbl3_u8(uint8x8x3_t a, uint8x8_t b) {
|
||||
return vtbl3_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl3_u8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl3_u8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[A]], i32 0, i32 0
|
||||
@ -611,7 +611,7 @@ uint8x8_t test_vqtbl3_u8(uint8x16x3_t a, uint8x8_t b) {
|
||||
return vqtbl3_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl4_u8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl4_u8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x4_t, align 8
|
||||
// CHECK: [[A:%.*]] = alloca %struct.uint8x8x4_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[A]], i32 0, i32 0
|
||||
@ -640,7 +640,7 @@ uint8x8_t test_vtbl4_u8(uint8x8x4_t a, uint8x8_t b) {
|
||||
return vtbl4_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl4_u8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl4_u8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[A]], i32 0, i32 0
|
||||
@ -667,14 +667,14 @@ uint8x8_t test_vqtbl4_u8(uint8x16x4_t a, uint8x8_t b) {
|
||||
return vqtbl4_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl1q_u8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3
|
||||
// CHECK: ret <16 x i8> [[VTBL1_I]]
|
||||
uint8x16_t test_vqtbl1q_u8(uint8x16_t a, uint8x16_t b) {
|
||||
return vqtbl1q_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_u8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl2q_u8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[A]], i32 0, i32 0
|
||||
@ -695,7 +695,7 @@ uint8x16_t test_vqtbl2q_u8(uint8x16x2_t a, uint8x16_t b) {
|
||||
return vqtbl2q_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_u8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl3q_u8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[A]], i32 0, i32 0
|
||||
@ -719,7 +719,7 @@ uint8x16_t test_vqtbl3q_u8(uint8x16x3_t a, uint8x16_t b) {
|
||||
return vqtbl3q_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_u8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl4q_u8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[A]], i32 0, i32 0
|
||||
@ -746,7 +746,7 @@ uint8x16_t test_vqtbl4q_u8(uint8x16x4_t a, uint8x16_t b) {
|
||||
return vqtbl4q_u8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx1_u8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx1_u8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3
|
||||
// CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>
|
||||
@ -760,7 +760,7 @@ uint8x8_t test_vtbx1_u8(uint8x8_t a, uint8x8_t b, uint8x8_t c) {
|
||||
return vtbx1_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx2_u8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx2_u8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x2_t, align 8
|
||||
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[B]], i32 0, i32 0
|
||||
@ -782,7 +782,7 @@ uint8x8_t test_vtbx2_u8(uint8x8_t a, uint8x8x2_t b, uint8x8_t c) {
|
||||
return vtbx2_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx3_u8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx3_u8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x3_t, align 8
|
||||
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[B]], i32 0, i32 0
|
||||
@ -814,7 +814,7 @@ uint8x8_t test_vtbx3_u8(uint8x8_t a, uint8x8x3_t b, uint8x8_t c) {
|
||||
return vtbx3_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx4_u8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx4_u8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x4_t, align 8
|
||||
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[B]], i32 0, i32 0
|
||||
@ -843,14 +843,14 @@ uint8x8_t test_vtbx4_u8(uint8x8_t a, uint8x8x4_t b, uint8x8_t c) {
|
||||
return vtbx4_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx1_u8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx1_u8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
|
||||
// CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3
|
||||
// CHECK: ret <8 x i8> [[VTBX1_I]]
|
||||
uint8x8_t test_vqtbx1_u8(uint8x8_t a, uint8x16_t b, uint8x8_t c) {
|
||||
return vqtbx1_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx2_u8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx2_u8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0
|
||||
@ -871,7 +871,7 @@ uint8x8_t test_vqtbx2_u8(uint8x8_t a, uint8x16x2_t b, uint8x8_t c) {
|
||||
return vqtbx2_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx3_u8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx3_u8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0
|
||||
@ -895,7 +895,7 @@ uint8x8_t test_vqtbx3_u8(uint8x8_t a, uint8x16x3_t b, uint8x8_t c) {
|
||||
return vqtbx3_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx4_u8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx4_u8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0
|
||||
@ -922,14 +922,14 @@ uint8x8_t test_vqtbx4_u8(uint8x8_t a, uint8x16x4_t b, uint8x8_t c) {
|
||||
return vqtbx4_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_u8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx1q_u8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
|
||||
// CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3
|
||||
// CHECK: ret <16 x i8> [[VTBX1_I]]
|
||||
uint8x16_t test_vqtbx1q_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) {
|
||||
return vqtbx1q_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_u8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx2q_u8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0
|
||||
@ -950,7 +950,7 @@ uint8x16_t test_vqtbx2q_u8(uint8x16_t a, uint8x16x2_t b, uint8x16_t c) {
|
||||
return vqtbx2q_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_u8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx3q_u8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0
|
||||
@ -974,7 +974,7 @@ uint8x16_t test_vqtbx3q_u8(uint8x16_t a, uint8x16x3_t b, uint8x16_t c) {
|
||||
return vqtbx3q_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_u8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx4q_u8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0
|
||||
@ -1001,7 +1001,7 @@ uint8x16_t test_vqtbx4q_u8(uint8x16_t a, uint8x16x4_t b, uint8x16_t c) {
|
||||
return vqtbx4q_u8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl1_p8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl1_p8(<8 x i8> %a, <8 x i8> %b) #0 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3
|
||||
// CHECK: ret <8 x i8> [[VTBL11_I]]
|
||||
@ -1009,14 +1009,14 @@ poly8x8_t test_vtbl1_p8(poly8x8_t a, uint8x8_t b) {
|
||||
return vtbl1_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl1_p8(<16 x i8> %a, <8 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl1_p8(<16 x i8> %a, <8 x i8> %b) #1 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3
|
||||
// CHECK: ret <8 x i8> [[VTBL1_I]]
|
||||
poly8x8_t test_vqtbl1_p8(poly8x16_t a, uint8x8_t b) {
|
||||
return vqtbl1_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl2_p8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl2_p8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x2_t, align 8
|
||||
// CHECK: [[A:%.*]] = alloca %struct.poly8x8x2_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[A]], i32 0, i32 0
|
||||
@ -1038,7 +1038,7 @@ poly8x8_t test_vtbl2_p8(poly8x8x2_t a, uint8x8_t b) {
|
||||
return vtbl2_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl2_p8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl2_p8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[A]], i32 0, i32 0
|
||||
@ -1059,7 +1059,7 @@ poly8x8_t test_vqtbl2_p8(poly8x16x2_t a, uint8x8_t b) {
|
||||
return vqtbl2_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl3_p8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl3_p8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x3_t, align 8
|
||||
// CHECK: [[A:%.*]] = alloca %struct.poly8x8x3_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[A]], i32 0, i32 0
|
||||
@ -1085,7 +1085,7 @@ poly8x8_t test_vtbl3_p8(poly8x8x3_t a, uint8x8_t b) {
|
||||
return vtbl3_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl3_p8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl3_p8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[A]], i32 0, i32 0
|
||||
@ -1109,7 +1109,7 @@ poly8x8_t test_vqtbl3_p8(poly8x16x3_t a, uint8x8_t b) {
|
||||
return vqtbl3_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbl4_p8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbl4_p8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x4_t, align 8
|
||||
// CHECK: [[A:%.*]] = alloca %struct.poly8x8x4_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[A]], i32 0, i32 0
|
||||
@ -1138,7 +1138,7 @@ poly8x8_t test_vtbl4_p8(poly8x8x4_t a, uint8x8_t b) {
|
||||
return vtbl4_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbl4_p8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbl4_p8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[A]], i32 0, i32 0
|
||||
@ -1165,14 +1165,14 @@ poly8x8_t test_vqtbl4_p8(poly8x16x4_t a, uint8x8_t b) {
|
||||
return vqtbl4_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_p8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl1q_p8(<16 x i8> %a, <16 x i8> %b) #1 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3
|
||||
// CHECK: ret <16 x i8> [[VTBL1_I]]
|
||||
poly8x16_t test_vqtbl1q_p8(poly8x16_t a, uint8x16_t b) {
|
||||
return vqtbl1q_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_p8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl2q_p8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[A]], i32 0, i32 0
|
||||
@ -1193,7 +1193,7 @@ poly8x16_t test_vqtbl2q_p8(poly8x16x2_t a, uint8x16_t b) {
|
||||
return vqtbl2q_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_p8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl3q_p8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[A]], i32 0, i32 0
|
||||
@ -1217,7 +1217,7 @@ poly8x16_t test_vqtbl3q_p8(poly8x16x3_t a, uint8x16_t b) {
|
||||
return vqtbl3q_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_p8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbl4q_p8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
|
||||
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
|
||||
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[A]], i32 0, i32 0
|
||||
@ -1244,7 +1244,7 @@ poly8x16_t test_vqtbl4q_p8(poly8x16x4_t a, uint8x16_t b) {
|
||||
return vqtbl4q_p8(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx1_p8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx1_p8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
|
||||
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3
|
||||
// CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>
|
||||
@ -1258,7 +1258,7 @@ poly8x8_t test_vtbx1_p8(poly8x8_t a, poly8x8_t b, uint8x8_t c) {
|
||||
return vtbx1_p8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx2_p8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx2_p8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x2_t, align 8
|
||||
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[B]], i32 0, i32 0
|
||||
@ -1280,7 +1280,7 @@ poly8x8_t test_vtbx2_p8(poly8x8_t a, poly8x8x2_t b, uint8x8_t c) {
|
||||
return vtbx2_p8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx3_p8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx3_p8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x3_t, align 8
|
||||
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[B]], i32 0, i32 0
|
||||
@ -1312,7 +1312,7 @@ poly8x8_t test_vtbx3_p8(poly8x8_t a, poly8x8x3_t b, uint8x8_t c) {
|
||||
return vtbx3_p8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vtbx4_p8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vtbx4_p8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x4_t, align 8
|
||||
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[B]], i32 0, i32 0
|
||||
@ -1341,14 +1341,14 @@ poly8x8_t test_vtbx4_p8(poly8x8_t a, poly8x8x4_t b, uint8x8_t c) {
|
||||
return vtbx4_p8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx1_p8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx1_p8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
|
||||
// CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3
|
||||
// CHECK: ret <8 x i8> [[VTBX1_I]]
|
||||
poly8x8_t test_vqtbx1_p8(poly8x8_t a, uint8x16_t b, uint8x8_t c) {
|
||||
return vqtbx1_p8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx2_p8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx2_p8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0
|
||||
@ -1369,7 +1369,7 @@ poly8x8_t test_vqtbx2_p8(poly8x8_t a, poly8x16x2_t b, uint8x8_t c) {
|
||||
return vqtbx2_p8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx3_p8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx3_p8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0
|
||||
@ -1393,7 +1393,7 @@ poly8x8_t test_vqtbx3_p8(poly8x8_t a, poly8x16x3_t b, uint8x8_t c) {
|
||||
return vqtbx3_p8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vqtbx4_p8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vqtbx4_p8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0
|
||||
@ -1420,14 +1420,14 @@ poly8x8_t test_vqtbx4_p8(poly8x8_t a, poly8x16x4_t b, uint8x8_t c) {
|
||||
return vqtbx4_p8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_p8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx1q_p8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
|
||||
// CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3
|
||||
// CHECK: ret <16 x i8> [[VTBX1_I]]
|
||||
poly8x16_t test_vqtbx1q_p8(poly8x16_t a, uint8x16_t b, uint8x16_t c) {
|
||||
return vqtbx1q_p8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_p8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx2q_p8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0
|
||||
@ -1448,7 +1448,7 @@ poly8x16_t test_vqtbx2q_p8(poly8x16_t a, poly8x16x2_t b, uint8x16_t c) {
|
||||
return vqtbx2q_p8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_p8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx3q_p8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0
|
||||
@ -1472,7 +1472,7 @@ poly8x16_t test_vqtbx3q_p8(poly8x16_t a, poly8x16x3_t b, uint8x16_t c) {
|
||||
return vqtbx3q_p8(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_p8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vqtbx4q_p8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
|
||||
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
|
||||
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0
|
||||
|
||||
@ -4,98 +4,98 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vcombine_s8(<8 x i8> %low, <8 x i8> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vcombine_s8(<8 x i8> %low, <8 x i8> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: ret <16 x i8> [[SHUFFLE_I]]
|
||||
int8x16_t test_vcombine_s8(int8x8_t low, int8x8_t high) {
|
||||
return vcombine_s8(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vcombine_s16(<4 x i16> %low, <4 x i16> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vcombine_s16(<4 x i16> %low, <4 x i16> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
// CHECK: ret <8 x i16> [[SHUFFLE_I]]
|
||||
int16x8_t test_vcombine_s16(int16x4_t low, int16x4_t high) {
|
||||
return vcombine_s16(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vcombine_s32(<2 x i32> %low, <2 x i32> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcombine_s32(<2 x i32> %low, <2 x i32> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
||||
// CHECK: ret <4 x i32> [[SHUFFLE_I]]
|
||||
int32x4_t test_vcombine_s32(int32x2_t low, int32x2_t high) {
|
||||
return vcombine_s32(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vcombine_s64(<1 x i64> %low, <1 x i64> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcombine_s64(<1 x i64> %low, <1 x i64> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
|
||||
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
|
||||
int64x2_t test_vcombine_s64(int64x1_t low, int64x1_t high) {
|
||||
return vcombine_s64(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vcombine_u8(<8 x i8> %low, <8 x i8> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vcombine_u8(<8 x i8> %low, <8 x i8> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: ret <16 x i8> [[SHUFFLE_I]]
|
||||
uint8x16_t test_vcombine_u8(uint8x8_t low, uint8x8_t high) {
|
||||
return vcombine_u8(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vcombine_u16(<4 x i16> %low, <4 x i16> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vcombine_u16(<4 x i16> %low, <4 x i16> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
// CHECK: ret <8 x i16> [[SHUFFLE_I]]
|
||||
uint16x8_t test_vcombine_u16(uint16x4_t low, uint16x4_t high) {
|
||||
return vcombine_u16(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vcombine_u32(<2 x i32> %low, <2 x i32> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcombine_u32(<2 x i32> %low, <2 x i32> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
||||
// CHECK: ret <4 x i32> [[SHUFFLE_I]]
|
||||
uint32x4_t test_vcombine_u32(uint32x2_t low, uint32x2_t high) {
|
||||
return vcombine_u32(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vcombine_u64(<1 x i64> %low, <1 x i64> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcombine_u64(<1 x i64> %low, <1 x i64> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
|
||||
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
|
||||
uint64x2_t test_vcombine_u64(uint64x1_t low, uint64x1_t high) {
|
||||
return vcombine_u64(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
|
||||
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
|
||||
poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) {
|
||||
return vcombine_p64(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x half> @test_vcombine_f16(<4 x half> %low, <4 x half> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x half> @test_vcombine_f16(<4 x half> %low, <4 x half> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> %low, <4 x half> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
// CHECK: ret <8 x half> [[SHUFFLE_I]]
|
||||
float16x8_t test_vcombine_f16(float16x4_t low, float16x4_t high) {
|
||||
return vcombine_f16(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vcombine_f32(<2 x float> %low, <2 x float> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vcombine_f32(<2 x float> %low, <2 x float> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x float> %low, <2 x float> %high, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
||||
// CHECK: ret <4 x float> [[SHUFFLE_I]]
|
||||
float32x4_t test_vcombine_f32(float32x2_t low, float32x2_t high) {
|
||||
return vcombine_f32(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vcombine_p8(<8 x i8> %low, <8 x i8> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vcombine_p8(<8 x i8> %low, <8 x i8> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: ret <16 x i8> [[SHUFFLE_I]]
|
||||
poly8x16_t test_vcombine_p8(poly8x8_t low, poly8x8_t high) {
|
||||
return vcombine_p8(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vcombine_p16(<4 x i16> %low, <4 x i16> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vcombine_p16(<4 x i16> %low, <4 x i16> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
// CHECK: ret <8 x i16> [[SHUFFLE_I]]
|
||||
poly16x8_t test_vcombine_p16(poly16x4_t low, poly16x4_t high) {
|
||||
return vcombine_p16(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x double> @test_vcombine_f64(<1 x double> %low, <1 x double> %high) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x double> @test_vcombine_f64(<1 x double> %low, <1 x double> %high) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> %low, <1 x double> %high, <2 x i32> <i32 0, i32 1>
|
||||
// CHECK: ret <2 x double> [[SHUFFLE_I]]
|
||||
float64x2_t test_vcombine_f64(float64x1_t low, float64x1_t high) {
|
||||
|
||||
@ -5,196 +5,196 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vget_high_s8(<16 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_high_s8(<16 x i8> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
|
||||
int8x8_t test_vget_high_s8(int8x16_t a) {
|
||||
return vget_high_s8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vget_high_s16(<8 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_high_s16(<8 x i16> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
|
||||
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
|
||||
int16x4_t test_vget_high_s16(int16x8_t a) {
|
||||
return vget_high_s16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vget_high_s32(<4 x i32> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vget_high_s32(<4 x i32> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 2, i32 3>
|
||||
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
|
||||
int32x2_t test_vget_high_s32(int32x4_t a) {
|
||||
return vget_high_s32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vget_high_s64(<2 x i64> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_high_s64(<2 x i64> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
|
||||
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
|
||||
int64x1_t test_vget_high_s64(int64x2_t a) {
|
||||
return vget_high_s64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vget_high_u8(<16 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_high_u8(<16 x i8> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
|
||||
uint8x8_t test_vget_high_u8(uint8x16_t a) {
|
||||
return vget_high_u8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vget_high_u16(<8 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_high_u16(<8 x i16> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
|
||||
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
|
||||
uint16x4_t test_vget_high_u16(uint16x8_t a) {
|
||||
return vget_high_u16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vget_high_u32(<4 x i32> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vget_high_u32(<4 x i32> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 2, i32 3>
|
||||
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
|
||||
uint32x2_t test_vget_high_u32(uint32x4_t a) {
|
||||
return vget_high_u32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vget_high_u64(<2 x i64> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_high_u64(<2 x i64> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
|
||||
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
|
||||
uint64x1_t test_vget_high_u64(uint64x2_t a) {
|
||||
return vget_high_u64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vget_high_p64(<2 x i64> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_high_p64(<2 x i64> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
|
||||
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
|
||||
poly64x1_t test_vget_high_p64(poly64x2_t a) {
|
||||
return vget_high_p64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x half> @test_vget_high_f16(<8 x half> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x half> @test_vget_high_f16(<8 x half> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
|
||||
// CHECK: ret <4 x half> [[SHUFFLE_I]]
|
||||
float16x4_t test_vget_high_f16(float16x8_t a) {
|
||||
return vget_high_f16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vget_high_f32(<4 x float> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vget_high_f32(<4 x float> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 2, i32 3>
|
||||
// CHECK: ret <2 x float> [[SHUFFLE_I]]
|
||||
float32x2_t test_vget_high_f32(float32x4_t a) {
|
||||
return vget_high_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vget_high_p8(<16 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_high_p8(<16 x i8> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
||||
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
|
||||
poly8x8_t test_vget_high_p8(poly8x16_t a) {
|
||||
return vget_high_p8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vget_high_p16(<8 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_high_p16(<8 x i16> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
|
||||
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
|
||||
poly16x4_t test_vget_high_p16(poly16x8_t a) {
|
||||
return vget_high_p16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vget_high_f64(<2 x double> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vget_high_f64(<2 x double> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> %a, <2 x double> %a, <1 x i32> <i32 1>
|
||||
// CHECK: ret <1 x double> [[SHUFFLE_I]]
|
||||
float64x1_t test_vget_high_f64(float64x2_t a) {
|
||||
return vget_high_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vget_low_s8(<16 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_low_s8(<16 x i8> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
|
||||
int8x8_t test_vget_low_s8(int8x16_t a) {
|
||||
return vget_low_s8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vget_low_s16(<8 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_low_s16(<8 x i16> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
||||
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
|
||||
int16x4_t test_vget_low_s16(int16x8_t a) {
|
||||
return vget_low_s16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vget_low_s32(<4 x i32> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vget_low_s32(<4 x i32> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 0, i32 1>
|
||||
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
|
||||
int32x2_t test_vget_low_s32(int32x4_t a) {
|
||||
return vget_low_s32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vget_low_s64(<2 x i64> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_low_s64(<2 x i64> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer
|
||||
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
|
||||
int64x1_t test_vget_low_s64(int64x2_t a) {
|
||||
return vget_low_s64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vget_low_u8(<16 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_low_u8(<16 x i8> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
|
||||
uint8x8_t test_vget_low_u8(uint8x16_t a) {
|
||||
return vget_low_u8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vget_low_u16(<8 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_low_u16(<8 x i16> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
||||
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
|
||||
uint16x4_t test_vget_low_u16(uint16x8_t a) {
|
||||
return vget_low_u16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vget_low_u32(<4 x i32> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vget_low_u32(<4 x i32> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 0, i32 1>
|
||||
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
|
||||
uint32x2_t test_vget_low_u32(uint32x4_t a) {
|
||||
return vget_low_u32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vget_low_u64(<2 x i64> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_low_u64(<2 x i64> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer
|
||||
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
|
||||
uint64x1_t test_vget_low_u64(uint64x2_t a) {
|
||||
return vget_low_u64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vget_low_p64(<2 x i64> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vget_low_p64(<2 x i64> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer
|
||||
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
|
||||
poly64x1_t test_vget_low_p64(poly64x2_t a) {
|
||||
return vget_low_p64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x half> @test_vget_low_f16(<8 x half> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x half> @test_vget_low_f16(<8 x half> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
||||
// CHECK: ret <4 x half> [[SHUFFLE_I]]
|
||||
float16x4_t test_vget_low_f16(float16x8_t a) {
|
||||
return vget_low_f16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vget_low_f32(<4 x float> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vget_low_f32(<4 x float> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 0, i32 1>
|
||||
// CHECK: ret <2 x float> [[SHUFFLE_I]]
|
||||
float32x2_t test_vget_low_f32(float32x4_t a) {
|
||||
return vget_low_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i8> @test_vget_low_p8(<16 x i8> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i8> @test_vget_low_p8(<16 x i8> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
|
||||
poly8x8_t test_vget_low_p8(poly8x16_t a) {
|
||||
return vget_low_p8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i16> @test_vget_low_p16(<8 x i16> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i16> @test_vget_low_p16(<8 x i16> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
||||
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
|
||||
poly16x4_t test_vget_low_p16(poly16x8_t a) {
|
||||
return vget_low_p16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x double> @test_vget_low_f64(<2 x double> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x double> @test_vget_low_f64(<2 x double> %a) #0 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> %a, <2 x double> %a, <1 x i32> zeroinitializer
|
||||
// CHECK: ret <1 x double> [[SHUFFLE_I]]
|
||||
float64x1_t test_vget_low_f64(float64x2_t a) {
|
||||
|
||||
@ -12,7 +12,7 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define void @test_vstrq_p128(i128* %ptr, i128 %val) #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_vstrq_p128(i128* %ptr, i128 %val) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8*
|
||||
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128*
|
||||
// CHECK: store i128 %val, i128* [[TMP1]]
|
||||
@ -22,7 +22,7 @@ void test_vstrq_p128(poly128_t * ptr, poly128_t val) {
|
||||
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vldrq_p128(i128* %ptr) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vldrq_p128(i128* %ptr) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8*
|
||||
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128*
|
||||
// CHECK: [[TMP2:%.*]] = load i128, i128* [[TMP1]]
|
||||
@ -32,7 +32,7 @@ poly128_t test_vldrq_p128(poly128_t * ptr) {
|
||||
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_ld_st_p128(i128* %ptr) #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_ld_st_p128(i128* %ptr) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8*
|
||||
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128*
|
||||
// CHECK: [[TMP2:%.*]] = load i128, i128* [[TMP1]]
|
||||
@ -46,7 +46,7 @@ void test_ld_st_p128(poly128_t * ptr) {
|
||||
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vmull_p64(i64 %a, i64 %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vmull_p64(i64 %a, i64 %b) #0 {
|
||||
// CHECK: [[VMULL_P64_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.pmull64(i64 %a, i64 %b) #3
|
||||
// CHECK: [[VMULL_P641_I:%.*]] = bitcast <16 x i8> [[VMULL_P64_I]] to i128
|
||||
// CHECK: ret i128 [[VMULL_P641_I]]
|
||||
@ -54,7 +54,7 @@ poly128_t test_vmull_p64(poly64_t a, poly64_t b) {
|
||||
return vmull_p64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vmull_high_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vmull_high_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[SHUFFLE_I_I]] to i64
|
||||
// CHECK: [[SHUFFLE_I7_I:%.*]] = shufflevector <2 x i64> %b, <2 x i64> %b, <1 x i32> <i32 1>
|
||||
@ -66,182 +66,182 @@ poly128_t test_vmull_high_p64(poly64x2_t a, poly64x2_t b) {
|
||||
return vmull_high_p64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_s8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_s8(int8x16_t a) {
|
||||
return vreinterpretq_p128_s8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_s16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_s16(int16x8_t a) {
|
||||
return vreinterpretq_p128_s16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_s32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_s32(int32x4_t a) {
|
||||
return vreinterpretq_p128_s32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s64(<2 x i64> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_s64(<2 x i64> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_s64(int64x2_t a) {
|
||||
return vreinterpretq_p128_s64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_u8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_u8(uint8x16_t a) {
|
||||
return vreinterpretq_p128_u8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_u16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_u16(uint16x8_t a) {
|
||||
return vreinterpretq_p128_u16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u32(<4 x i32> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_u32(<4 x i32> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_u32(uint32x4_t a) {
|
||||
return vreinterpretq_p128_u32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u64(<2 x i64> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_u64(<2 x i64> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_u64(uint64x2_t a) {
|
||||
return vreinterpretq_p128_u64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_f32(float32x4_t a) {
|
||||
return vreinterpretq_p128_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_f64(<2 x double> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_f64(<2 x double> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_f64(float64x2_t a) {
|
||||
return vreinterpretq_p128_f64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p8(<16 x i8> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_p8(<16 x i8> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_p8(poly8x16_t a) {
|
||||
return vreinterpretq_p128_p8(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p16(<8 x i16> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_p16(<8 x i16> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_p16(poly16x8_t a) {
|
||||
return vreinterpretq_p128_p16(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p64(<2 x i64> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i128 @test_vreinterpretq_p128_p64(<2 x i64> %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128
|
||||
// CHECK: ret i128 [[TMP0]]
|
||||
poly128_t test_vreinterpretq_p128_p64(poly64x2_t a) {
|
||||
return vreinterpretq_p128_p64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_s8_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vreinterpretq_s8_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8>
|
||||
// CHECK: ret <16 x i8> [[TMP0]]
|
||||
int8x16_t test_vreinterpretq_s8_p128(poly128_t a) {
|
||||
return vreinterpretq_s8_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_s16_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vreinterpretq_s16_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16>
|
||||
// CHECK: ret <8 x i16> [[TMP0]]
|
||||
int16x8_t test_vreinterpretq_s16_p128(poly128_t a) {
|
||||
return vreinterpretq_s16_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vreinterpretq_s32_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vreinterpretq_s32_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x i32>
|
||||
// CHECK: ret <4 x i32> [[TMP0]]
|
||||
int32x4_t test_vreinterpretq_s32_p128(poly128_t a) {
|
||||
return vreinterpretq_s32_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_s64_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vreinterpretq_s64_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64>
|
||||
// CHECK: ret <2 x i64> [[TMP0]]
|
||||
int64x2_t test_vreinterpretq_s64_p128(poly128_t a) {
|
||||
return vreinterpretq_s64_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_u8_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vreinterpretq_u8_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8>
|
||||
// CHECK: ret <16 x i8> [[TMP0]]
|
||||
uint8x16_t test_vreinterpretq_u8_p128(poly128_t a) {
|
||||
return vreinterpretq_u8_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_u16_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vreinterpretq_u16_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16>
|
||||
// CHECK: ret <8 x i16> [[TMP0]]
|
||||
uint16x8_t test_vreinterpretq_u16_p128(poly128_t a) {
|
||||
return vreinterpretq_u16_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vreinterpretq_u32_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vreinterpretq_u32_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x i32>
|
||||
// CHECK: ret <4 x i32> [[TMP0]]
|
||||
uint32x4_t test_vreinterpretq_u32_p128(poly128_t a) {
|
||||
return vreinterpretq_u32_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_u64_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vreinterpretq_u64_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64>
|
||||
// CHECK: ret <2 x i64> [[TMP0]]
|
||||
uint64x2_t test_vreinterpretq_u64_p128(poly128_t a) {
|
||||
return vreinterpretq_u64_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vreinterpretq_f32_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vreinterpretq_f32_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x float>
|
||||
// CHECK: ret <4 x float> [[TMP0]]
|
||||
float32x4_t test_vreinterpretq_f32_p128(poly128_t a) {
|
||||
return vreinterpretq_f32_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x double> @test_vreinterpretq_f64_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x double> @test_vreinterpretq_f64_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x double>
|
||||
// CHECK: ret <2 x double> [[TMP0]]
|
||||
float64x2_t test_vreinterpretq_f64_p128(poly128_t a) {
|
||||
return vreinterpretq_f64_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_p8_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <16 x i8> @test_vreinterpretq_p8_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8>
|
||||
// CHECK: ret <16 x i8> [[TMP0]]
|
||||
poly8x16_t test_vreinterpretq_p8_p128(poly128_t a) {
|
||||
return vreinterpretq_p8_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_p16_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <8 x i16> @test_vreinterpretq_p16_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16>
|
||||
// CHECK: ret <8 x i16> [[TMP0]]
|
||||
poly16x8_t test_vreinterpretq_p16_p128(poly128_t a) {
|
||||
return vreinterpretq_p16_p128(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_p64_p128(i128 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vreinterpretq_p64_p128(i128 %a) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64>
|
||||
// CHECK: ret <2 x i64> [[TMP0]]
|
||||
poly64x2_t test_vreinterpretq_p64_p128(poly128_t a) {
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vceq_p64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vceq_p64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[CMP_I:%.*]] = icmp eq <1 x i64> %a, %b
|
||||
// CHECK: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
|
||||
// CHECK: ret <1 x i64> [[SEXT_I]]
|
||||
@ -14,7 +14,7 @@ uint64x1_t test_vceq_p64(poly64x1_t a, poly64x1_t b) {
|
||||
return vceq_p64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vceqq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vceqq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[CMP_I:%.*]] = icmp eq <2 x i64> %a, %b
|
||||
// CHECK: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
|
||||
// CHECK: ret <2 x i64> [[SEXT_I]]
|
||||
@ -22,7 +22,7 @@ uint64x2_t test_vceqq_p64(poly64x2_t a, poly64x2_t b) {
|
||||
return vceqq_p64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vtst_p64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vtst_p64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[TMP4:%.*]] = and <1 x i64> %a, %b
|
||||
// CHECK: [[TMP5:%.*]] = icmp ne <1 x i64> [[TMP4]], zeroinitializer
|
||||
// CHECK: [[VTST_I:%.*]] = sext <1 x i1> [[TMP5]] to <1 x i64>
|
||||
@ -31,7 +31,7 @@ uint64x1_t test_vtst_p64(poly64x1_t a, poly64x1_t b) {
|
||||
return vtst_p64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vtstq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vtstq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[TMP4:%.*]] = and <2 x i64> %a, %b
|
||||
// CHECK: [[TMP5:%.*]] = icmp ne <2 x i64> [[TMP4]], zeroinitializer
|
||||
// CHECK: [[VTST_I:%.*]] = sext <2 x i1> [[TMP5]] to <2 x i64>
|
||||
@ -40,7 +40,7 @@ uint64x2_t test_vtstq_p64(poly64x2_t a, poly64x2_t b) {
|
||||
return vtstq_p64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vbsl_p64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vbsl_p64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) #0 {
|
||||
// CHECK: [[VBSL3_I:%.*]] = and <1 x i64> %a, %b
|
||||
// CHECK: [[TMP3:%.*]] = xor <1 x i64> %a, <i64 -1>
|
||||
// CHECK: [[VBSL4_I:%.*]] = and <1 x i64> [[TMP3]], %c
|
||||
@ -50,7 +50,7 @@ poly64x1_t test_vbsl_p64(poly64x1_t a, poly64x1_t b, poly64x1_t c) {
|
||||
return vbsl_p64(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vbslq_p64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vbslq_p64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) #1 {
|
||||
// CHECK: [[VBSL3_I:%.*]] = and <2 x i64> %a, %b
|
||||
// CHECK: [[TMP3:%.*]] = xor <2 x i64> %a, <i64 -1, i64 -1>
|
||||
// CHECK: [[VBSL4_I:%.*]] = and <2 x i64> [[TMP3]], %c
|
||||
@ -60,35 +60,35 @@ poly64x2_t test_vbslq_p64(poly64x2_t a, poly64x2_t b, poly64x2_t c) {
|
||||
return vbslq_p64(a, b, c);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vget_lane_p64(<1 x i64> %v) #0 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vget_lane_p64(<1 x i64> %v) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %v, i32 0
|
||||
// CHECK: ret i64 [[VGET_LANE]]
|
||||
poly64_t test_vget_lane_p64(poly64x1_t v) {
|
||||
return vget_lane_p64(v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @test_vgetq_lane_p64(<2 x i64> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} i64 @test_vgetq_lane_p64(<2 x i64> %v) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %v, i32 1
|
||||
// CHECK: ret i64 [[VGETQ_LANE]]
|
||||
poly64_t test_vgetq_lane_p64(poly64x2_t v) {
|
||||
return vgetq_lane_p64(v, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vset_lane_p64(i64 %a, <1 x i64> %v) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vset_lane_p64(i64 %a, <1 x i64> %v) #0 {
|
||||
// CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %v, i64 %a, i32 0
|
||||
// CHECK: ret <1 x i64> [[VSET_LANE]]
|
||||
poly64x1_t test_vset_lane_p64(poly64_t a, poly64x1_t v) {
|
||||
return vset_lane_p64(a, v, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vsetq_lane_p64(i64 %a, <2 x i64> %v) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vsetq_lane_p64(i64 %a, <2 x i64> %v) #1 {
|
||||
// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %v, i64 %a, i32 1
|
||||
// CHECK: ret <2 x i64> [[VSET_LANE]]
|
||||
poly64x2_t test_vsetq_lane_p64(poly64_t a, poly64x2_t v) {
|
||||
return vsetq_lane_p64(a, v, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vcopy_lane_p64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vcopy_lane_p64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %b, i32 0
|
||||
// CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %a, i64 [[VGET_LANE]], i32 0
|
||||
// CHECK: ret <1 x i64> [[VSET_LANE]]
|
||||
@ -97,7 +97,7 @@ poly64x1_t test_vcopy_lane_p64(poly64x1_t a, poly64x1_t b) {
|
||||
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) #1 {
|
||||
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %b, i32 0
|
||||
// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a, i64 [[VGET_LANE]], i32 1
|
||||
// CHECK: ret <2 x i64> [[VSET_LANE]]
|
||||
@ -105,7 +105,7 @@ poly64x2_t test_vcopyq_lane_p64(poly64x2_t a, poly64x1_t b) {
|
||||
return vcopyq_lane_p64(a, 1, b, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vcopyq_laneq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcopyq_laneq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %b, i32 1
|
||||
// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a, i64 [[VGETQ_LANE]], i32 1
|
||||
// CHECK: ret <2 x i64> [[VSET_LANE]]
|
||||
@ -113,20 +113,20 @@ poly64x2_t test_vcopyq_laneq_p64(poly64x2_t a, poly64x2_t b) {
|
||||
return vcopyq_laneq_p64(a, 1, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vcreate_p64(i64 %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vcreate_p64(i64 %a) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i64 %a to <1 x i64>
|
||||
// CHECK: ret <1 x i64> [[TMP0]]
|
||||
poly64x1_t test_vcreate_p64(uint64_t a) {
|
||||
return vcreate_p64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vdup_n_p64(i64 %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vdup_n_p64(i64 %a) #0 {
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <1 x i64> undef, i64 %a, i32 0
|
||||
// CHECK: ret <1 x i64> [[VECINIT_I]]
|
||||
poly64x1_t test_vdup_n_p64(poly64_t a) {
|
||||
return vdup_n_p64(a);
|
||||
}
|
||||
// CHECK-LABEL: define <2 x i64> @test_vdupq_n_p64(i64 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vdupq_n_p64(i64 %a) #1 {
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 %a, i32 0
|
||||
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 %a, i32 1
|
||||
// CHECK: ret <2 x i64> [[VECINIT1_I]]
|
||||
@ -134,14 +134,14 @@ poly64x2_t test_vdupq_n_p64(poly64_t a) {
|
||||
return vdupq_n_p64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vmov_n_p64(i64 %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vmov_n_p64(i64 %a) #0 {
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <1 x i64> undef, i64 %a, i32 0
|
||||
// CHECK: ret <1 x i64> [[VECINIT_I]]
|
||||
poly64x1_t test_vmov_n_p64(poly64_t a) {
|
||||
return vmov_n_p64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vmovq_n_p64(i64 %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vmovq_n_p64(i64 %a) #1 {
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 %a, i32 0
|
||||
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 %a, i32 1
|
||||
// CHECK: ret <2 x i64> [[VECINIT1_I]]
|
||||
@ -149,7 +149,7 @@ poly64x2_t test_vmovq_n_p64(poly64_t a) {
|
||||
return vmovq_n_p64(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vdup_lane_p64(<1 x i64> %vec) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vdup_lane_p64(<1 x i64> %vec) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[VEC:%.*]] to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <1 x i64> [[TMP1]], <1 x i64> [[TMP1]], <1 x i32> zeroinitializer
|
||||
@ -158,7 +158,7 @@ poly64x1_t test_vdup_lane_p64(poly64x1_t vec) {
|
||||
return vdup_lane_p64(vec, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vdupq_lane_p64(<1 x i64> %vec) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vdupq_lane_p64(<1 x i64> %vec) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[VEC:%.*]] to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <1 x i64> [[TMP1]], <1 x i64> [[TMP1]], <2 x i32> zeroinitializer
|
||||
@ -167,7 +167,7 @@ poly64x2_t test_vdupq_lane_p64(poly64x1_t vec) {
|
||||
return vdupq_lane_p64(vec, 0);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vdupq_laneq_p64(<2 x i64> %vec) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vdupq_laneq_p64(<2 x i64> %vec) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> [[VEC:%.*]] to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
|
||||
// CHECK: [[LANE:%.*]] = shufflevector <2 x i64> [[TMP1]], <2 x i64> [[TMP1]], <2 x i32> <i32 1, i32 1>
|
||||
@ -176,14 +176,14 @@ poly64x2_t test_vdupq_laneq_p64(poly64x2_t vec) {
|
||||
return vdupq_laneq_p64(vec, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #1 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
|
||||
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
|
||||
poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) {
|
||||
return vcombine_p64(low, high);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vld1_p64(i64* %ptr) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_p64(i64* %ptr) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
|
||||
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <1 x i64>*
|
||||
// CHECK: [[TMP2:%.*]] = load <1 x i64>, <1 x i64>* [[TMP1]]
|
||||
@ -192,7 +192,7 @@ poly64x1_t test_vld1_p64(poly64_t const * ptr) {
|
||||
return vld1_p64(ptr);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vld1q_p64(i64* %ptr) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_p64(i64* %ptr) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
|
||||
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <2 x i64>*
|
||||
// CHECK: [[TMP2:%.*]] = load <2 x i64>, <2 x i64>* [[TMP1]]
|
||||
@ -201,7 +201,7 @@ poly64x2_t test_vld1q_p64(poly64_t const * ptr) {
|
||||
return vld1q_p64(ptr);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_vst1_p64(i64* %ptr, <1 x i64> %val) #0 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_vst1_p64(i64* %ptr, <1 x i64> %val) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %val to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to <1 x i64>*
|
||||
@ -212,7 +212,7 @@ void test_vst1_p64(poly64_t * ptr, poly64x1_t val) {
|
||||
return vst1_p64(ptr, val);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_vst1q_p64(i64* %ptr, <2 x i64> %val) #1 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_vst1q_p64(i64* %ptr, <2 x i64> %val) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %val to <16 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to <2 x i64>*
|
||||
@ -223,7 +223,7 @@ void test_vst1q_p64(poly64_t * ptr, poly64x2_t val) {
|
||||
return vst1q_p64(ptr, val);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_p64(i64* %ptr) #2 {
|
||||
// CHECK-LABEL: define{{.*}} %struct.poly64x1x2_t @test_vld2_p64(i64* %ptr) #2 {
|
||||
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8
|
||||
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x2_t, align 8
|
||||
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8*
|
||||
@ -241,7 +241,7 @@ poly64x1x2_t test_vld2_p64(poly64_t const * ptr) {
|
||||
return vld2_p64(ptr);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_p64(i64* %ptr) #2 {
|
||||
// CHECK-LABEL: define{{.*}} %struct.poly64x2x2_t @test_vld2q_p64(i64* %ptr) #2 {
|
||||
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16
|
||||
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x2_t, align 16
|
||||
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8*
|
||||
@ -259,7 +259,7 @@ poly64x2x2_t test_vld2q_p64(poly64_t const * ptr) {
|
||||
return vld2q_p64(ptr);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_p64(i64* %ptr) #2 {
|
||||
// CHECK-LABEL: define{{.*}} %struct.poly64x1x3_t @test_vld3_p64(i64* %ptr) #2 {
|
||||
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8
|
||||
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x3_t, align 8
|
||||
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8*
|
||||
@ -277,7 +277,7 @@ poly64x1x3_t test_vld3_p64(poly64_t const * ptr) {
|
||||
return vld3_p64(ptr);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_p64(i64* %ptr) #2 {
|
||||
// CHECK-LABEL: define{{.*}} %struct.poly64x2x3_t @test_vld3q_p64(i64* %ptr) #2 {
|
||||
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16
|
||||
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x3_t, align 16
|
||||
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8*
|
||||
@ -295,7 +295,7 @@ poly64x2x3_t test_vld3q_p64(poly64_t const * ptr) {
|
||||
return vld3q_p64(ptr);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_p64(i64* %ptr) #2 {
|
||||
// CHECK-LABEL: define{{.*}} %struct.poly64x1x4_t @test_vld4_p64(i64* %ptr) #2 {
|
||||
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8
|
||||
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x4_t, align 8
|
||||
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8*
|
||||
@ -313,7 +313,7 @@ poly64x1x4_t test_vld4_p64(poly64_t const * ptr) {
|
||||
return vld4_p64(ptr);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_p64(i64* %ptr) #2 {
|
||||
// CHECK-LABEL: define{{.*}} %struct.poly64x2x4_t @test_vld4q_p64(i64* %ptr) #2 {
|
||||
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16
|
||||
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x4_t, align 16
|
||||
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8*
|
||||
@ -331,7 +331,7 @@ poly64x2x4_t test_vld4q_p64(poly64_t const * ptr) {
|
||||
return vld4q_p64(ptr);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_vst2_p64(i64* %ptr, [2 x <1 x i64>] %val.coerce) #2 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_vst2_p64(i64* %ptr, [2 x <1 x i64>] %val.coerce) #2 {
|
||||
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x2_t, align 8
|
||||
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[VAL]], i32 0, i32 0
|
||||
@ -356,7 +356,7 @@ void test_vst2_p64(poly64_t * ptr, poly64x1x2_t val) {
|
||||
return vst2_p64(ptr, val);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_vst2q_p64(i64* %ptr, [2 x <2 x i64>] %val.coerce) #2 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_vst2q_p64(i64* %ptr, [2 x <2 x i64>] %val.coerce) #2 {
|
||||
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x2_t, align 16
|
||||
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[VAL]], i32 0, i32 0
|
||||
@ -381,7 +381,7 @@ void test_vst2q_p64(poly64_t * ptr, poly64x2x2_t val) {
|
||||
return vst2q_p64(ptr, val);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_vst3_p64(i64* %ptr, [3 x <1 x i64>] %val.coerce) #2 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_vst3_p64(i64* %ptr, [3 x <1 x i64>] %val.coerce) #2 {
|
||||
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x3_t, align 8
|
||||
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[VAL]], i32 0, i32 0
|
||||
@ -411,7 +411,7 @@ void test_vst3_p64(poly64_t * ptr, poly64x1x3_t val) {
|
||||
return vst3_p64(ptr, val);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_vst3q_p64(i64* %ptr, [3 x <2 x i64>] %val.coerce) #2 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_vst3q_p64(i64* %ptr, [3 x <2 x i64>] %val.coerce) #2 {
|
||||
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x3_t, align 16
|
||||
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[VAL]], i32 0, i32 0
|
||||
@ -441,7 +441,7 @@ void test_vst3q_p64(poly64_t * ptr, poly64x2x3_t val) {
|
||||
return vst3q_p64(ptr, val);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_vst4_p64(i64* %ptr, [4 x <1 x i64>] %val.coerce) #2 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_vst4_p64(i64* %ptr, [4 x <1 x i64>] %val.coerce) #2 {
|
||||
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x4_t, align 8
|
||||
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[VAL]], i32 0, i32 0
|
||||
@ -476,7 +476,7 @@ void test_vst4_p64(poly64_t * ptr, poly64x1x4_t val) {
|
||||
return vst4_p64(ptr, val);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @test_vst4q_p64(i64* %ptr, [4 x <2 x i64>] %val.coerce) #2 {
|
||||
// CHECK-LABEL: define{{.*}} void @test_vst4q_p64(i64* %ptr, [4 x <2 x i64>] %val.coerce) #2 {
|
||||
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x4_t, align 16
|
||||
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16
|
||||
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[VAL]], i32 0, i32 0
|
||||
@ -511,7 +511,7 @@ void test_vst4q_p64(poly64_t * ptr, poly64x2x4_t val) {
|
||||
return vst4q_p64(ptr, val);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vext_p64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vext_p64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
|
||||
@ -523,7 +523,7 @@ poly64x1_t test_vext_p64(poly64x1_t a, poly64x1_t b) {
|
||||
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vextq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vextq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
|
||||
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
|
||||
@ -534,49 +534,49 @@ poly64x2_t test_vextq_p64(poly64x2_t a, poly64x2_t b) {
|
||||
return vextq_p64(a, b, 1);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vzip1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vzip1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
|
||||
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
|
||||
poly64x2_t test_vzip1q_p64(poly64x2_t a, poly64x2_t b) {
|
||||
return vzip1q_p64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vzip2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vzip2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
|
||||
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
|
||||
poly64x2_t test_vzip2q_p64(poly64x2_t a, poly64x2_t b) {
|
||||
return vzip2q_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vuzp1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vuzp1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
|
||||
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
|
||||
poly64x2_t test_vuzp1q_p64(poly64x2_t a, poly64x2_t b) {
|
||||
return vuzp1q_p64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vuzp2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vuzp2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
|
||||
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
|
||||
poly64x2_t test_vuzp2q_p64(poly64x2_t a, poly64x2_t b) {
|
||||
return vuzp2q_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vtrn1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vtrn1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
|
||||
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
|
||||
poly64x2_t test_vtrn1q_p64(poly64x2_t a, poly64x2_t b) {
|
||||
return vtrn1q_p64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vtrn2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vtrn2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
|
||||
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
|
||||
poly64x2_t test_vtrn2q_p64(poly64x2_t a, poly64x2_t b) {
|
||||
return vtrn2q_u64(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <1 x i64> @test_vsri_n_p64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <1 x i64> @test_vsri_n_p64(<1 x i64> %a, <1 x i64> %b) #0 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
|
||||
// CHECK: [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
|
||||
@ -587,7 +587,7 @@ poly64x1_t test_vsri_n_p64(poly64x1_t a, poly64x1_t b) {
|
||||
return vsri_n_p64(a, b, 33);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i64> @test_vsriq_n_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i64> @test_vsriq_n_p64(<2 x i64> %a, <2 x i64> %b) #1 {
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
|
||||
// CHECK: [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
|
||||
|
||||
@ -16,25 +16,25 @@
|
||||
|
||||
// Page 27, item 1
|
||||
#if __ARM_FEATURE_SVE_BITS == 256 && __ARM_FEATURE_SVE_VECTOR_OPERATORS
|
||||
// CHECK256-LABEL: @x256 = local_unnamed_addr global <4 x i64> <i64 0, i64 1, i64 2, i64 3>, align 16
|
||||
// CHECK256-LABEL: @x256 ={{.*}} local_unnamed_addr global <4 x i64> <i64 0, i64 1, i64 2, i64 3>, align 16
|
||||
typedef svint64_t vec256 __attribute__((arm_sve_vector_bits(256)));
|
||||
vec256 x256 = {0, 1, 2, 3};
|
||||
#endif
|
||||
|
||||
#if __ARM_FEATURE_SVE_BITS == 512 && __ARM_FEATURE_SVE_VECTOR_OPERATORS
|
||||
// CHECK512-LABEL: @x512 = local_unnamed_addr global <8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
|
||||
// CHECK512-LABEL: @x512 ={{.*}} local_unnamed_addr global <8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
|
||||
typedef svint64_t vec512 __attribute__((arm_sve_vector_bits(512)));
|
||||
vec512 x512 = {0, 1, 2, 3, 3 , 2 , 1, 0};
|
||||
#endif
|
||||
|
||||
#if __ARM_FEATURE_SVE_BITS == 1024 && __ARM_FEATURE_SVE_VECTOR_OPERATORS
|
||||
// CHECK1024-LABEL: @x1024 = local_unnamed_addr global <16 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
|
||||
// CHECK1024-LABEL: @x1024 ={{.*}} local_unnamed_addr global <16 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
|
||||
typedef svint64_t vec1024 __attribute__((arm_sve_vector_bits(1024)));
|
||||
vec1024 x1024 = {0, 1, 2, 3, 3 , 2 , 1, 0, 0, 1, 2, 3, 3 , 2 , 1, 0};
|
||||
#endif
|
||||
|
||||
#if __ARM_FEATURE_SVE_BITS == 2048 && __ARM_FEATURE_SVE_VECTOR_OPERATORS
|
||||
// CHECK2048-LABEL: @x2048 = local_unnamed_addr global <32 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
|
||||
// CHECK2048-LABEL: @x2048 ={{.*}} local_unnamed_addr global <32 x i64> <i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0, i64 0, i64 1, i64 2, i64 3, i64 3, i64 2, i64 1, i64 0>, align 16
|
||||
typedef svint64_t vec2048 __attribute__((arm_sve_vector_bits(2048)));
|
||||
vec2048 x2048 = {0, 1, 2, 3, 3 , 2 , 1, 0, 0, 1, 2, 3, 3 , 2 , 1, 0,
|
||||
0, 1, 2, 3, 3 , 2 , 1, 0, 0, 1, 2, 3, 3 , 2 , 1, 0};
|
||||
@ -49,7 +49,7 @@ vec2048 x2048 = {0, 1, 2, 3, 3 , 2 , 1, 0, 0, 1, 2, 3, 3 , 2 , 1, 0,
|
||||
#if __ARM_FEATURE_SVE_BITS && __ARM_FEATURE_SVE_VECTOR_OPERATORS
|
||||
#define N __ARM_FEATURE_SVE_BITS
|
||||
typedef int8_t vec_int8 __attribute__((vector_size(N / 8)));
|
||||
// CHECK128-LABEL: define <16 x i8> @f2(<16 x i8> %x)
|
||||
// CHECK128-LABEL: define{{.*}} <16 x i8> @f2(<16 x i8> %x)
|
||||
// CHECK128-NEXT: entry:
|
||||
// CHECK128-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31)
|
||||
// CHECK128-NEXT: [[CASTSCALABLESVE:%.*]] = call <vscale x 16 x i8> @llvm.experimental.vector.insert.nxv16i8.v16i8(<vscale x 16 x i8> undef, <16 x i8> [[X:%.*]], i64 0)
|
||||
@ -57,7 +57,7 @@ typedef int8_t vec_int8 __attribute__((vector_size(N / 8)));
|
||||
// CHECK128-NEXT: [[CASTFIXEDSVE:%.*]] = call <16 x i8> @llvm.experimental.vector.extract.v16i8.nxv16i8(<vscale x 16 x i8> [[TMP1]], i64 0)
|
||||
// CHECK128-NEXT: ret <16 x i8> [[CASTFIXEDSVE]]
|
||||
|
||||
// CHECK-LABEL: define void @f2(
|
||||
// CHECK-LABEL: define{{.*}} void @f2(
|
||||
// CHECK-SAME: <[[#div(VBITS,8)]] x i8>* noalias nocapture sret(<[[#div(VBITS,8)]] x i8>) align 16 %agg.result, <[[#div(VBITS,8)]] x i8>* nocapture readonly %0)
|
||||
// CHECK-NEXT: entry:
|
||||
// CHECK-NEXT: [[X:%.*]] = load <[[#div(VBITS,8)]] x i8>, <[[#div(VBITS,8)]] x i8>* [[TMP0:%.*]], align 16, [[TBAA6:!tbaa !.*]]
|
||||
@ -77,7 +77,7 @@ typedef int8_t vec1 __attribute__((vector_size(N / 8)));
|
||||
void f3(vec1);
|
||||
typedef svint8_t vec2 __attribute__((arm_sve_vector_bits(N)));
|
||||
|
||||
// CHECK128-LABEL: define void @g(<vscale x 16 x i8> %x.coerce)
|
||||
// CHECK128-LABEL: define{{.*}} void @g(<vscale x 16 x i8> %x.coerce)
|
||||
// CHECK128-NEXT: entry:
|
||||
// CHECK128-NEXT: [[X:%.*]] = alloca <16 x i8>, align 16
|
||||
// CHECK128-NEXT: [[TMP0:%.*]] = bitcast <16 x i8>* [[X]] to <vscale x 16 x i8>*
|
||||
@ -86,7 +86,7 @@ typedef svint8_t vec2 __attribute__((arm_sve_vector_bits(N)));
|
||||
// CHECK128-NEXT: call void @f3(<16 x i8> [[X1]]) [[ATTR5:#.*]]
|
||||
// CHECK128-NEXT: ret void
|
||||
|
||||
// CHECK-LABEL: define void @g(<vscale x 16 x i8> %x.coerce)
|
||||
// CHECK-LABEL: define{{.*}} void @g(<vscale x 16 x i8> %x.coerce)
|
||||
// CHECK-NEXT: entry:
|
||||
// CHECK-NEXT: [[X:%.*]] = alloca <[[#div(VBITS,8)]] x i8>, align 16
|
||||
// CHECK-NEXT: [[INDIRECT_ARG_TEMP:%.*]] = alloca <[[#div(VBITS,8)]] x i8>, align 16
|
||||
|
||||
@ -44,7 +44,7 @@ void test02() {
|
||||
// Page 27, item 1.
|
||||
#if __ARM_FEATURE_SVE_BITS && __ARM_FEATURE_SVE_VECTOR_OPERATORS
|
||||
#define N __ARM_FEATURE_SVE_BITS
|
||||
// CHECK-LABEL: define <vscale x 4 x i32> @_Z1f9__SVE_VLSIu11__SVInt32_tLj
|
||||
// CHECK-LABEL: define{{.*}} <vscale x 4 x i32> @_Z1f9__SVE_VLSIu11__SVInt32_tLj
|
||||
// CHECK-SAME: [[#VBITS]]
|
||||
// CHECK-SAME: EES_(<vscale x 4 x i32> %x.coerce, <vscale x 4 x i32> %y.coerce)
|
||||
// CHECK-NEXT: entry:
|
||||
@ -72,7 +72,7 @@ auto f(vec x, vec y) { return x + y; } // Returns a vec.
|
||||
typedef int16_t vec1 __attribute__((vector_size(N / 8)));
|
||||
void f(vec1);
|
||||
typedef svint16_t vec2 __attribute__((arm_sve_vector_bits(N)));
|
||||
// CHECK-LABEL: define void @_Z1g9__SVE_VLSIu11__SVInt16_tLj
|
||||
// CHECK-LABEL: define{{.*}} void @_Z1g9__SVE_VLSIu11__SVInt16_tLj
|
||||
// CHECK-SAME: [[#VBITS]]
|
||||
// CHECK-SAME: EE(<vscale x 8 x i16> %x.coerce)
|
||||
// CHECK-NEXT: entry:
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \
|
||||
// RUN: -emit-llvm -o - %s 2>&1 | FileCheck %s -check-prefix=CHECK
|
||||
|
||||
// CHECK: @ptr = global <vscale x 16 x i8>* null, align 8
|
||||
// CHECK: @ptr ={{.*}} global <vscale x 16 x i8>* null, align 8
|
||||
// CHECK: %s8 = alloca <vscale x 16 x i8>, align 16
|
||||
// CHECK: %s16 = alloca <vscale x 8 x i16>, align 16
|
||||
// CHECK: %s32 = alloca <vscale x 4 x i32>, align 16
|
||||
|
||||
@ -36,7 +36,7 @@ void test_tme_funcs() {
|
||||
#ifdef __ARM_FEATURE_TME
|
||||
extern "C" void arm_feature_tme_defined() {}
|
||||
#endif
|
||||
// CHECK: define void @arm_feature_tme_defined()
|
||||
// CHECK: define{{.*}} void @arm_feature_tme_defined()
|
||||
|
||||
// CHECK: attributes #1 = { nounwind }
|
||||
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
va_list the_list;
|
||||
|
||||
int simple_int(void) {
|
||||
// CHECK-LABEL: define i32 @simple_int
|
||||
// CHECK-LABEL: define{{.*}} i32 @simple_int
|
||||
return va_arg(the_list, int);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -45,7 +45,7 @@ int simple_int(void) {
|
||||
}
|
||||
|
||||
__int128 aligned_int(void) {
|
||||
// CHECK-LABEL: define i128 @aligned_int
|
||||
// CHECK-LABEL: define{{.*}} i128 @aligned_int
|
||||
return va_arg(the_list, __int128);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -87,7 +87,7 @@ struct bigstruct {
|
||||
};
|
||||
|
||||
struct bigstruct simple_indirect(void) {
|
||||
// CHECK-LABEL: define void @simple_indirect
|
||||
// CHECK-LABEL: define{{.*}} void @simple_indirect
|
||||
return va_arg(the_list, struct bigstruct);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -125,7 +125,7 @@ struct aligned_bigstruct {
|
||||
};
|
||||
|
||||
struct aligned_bigstruct simple_aligned_indirect(void) {
|
||||
// CHECK-LABEL: define void @simple_aligned_indirect
|
||||
// CHECK-LABEL: define{{.*}} void @simple_aligned_indirect
|
||||
return va_arg(the_list, struct aligned_bigstruct);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -156,7 +156,7 @@ struct aligned_bigstruct simple_aligned_indirect(void) {
|
||||
}
|
||||
|
||||
double simple_double(void) {
|
||||
// CHECK-LABEL: define double @simple_double
|
||||
// CHECK-LABEL: define{{.*}} double @simple_double
|
||||
return va_arg(the_list, double);
|
||||
// CHECK: [[VR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 4)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[VR_OFFS]], 0
|
||||
@ -194,7 +194,7 @@ struct hfa {
|
||||
};
|
||||
|
||||
struct hfa simple_hfa(void) {
|
||||
// CHECK-LABEL: define %struct.hfa @simple_hfa
|
||||
// CHECK-LABEL: define{{.*}} %struct.hfa @simple_hfa
|
||||
return va_arg(the_list, struct hfa);
|
||||
// CHECK: [[VR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 4)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[VR_OFFS]], 0
|
||||
@ -241,7 +241,7 @@ struct hfa simple_hfa(void) {
|
||||
|
||||
typedef int underaligned_int __attribute__((packed,aligned(2)));
|
||||
underaligned_int underaligned_int_test() {
|
||||
// CHECK-LABEL: define i32 @underaligned_int_test()
|
||||
// CHECK-LABEL: define{{.*}} i32 @underaligned_int_test()
|
||||
return va_arg(the_list, underaligned_int);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -278,7 +278,7 @@ underaligned_int underaligned_int_test() {
|
||||
|
||||
typedef int overaligned_int __attribute__((aligned(32)));
|
||||
overaligned_int overaligned_int_test() {
|
||||
// CHECK-LABEL: define i32 @overaligned_int_test()
|
||||
// CHECK-LABEL: define{{.*}} i32 @overaligned_int_test()
|
||||
return va_arg(the_list, overaligned_int);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -315,7 +315,7 @@ overaligned_int overaligned_int_test() {
|
||||
|
||||
typedef long long underaligned_long_long __attribute__((packed,aligned(2)));
|
||||
underaligned_long_long underaligned_long_long_test() {
|
||||
// CHECK-LABEL: define i64 @underaligned_long_long_test()
|
||||
// CHECK-LABEL: define{{.*}} i64 @underaligned_long_long_test()
|
||||
return va_arg(the_list, underaligned_long_long);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -348,7 +348,7 @@ underaligned_long_long underaligned_long_long_test() {
|
||||
|
||||
typedef long long overaligned_long_long __attribute__((aligned(32)));
|
||||
overaligned_long_long overaligned_long_long_test() {
|
||||
// CHECK-LABEL: define i64 @overaligned_long_long_test()
|
||||
// CHECK-LABEL: define{{.*}} i64 @overaligned_long_long_test()
|
||||
return va_arg(the_list, overaligned_long_long);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -381,7 +381,7 @@ overaligned_long_long overaligned_long_long_test() {
|
||||
|
||||
typedef __int128 underaligned_int128 __attribute__((packed,aligned(2)));
|
||||
underaligned_int128 underaligned_int128_test() {
|
||||
// CHECK-LABEL: define i128 @underaligned_int128_test()
|
||||
// CHECK-LABEL: define{{.*}} i128 @underaligned_int128_test()
|
||||
return va_arg(the_list, underaligned_int128);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -420,7 +420,7 @@ underaligned_int128 underaligned_int128_test() {
|
||||
|
||||
typedef __int128 overaligned_int128 __attribute__((aligned(32)));
|
||||
overaligned_int128 overaligned_int128_test() {
|
||||
// CHECK-LABEL: define i128 @overaligned_int128_test()
|
||||
// CHECK-LABEL: define{{.*}} i128 @overaligned_int128_test()
|
||||
return va_arg(the_list, overaligned_int128);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -473,7 +473,7 @@ typedef struct __attribute__((packed,aligned(2))) {
|
||||
int val;
|
||||
} underaligned_int_struct;
|
||||
underaligned_int_struct underaligned_int_struct_test() {
|
||||
// CHECK-LABEL: define i64 @underaligned_int_struct_test()
|
||||
// CHECK-LABEL: define{{.*}} i64 @underaligned_int_struct_test()
|
||||
return va_arg(the_list, underaligned_int_struct);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -506,7 +506,7 @@ typedef struct __attribute__((aligned(16))) {
|
||||
int val;
|
||||
} overaligned_int_struct;
|
||||
overaligned_int_struct overaligned_int_struct_test() {
|
||||
// CHECK-LABEL: define i128 @overaligned_int_struct_test()
|
||||
// CHECK-LABEL: define{{.*}} i128 @overaligned_int_struct_test()
|
||||
return va_arg(the_list, overaligned_int_struct);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -539,7 +539,7 @@ typedef struct __attribute__((packed,aligned(2))) {
|
||||
long long val;
|
||||
} underaligned_long_long_struct;
|
||||
underaligned_long_long_struct underaligned_long_long_struct_test() {
|
||||
// CHECK-LABEL: define i64 @underaligned_long_long_struct_test()
|
||||
// CHECK-LABEL: define{{.*}} i64 @underaligned_long_long_struct_test()
|
||||
return va_arg(the_list, underaligned_long_long_struct);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -572,7 +572,7 @@ typedef struct __attribute__((aligned(16))) {
|
||||
long long val;
|
||||
} overaligned_long_long_struct;
|
||||
overaligned_long_long_struct overaligned_long_long_struct_test() {
|
||||
// CHECK-LABEL: define i128 @overaligned_long_long_struct_test()
|
||||
// CHECK-LABEL: define{{.*}} i128 @overaligned_long_long_struct_test()
|
||||
return va_arg(the_list, overaligned_long_long_struct);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -605,7 +605,7 @@ typedef struct __attribute__((packed,aligned(2))) {
|
||||
__int128 val;
|
||||
} underaligned_int128_struct;
|
||||
underaligned_int128_struct underaligned_int128_struct_test() {
|
||||
// CHECK-LABEL: define [2 x i64] @underaligned_int128_struct_test()
|
||||
// CHECK-LABEL: define{{.*}} [2 x i64] @underaligned_int128_struct_test()
|
||||
return va_arg(the_list, underaligned_int128_struct);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -639,7 +639,7 @@ typedef struct __attribute__((aligned(32))) {
|
||||
__int128 val;
|
||||
} overaligned_int128_struct;
|
||||
overaligned_int128_struct overaligned_int128_struct_test() {
|
||||
// CHECK-LABEL: define void @overaligned_int128_struct_test(%struct.overaligned_int128_struct* noalias sret(%struct.overaligned_int128_struct) align 32 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @overaligned_int128_struct_test(%struct.overaligned_int128_struct* noalias sret(%struct.overaligned_int128_struct) align 32 %agg.result)
|
||||
return va_arg(the_list, overaligned_int128_struct);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -675,7 +675,7 @@ typedef struct {
|
||||
int val __attribute__((packed,aligned(2)));
|
||||
} underaligned_int_struct_member;
|
||||
underaligned_int_struct_member underaligned_int_struct_member_test() {
|
||||
// CHECK-LABEL: define i64 @underaligned_int_struct_member_test()
|
||||
// CHECK-LABEL: define{{.*}} i64 @underaligned_int_struct_member_test()
|
||||
return va_arg(the_list, underaligned_int_struct_member);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -708,7 +708,7 @@ typedef struct {
|
||||
int val __attribute__((aligned(16)));
|
||||
} overaligned_int_struct_member;
|
||||
overaligned_int_struct_member overaligned_int_struct_member_test() {
|
||||
// CHECK-LABEL: define i128 @overaligned_int_struct_member_test()
|
||||
// CHECK-LABEL: define{{.*}} i128 @overaligned_int_struct_member_test()
|
||||
return va_arg(the_list, overaligned_int_struct_member);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -747,7 +747,7 @@ typedef struct {
|
||||
long long val __attribute__((packed,aligned(2)));
|
||||
} underaligned_long_long_struct_member;
|
||||
underaligned_long_long_struct_member underaligned_long_long_struct_member_test() {
|
||||
// CHECK-LABEL: define i64 @underaligned_long_long_struct_member_test()
|
||||
// CHECK-LABEL: define{{.*}} i64 @underaligned_long_long_struct_member_test()
|
||||
return va_arg(the_list, underaligned_long_long_struct_member);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -780,7 +780,7 @@ typedef struct {
|
||||
long long val __attribute__((aligned(16)));
|
||||
} overaligned_long_long_struct_member;
|
||||
overaligned_long_long_struct_member overaligned_long_long_struct_member_test() {
|
||||
// CHECK-LABEL: define i128 @overaligned_long_long_struct_member_test()
|
||||
// CHECK-LABEL: define{{.*}} i128 @overaligned_long_long_struct_member_test()
|
||||
return va_arg(the_list, overaligned_long_long_struct_member);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -819,7 +819,7 @@ typedef struct {
|
||||
__int128 val __attribute__((packed,aligned(2)));
|
||||
} underaligned_int128_struct_member;
|
||||
underaligned_int128_struct_member underaligned_int128_struct_member_test() {
|
||||
// CHECK-LABEL: define [2 x i64] @underaligned_int128_struct_member_test()
|
||||
// CHECK-LABEL: define{{.*}} [2 x i64] @underaligned_int128_struct_member_test()
|
||||
return va_arg(the_list, underaligned_int128_struct_member);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -853,7 +853,7 @@ typedef struct {
|
||||
__int128 val __attribute__((aligned(32)));
|
||||
} overaligned_int128_struct_member;
|
||||
overaligned_int128_struct_member overaligned_int128_struct_member_test() {
|
||||
// CHECK-LABEL: define void @overaligned_int128_struct_member_test(%struct.overaligned_int128_struct_member* noalias sret(%struct.overaligned_int128_struct_member) align 32 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @overaligned_int128_struct_member_test(%struct.overaligned_int128_struct_member* noalias sret(%struct.overaligned_int128_struct_member) align 32 %agg.result)
|
||||
return va_arg(the_list, overaligned_int128_struct_member);
|
||||
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
|
||||
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
|
||||
@ -883,7 +883,7 @@ overaligned_int128_struct_member overaligned_int128_struct_member_test() {
|
||||
}
|
||||
|
||||
void check_start(int n, ...) {
|
||||
// CHECK-LABEL: define void @check_start(i32 %n, ...)
|
||||
// CHECK-LABEL: define{{.*}} void @check_start(i32 %n, ...)
|
||||
|
||||
va_list the_list;
|
||||
va_start(the_list, n);
|
||||
|
||||
@ -4,8 +4,8 @@
|
||||
|
||||
void __attribute__((aarch64_vector_pcs)) f(int *); // expected-warning {{'aarch64_vector_pcs' calling convention is not supported for this target}}
|
||||
|
||||
// CHECKC: define void @g(
|
||||
// CHECKCXX: define void @_Z1gPi(
|
||||
// CHECKC: define{{.*}} void @g(
|
||||
// CHECKCXX: define{{.*}} void @_Z1gPi(
|
||||
void g(int *a) {
|
||||
|
||||
// CHECKC: call aarch64_vector_pcs void @f(
|
||||
@ -17,7 +17,7 @@ void g(int *a) {
|
||||
// CHECKCXX: declare aarch64_vector_pcs void @_Z1fPi
|
||||
|
||||
void __attribute__((aarch64_vector_pcs)) h(int *a){ // expected-warning {{'aarch64_vector_pcs' calling convention is not supported for this target}}
|
||||
// CHECKC: define aarch64_vector_pcs void @h(
|
||||
// CHECKCXX: define aarch64_vector_pcs void @_Z1hPi(
|
||||
// CHECKC: define{{.*}} aarch64_vector_pcs void @h(
|
||||
// CHECKCXX: define{{.*}} aarch64_vector_pcs void @_Z1hPi(
|
||||
f(a);
|
||||
}
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
// Test that function declarations in nonzero address spaces without prototype
|
||||
// are called correctly.
|
||||
|
||||
// CHECK: define void @bar() addrspace(1)
|
||||
// CHECK: define{{.*}} void @bar() addrspace(1)
|
||||
// CHECK: call addrspace(1) void bitcast (void (...) addrspace(1)* @foo to void (i16) addrspace(1)*)(i16 3)
|
||||
// CHECK: declare void @foo(...) addrspace(1)
|
||||
void foo();
|
||||
|
||||
@ -4,5 +4,5 @@ int mul(int a, int b) {
|
||||
return a * b;
|
||||
}
|
||||
|
||||
// CHECK: @multiply = alias i16 (i16, i16), i16 (i16, i16) addrspace(1)* @mul
|
||||
// CHECK: @multiply ={{.*}} alias i16 (i16, i16), i16 (i16, i16) addrspace(1)* @mul
|
||||
int multiply(int x, int y) __attribute__((alias("mul")));
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=CHECKGLOBALS %s
|
||||
|
||||
int g0;
|
||||
// CHECKBASIC-DAG: @g0 = global i32 0
|
||||
// CHECKBASIC-DAG: @g0 ={{.*}} global i32 0
|
||||
// CHECKASM-DAG: .bss
|
||||
// CHECKASM-DAG: .globl g0
|
||||
// CHECKASM-DAG: .p2align 2
|
||||
@ -13,7 +13,7 @@ int g0;
|
||||
// CHECKASM-DAG: .long 0
|
||||
// CHECKASM-DAG: .size g0, 4
|
||||
__thread int TL_WITH_ALIAS;
|
||||
// CHECKBASIC-DAG: @TL_WITH_ALIAS = thread_local global i32 0, align 4
|
||||
// CHECKBASIC-DAG: @TL_WITH_ALIAS ={{.*}} thread_local global i32 0, align 4
|
||||
// CHECKASM-DAG: .globl TL_WITH_ALIAS
|
||||
// CHECKASM-DAG: .size TL_WITH_ALIAS, 4
|
||||
static int bar1 = 42;
|
||||
@ -23,24 +23,24 @@ static int bar1 = 42;
|
||||
|
||||
// PR24379: alias variable expected to have same size as aliasee even when types differ
|
||||
const int wacom_usb_ids[] = {1, 1, 2, 3, 5, 8, 13, 0};
|
||||
// CHECKBASIC-DAG: @wacom_usb_ids = constant [8 x i32] [i32 1, i32 1, i32 2, i32 3, i32 5, i32 8, i32 13, i32 0], align 4
|
||||
// CHECKBASIC-DAG: @wacom_usb_ids ={{.*}} constant [8 x i32] [i32 1, i32 1, i32 2, i32 3, i32 5, i32 8, i32 13, i32 0], align 4
|
||||
// CHECKASM-DAG: .globl wacom_usb_ids
|
||||
// CHECKASM-DAG: .size wacom_usb_ids, 32
|
||||
extern const int __mod_usb_device_table __attribute__ ((alias("wacom_usb_ids")));
|
||||
// CHECKBASIC-DAG: @__mod_usb_device_table = alias i32, getelementptr inbounds ([8 x i32], [8 x i32]* @wacom_usb_ids, i32 0, i32 0)
|
||||
// CHECKBASIC-DAG: @__mod_usb_device_table ={{.*}} alias i32, getelementptr inbounds ([8 x i32], [8 x i32]* @wacom_usb_ids, i32 0, i32 0)
|
||||
// CHECKASM-DAG: .globl __mod_usb_device_table
|
||||
// CHECKASM-DAG: .set __mod_usb_device_table, wacom_usb_ids
|
||||
// CHECKASM-NOT: .size __mod_usb_device_table
|
||||
|
||||
extern int g1;
|
||||
extern int g1 __attribute((alias("g0")));
|
||||
// CHECKBASIC-DAG: @g1 = alias i32, i32* @g0
|
||||
// CHECKBASIC-DAG: @g1 ={{.*}} alias i32, i32* @g0
|
||||
// CHECKASM-DAG: .globl g1
|
||||
// CHECKASM-DAG: .set g1, g0
|
||||
// CHECKASM-NOT: .size g1
|
||||
|
||||
extern __thread int __libc_errno __attribute__ ((alias ("TL_WITH_ALIAS")));
|
||||
// CHECKBASIC-DAG: @__libc_errno = thread_local alias i32, i32* @TL_WITH_ALIAS
|
||||
// CHECKBASIC-DAG: @__libc_errno ={{.*}} thread_local alias i32, i32* @TL_WITH_ALIAS
|
||||
// CHECKASM-DAG: .globl __libc_errno
|
||||
// CHECKASM-DAG: .set __libc_errno, TL_WITH_ALIAS
|
||||
// CHECKASM-NOT: .size __libc_errno
|
||||
@ -48,11 +48,11 @@ extern __thread int __libc_errno __attribute__ ((alias ("TL_WITH_ALIAS")));
|
||||
void f0(void) { }
|
||||
extern void f1(void);
|
||||
extern void f1(void) __attribute((alias("f0")));
|
||||
// CHECKBASIC-DAG: @f1 = alias void (), void ()* @f0
|
||||
// CHECKBASIC-DAG: @test8_foo = weak alias void (...), bitcast (void ()* @test8_bar to void (...)*)
|
||||
// CHECKBASIC-DAG: @test8_zed = alias void (...), bitcast (void ()* @test8_bar to void (...)*)
|
||||
// CHECKBASIC-DAG: @test9_zed = alias void (), void ()* @test9_bar
|
||||
// CHECKBASIC: define void @f0() [[NUW:#[0-9]+]] {
|
||||
// CHECKBASIC-DAG: @f1 ={{.*}} alias void (), void ()* @f0
|
||||
// CHECKBASIC-DAG: @test8_foo = weak{{.*}} alias void (...), bitcast (void ()* @test8_bar to void (...)*)
|
||||
// CHECKBASIC-DAG: @test8_zed ={{.*}} alias void (...), bitcast (void ()* @test8_bar to void (...)*)
|
||||
// CHECKBASIC-DAG: @test9_zed ={{.*}} alias void (), void ()* @test9_bar
|
||||
// CHECKBASIC: define{{.*}} void @f0() [[NUW:#[0-9]+]] {
|
||||
|
||||
// Make sure that aliases cause referenced values to be emitted.
|
||||
// PR3200
|
||||
@ -71,15 +71,15 @@ static int inner(int a) { return 0; }
|
||||
static int inner_weak(int a) { return 0; }
|
||||
extern __typeof(inner) inner_a __attribute__((alias("inner")));
|
||||
static __typeof(inner_weak) inner_weak_a __attribute__((weakref, alias("inner_weak")));
|
||||
// CHECKCC: @inner_a = alias i32 (i32), i32 (i32)* @inner
|
||||
// CHECKCC: @inner_a ={{.*}} alias i32 (i32), i32 (i32)* @inner
|
||||
// CHECKCC: define internal arm_aapcs_vfpcc i32 @inner(i32 %a) [[NUW:#[0-9]+]] {
|
||||
|
||||
int outer(int a) { return inner(a); }
|
||||
// CHECKCC: define arm_aapcs_vfpcc i32 @outer(i32 %a) [[NUW]] {
|
||||
// CHECKCC: define{{.*}} arm_aapcs_vfpcc i32 @outer(i32 %a) [[NUW]] {
|
||||
// CHECKCC: call arm_aapcs_vfpcc i32 @inner(i32 %{{.*}})
|
||||
|
||||
int outer_weak(int a) { return inner_weak_a(a); }
|
||||
// CHECKCC: define arm_aapcs_vfpcc i32 @outer_weak(i32 %a) [[NUW]] {
|
||||
// CHECKCC: define{{.*}} arm_aapcs_vfpcc i32 @outer_weak(i32 %a) [[NUW]] {
|
||||
// CHECKCC: call arm_aapcs_vfpcc i32 @inner_weak(i32 %{{.*}})
|
||||
// CHECKCC: define internal arm_aapcs_vfpcc i32 @inner_weak(i32 %a) [[NUW]] {
|
||||
|
||||
@ -106,12 +106,12 @@ void test11(void) {}
|
||||
static void test11_foo(void) __attribute__((alias("test11")));
|
||||
|
||||
// Test that gnu_inline+alias work.
|
||||
// CHECKGLOBALS: @test12_alias = alias void (), void ()* @test12
|
||||
// CHECKGLOBALS: @test12_alias ={{.*}} alias void (), void ()* @test12
|
||||
void test12(void) {}
|
||||
inline void test12_alias(void) __attribute__((gnu_inline, alias("test12")));
|
||||
|
||||
// Test that a non visible (-Wvisibility) type doesn't assert.
|
||||
// CHECKGLOBALS: @test13_alias = alias {}, bitcast (void (i32)* @test13 to {}*)
|
||||
// CHECKGLOBALS: @test13_alias ={{.*}} alias {}, bitcast (void (i32)* @test13 to {}*)
|
||||
enum a_type { test13_a };
|
||||
void test13(enum a_type y) {}
|
||||
void test13_alias(enum undeclared_type y) __attribute__((alias ("test13")));
|
||||
|
||||
@ -18,16 +18,16 @@
|
||||
// RUN: not %clang -S -mabi=vec-extabi -target powerpc64-unknown-aix %s 2>&1 | FileCheck %s --check-prefix=AIX-ATVER
|
||||
// Check initialization
|
||||
|
||||
vector int test0 = (vector int)(1); // CHECK: @test0 = global <4 x i32> <i32 1, i32 1, i32 1, i32 1>
|
||||
vector float test1 = (vector float)(1.0); // CHECK: @test1 = global <4 x float> <float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}>
|
||||
vector int test0 = (vector int)(1); // CHECK: @test0 ={{.*}} global <4 x i32> <i32 1, i32 1, i32 1, i32 1>
|
||||
vector float test1 = (vector float)(1.0); // CHECK: @test1 ={{.*}} global <4 x float> <float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}>
|
||||
|
||||
// CHECK: @v1 = global <16 x i8> <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 4>
|
||||
// CHECK: @v1 ={{.*}} global <16 x i8> <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 4>
|
||||
vector char v1 = (vector char)((vector int)(1, 2, 3, 4));
|
||||
// CHECK: @v2 = global <16 x i8> <i8 63, i8 -128, i8 0, i8 0, i8 64, i8 0, i8 0, i8 0, i8 64, i8 64, i8 0, i8 0, i8 64, i8 -128, i8 0, i8 0>
|
||||
// CHECK: @v2 ={{.*}} global <16 x i8> <i8 63, i8 -128, i8 0, i8 0, i8 64, i8 0, i8 0, i8 0, i8 64, i8 64, i8 0, i8 0, i8 64, i8 -128, i8 0, i8 0>
|
||||
vector char v2 = (vector char)((vector float)(1.0f, 2.0f, 3.0f, 4.0f));
|
||||
// CHECK: @v3 = global <16 x i8> <i8 0, i8 0, i8 0, i8 97, i8 0, i8 0, i8 0, i8 98, i8 0, i8 0, i8 0, i8 99, i8 0, i8 0, i8 0, i8 100>
|
||||
// CHECK: @v3 ={{.*}} global <16 x i8> <i8 0, i8 0, i8 0, i8 97, i8 0, i8 0, i8 0, i8 98, i8 0, i8 0, i8 0, i8 99, i8 0, i8 0, i8 0, i8 100>
|
||||
vector char v3 = (vector char)((vector int)('a', 'b', 'c', 'd'));
|
||||
// CHECK: @v4 = global <4 x i32> <i32 16909060, i32 0, i32 0, i32 0>
|
||||
// CHECK: @v4 ={{.*}} global <4 x i32> <i32 16909060, i32 0, i32 0, i32 0>
|
||||
vector int v4 = (vector char){1, 2, 3, 4};
|
||||
|
||||
void test2()
|
||||
|
||||
@ -3,26 +3,26 @@
|
||||
|
||||
// Basic argument tests for ARC.
|
||||
|
||||
// CHECK: define void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k)
|
||||
// CHECK: define{{.*}} void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k)
|
||||
void f0(int i, long j, long long k) {}
|
||||
|
||||
typedef struct {
|
||||
int aa;
|
||||
int bb;
|
||||
} s1;
|
||||
// CHECK: define void @f1(i32 inreg %i.coerce0, i32 inreg %i.coerce1)
|
||||
// CHECK: define{{.*}} void @f1(i32 inreg %i.coerce0, i32 inreg %i.coerce1)
|
||||
void f1(s1 i) {}
|
||||
|
||||
typedef struct {
|
||||
char aa; char bb; char cc; char dd;
|
||||
} cs1;
|
||||
// CHECK: define void @cf1(i32 inreg %i.coerce)
|
||||
// CHECK: define{{.*}} void @cf1(i32 inreg %i.coerce)
|
||||
void cf1(cs1 i) {}
|
||||
|
||||
typedef struct {
|
||||
int cc;
|
||||
} s2;
|
||||
// CHECK: define void @f2(%struct.s2* noalias sret(%struct.s2) align 4 %agg.result)
|
||||
// CHECK: define{{.*}} void @f2(%struct.s2* noalias sret(%struct.s2) align 4 %agg.result)
|
||||
s2 f2() {
|
||||
s2 foo;
|
||||
return foo;
|
||||
@ -32,19 +32,19 @@ typedef struct {
|
||||
int cc;
|
||||
int dd;
|
||||
} s3;
|
||||
// CHECK: define void @f3(%struct.s3* noalias sret(%struct.s3) align 4 %agg.result)
|
||||
// CHECK: define{{.*}} void @f3(%struct.s3* noalias sret(%struct.s3) align 4 %agg.result)
|
||||
s3 f3() {
|
||||
s3 foo;
|
||||
return foo;
|
||||
}
|
||||
|
||||
// CHECK: define void @f4(i64 inreg %i)
|
||||
// CHECK: define{{.*}} void @f4(i64 inreg %i)
|
||||
void f4(long long i) {}
|
||||
|
||||
// CHECK: define void @f5(i8 inreg signext %a, i16 inreg signext %b)
|
||||
// CHECK: define{{.*}} void @f5(i8 inreg signext %a, i16 inreg signext %b)
|
||||
void f5(signed char a, short b) {}
|
||||
|
||||
// CHECK: define void @f6(i8 inreg zeroext %a, i16 inreg zeroext %b)
|
||||
// CHECK: define{{.*}} void @f6(i8 inreg zeroext %a, i16 inreg zeroext %b)
|
||||
void f6(unsigned char a, unsigned short b) {}
|
||||
|
||||
enum my_enum {
|
||||
@ -53,14 +53,14 @@ enum my_enum {
|
||||
ENUM3,
|
||||
};
|
||||
// Enums should be treated as the underlying i32.
|
||||
// CHECK: define void @f7(i32 inreg %a)
|
||||
// CHECK: define{{.*}} void @f7(i32 inreg %a)
|
||||
void f7(enum my_enum a) {}
|
||||
|
||||
enum my_big_enum {
|
||||
ENUM4 = 0xFFFFFFFFFFFFFFFF,
|
||||
};
|
||||
// Big enums should be treated as the underlying i64.
|
||||
// CHECK: define void @f8(i64 inreg %a)
|
||||
// CHECK: define{{.*}} void @f8(i64 inreg %a)
|
||||
void f8(enum my_big_enum a) {}
|
||||
|
||||
union simple_union {
|
||||
@ -68,7 +68,7 @@ union simple_union {
|
||||
char b;
|
||||
};
|
||||
// Unions should be passed inreg.
|
||||
// CHECK: define void @f9(i32 inreg %s.coerce)
|
||||
// CHECK: define{{.*}} void @f9(i32 inreg %s.coerce)
|
||||
void f9(union simple_union s) {}
|
||||
|
||||
typedef struct {
|
||||
@ -77,35 +77,35 @@ typedef struct {
|
||||
int b8 : 8;
|
||||
} bitfield1;
|
||||
// Bitfields should be passed inreg.
|
||||
// CHECK: define void @f10(i32 inreg %bf1.coerce)
|
||||
// CHECK: define{{.*}} void @f10(i32 inreg %bf1.coerce)
|
||||
void f10(bitfield1 bf1) {}
|
||||
|
||||
// CHECK: define inreg { float, float } @cplx1(float inreg %r)
|
||||
// CHECK: define{{.*}} inreg { float, float } @cplx1(float inreg %r)
|
||||
_Complex float cplx1(float r) {
|
||||
return r + 2.0fi;
|
||||
}
|
||||
|
||||
// CHECK: define inreg { double, double } @cplx2(double inreg %r)
|
||||
// CHECK: define{{.*}} inreg { double, double } @cplx2(double inreg %r)
|
||||
_Complex double cplx2(double r) {
|
||||
return r + 2.0i;
|
||||
}
|
||||
|
||||
// CHECK: define inreg { i32, i32 } @cplx3(i32 inreg %r)
|
||||
// CHECK: define{{.*}} inreg { i32, i32 } @cplx3(i32 inreg %r)
|
||||
_Complex int cplx3(int r) {
|
||||
return r + 2i;
|
||||
}
|
||||
|
||||
// CHECK: define inreg { i64, i64 } @cplx4(i64 inreg %r)
|
||||
// CHECK: define{{.*}} inreg { i64, i64 } @cplx4(i64 inreg %r)
|
||||
_Complex long long cplx4(long long r) {
|
||||
return r + 2i;
|
||||
}
|
||||
|
||||
// CHECK: define inreg { i8, i8 } @cplx6(i8 inreg signext %r)
|
||||
// CHECK: define{{.*}} inreg { i8, i8 } @cplx6(i8 inreg signext %r)
|
||||
_Complex signed char cplx6(signed char r) {
|
||||
return r + 2i;
|
||||
}
|
||||
|
||||
// CHECK: define inreg { i16, i16 } @cplx7(i16 inreg signext %r)
|
||||
// CHECK: define{{.*}} inreg { i16, i16 } @cplx7(i16 inreg signext %r)
|
||||
_Complex short cplx7(short r) {
|
||||
return r + 2i;
|
||||
}
|
||||
@ -120,16 +120,16 @@ typedef struct {
|
||||
|
||||
// Use 16-byte struct 2 times, gets 8 registers.
|
||||
void st2(s16 a, s16 b) {}
|
||||
// CHECK: define void @st2(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3)
|
||||
// CHECK: define{{.*}} void @st2(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3)
|
||||
|
||||
// Use 8-byte struct 3 times, gets 8 registers, 1 byval struct argument.
|
||||
void st3(s16 a, s16 b, s16 c) {}
|
||||
// CHECK: define void @st3(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
|
||||
// CHECK: define{{.*}} void @st3(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
|
||||
|
||||
// 1 sret + 1 i32 + 2*(i32 coerce) + 4*(i32 coerce) + 1 byval
|
||||
s16 st4(int x, s8 a, s16 b, s16 c) { return b; }
|
||||
// CHECK: define void @st4(%struct.s16* noalias sret(%struct.s16) align 4 %agg.result, i32 inreg %x, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
|
||||
// CHECK: define{{.*}} void @st4(%struct.s16* noalias sret(%struct.s16) align 4 %agg.result, i32 inreg %x, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
|
||||
|
||||
// 1 sret + 2*(i32 coerce) + 4*(i32 coerce) + 4*(i32 coerce)
|
||||
s16 st5(s8 a, s16 b, s16 c) { return b; }
|
||||
// CHECK: define void @st5(%struct.s16* noalias sret(%struct.s16) align 4 %agg.result, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
|
||||
// CHECK: define{{.*}} void @st5(%struct.s16* noalias sret(%struct.s16) align 4 %agg.result, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
|
||||
|
||||
@ -8,7 +8,7 @@ typedef struct {
|
||||
double bb;
|
||||
} s1;
|
||||
|
||||
// CHECK: define i32 @f1
|
||||
// CHECK: define{{.*}} i32 @f1
|
||||
// CHECK: ret i32 12
|
||||
int f1() {
|
||||
return sizeof(s1);
|
||||
@ -18,7 +18,7 @@ typedef struct {
|
||||
int aa;
|
||||
long long bb;
|
||||
} s2;
|
||||
// CHECK: define i32 @f2
|
||||
// CHECK: define{{.*}} i32 @f2
|
||||
// CHECK: ret i32 12
|
||||
int f2() {
|
||||
return sizeof(s2);
|
||||
|
||||
@ -8,19 +8,19 @@
|
||||
__bf16 test_ret_bf16(__bf16 v) {
|
||||
return v;
|
||||
}
|
||||
// CHECK32-HARD: define arm_aapcs_vfpcc bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
|
||||
// CHECK32-HARD: define{{.*}} arm_aapcs_vfpcc bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
|
||||
// CHECK32-HARD: ret bfloat %v
|
||||
// CHECK32-SOFTFP: define bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
|
||||
// CHECK32-SOFTFP: define{{.*}} bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
|
||||
// CHECK32-SOFTFP: ret bfloat %v
|
||||
// CHECK64: define bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
|
||||
// CHECK64: define{{.*}} bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
|
||||
// CHECK64: ret bfloat %v
|
||||
|
||||
bfloat16x4_t test_ret_bf16x4_t(bfloat16x4_t v) {
|
||||
return v;
|
||||
}
|
||||
// CHECK32-HARD: define arm_aapcs_vfpcc <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
|
||||
// CHECK32-HARD: define{{.*}} arm_aapcs_vfpcc <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
|
||||
// CHECK32-HARD: ret <4 x bfloat> %v
|
||||
// CHECK32-SOFTFP: define <2 x i32> @test_ret_bf16x4_t(<2 x i32> [[V0:.*]]) {{.*}} {
|
||||
// CHECK32-SOFTFP: define{{.*}} <2 x i32> @test_ret_bf16x4_t(<2 x i32> [[V0:.*]]) {{.*}} {
|
||||
// CHECK32-SOFTFP: ret <2 x i32> %v
|
||||
// CHECK64: define <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
|
||||
// CHECK64: define{{.*}} <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
|
||||
// CHECK64: ret <4 x bfloat> %v
|
||||
|
||||
@ -12,11 +12,11 @@
|
||||
// DARWIN-APCS: call void @g
|
||||
// DARWIN-AAPCS-LABEL: define{{.*}} arm_aapcscc void @f()
|
||||
// DARWIN-AAPCS: call arm_aapcscc void @g
|
||||
// LINUX-APCS-LABEL: define arm_apcscc void @f()
|
||||
// LINUX-APCS-LABEL: define{{.*}} arm_apcscc void @f()
|
||||
// LINUX-APCS: call arm_apcscc void @g
|
||||
// LINUX-AAPCS-LABEL: define void @f()
|
||||
// LINUX-AAPCS-LABEL: define{{.*}} void @f()
|
||||
// LINUX-AAPCS: call void @g
|
||||
// BAREMETAL-AAPCS_VFP-LABEL: define void @f()
|
||||
// BAREMETAL-AAPCS_VFP-LABEL: define{{.*}} void @f()
|
||||
// BAREMETAL-AAPCS_VFP: call void @g
|
||||
// BAREMETAL-AAPCS_VFP: declare void @g()
|
||||
void g(void);
|
||||
|
||||
@ -29,12 +29,12 @@ void f4() __attribute__((cmse_nonsecure_entry))
|
||||
{
|
||||
}
|
||||
|
||||
// CHECK: define void @f1(void ()* nocapture %fptr) {{[^#]*}}#0 {
|
||||
// CHECK: define{{.*}} void @f1(void ()* nocapture %fptr) {{[^#]*}}#0 {
|
||||
// CHECK: call void %fptr() #2
|
||||
// CHECK: define void @f2(void ()* nocapture %fptr) {{[^#]*}}#0 {
|
||||
// CHECK: define{{.*}} void @f2(void ()* nocapture %fptr) {{[^#]*}}#0 {
|
||||
// CHECK: call void %fptr() #2
|
||||
// CHECK: define void @f3() {{[^#]*}}#1 {
|
||||
// CHECK: define void @f4() {{[^#]*}}#1 {
|
||||
// CHECK: define{{.*}} void @f3() {{[^#]*}}#1 {
|
||||
// CHECK: define{{.*}} void @f4() {{[^#]*}}#1 {
|
||||
|
||||
// CHECK-NOSE-NOT: cmse_nonsecure_entry
|
||||
// CHECK-NOSE-NOT: cmse_nonsecure_call
|
||||
|
||||
@ -32,192 +32,192 @@
|
||||
// other runtime functions such as the _Complex helper routines are not covered.
|
||||
|
||||
float fadd(float a, float b) { return a + b; }
|
||||
// CHECK-LABEL: define float @fadd(float %a, float %b)
|
||||
// CHECK-LABEL: define{{.*}} float @fadd(float %a, float %b)
|
||||
// CHECK-NOT: __aeabi_fadd
|
||||
// CHECK: %add = fadd float {{.*}}, {{.*}}
|
||||
|
||||
float fdiv(float a, float b) { return a / b; }
|
||||
// CHECK-LABEL: define float @fdiv(float %a, float %b)
|
||||
// CHECK-LABEL: define{{.*}} float @fdiv(float %a, float %b)
|
||||
// CHECK-NOT: __aeabi_fdiv
|
||||
// CHECK: %div = fdiv float {{.*}}, {{.*}}
|
||||
|
||||
float fmul(float a, float b) { return a * b; }
|
||||
// CHECK-LABEL: define float @fmul(float %a, float %b)
|
||||
// CHECK-LABEL: define{{.*}} float @fmul(float %a, float %b)
|
||||
// CHECK-NOT: __aeabi_fmul
|
||||
// CHECK: %mul = fmul float {{.*}}, {{.*}}
|
||||
|
||||
float fsub(float a, float b) { return a - b; }
|
||||
// CHECK-LABEL: define float @fsub(float %a, float %b)
|
||||
// CHECK-LABEL: define{{.*}} float @fsub(float %a, float %b)
|
||||
// CHECK-NOT: __aeabi_fsub
|
||||
// CHECK: %sub = fsub float {{.*}}, {{.*}}
|
||||
|
||||
int fcmpeq(float a, float b) { return a == b; }
|
||||
// CHECK-LABEL: define i32 @fcmpeq(float %a, float %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @fcmpeq(float %a, float %b)
|
||||
// CHECK-NOT: __aeabi_fcmpeq
|
||||
// CHECK: %cmp = fcmp oeq float {{.*}}, {{.*}}
|
||||
|
||||
int fcmplt(float a, float b) { return a < b; }
|
||||
// CHECK-LABEL: define i32 @fcmplt(float %a, float %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @fcmplt(float %a, float %b)
|
||||
// CHECK-NOT: __aeabi_fcmplt
|
||||
// CHECK: %cmp = fcmp olt float {{.*}}, {{.*}}
|
||||
|
||||
int fcmple(float a, float b) { return a <= b; }
|
||||
// CHECK-LABEL: define i32 @fcmple(float %a, float %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @fcmple(float %a, float %b)
|
||||
// CHECK-NOT: __aeabi_fcmple
|
||||
// CHECK: %cmp = fcmp ole float {{.*}}, {{.*}}
|
||||
|
||||
int fcmpge(float a, float b) { return a >= b; }
|
||||
// CHECK-LABEL: define i32 @fcmpge(float %a, float %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @fcmpge(float %a, float %b)
|
||||
// CHECK-NOT: __aeabi_fcmpge
|
||||
// CHECK: %cmp = fcmp oge float {{.*}}, {{.*}}
|
||||
|
||||
int fcmpgt(float a, float b) { return a > b; }
|
||||
// CHECK-LABEL: define i32 @fcmpgt(float %a, float %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @fcmpgt(float %a, float %b)
|
||||
// CHECK-NOT: __aeabi_fcmpgt
|
||||
// CHECK: %cmp = fcmp ogt float {{.*}}, {{.*}}
|
||||
|
||||
int fcmpun(float a, float b) { return __builtin_isunordered(a, b); }
|
||||
// CHECK-LABEL: define i32 @fcmpun(float %a, float %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @fcmpun(float %a, float %b)
|
||||
// CHECK-NOT: __aeabi_fcmpun
|
||||
// CHECK: %cmp = fcmp uno float {{.*}}, {{.*}}
|
||||
|
||||
double dadd(double a, double b) { return a + b; }
|
||||
// CHECK-LABEL: define double @dadd(double %a, double %b)
|
||||
// CHECK-LABEL: define{{.*}} double @dadd(double %a, double %b)
|
||||
// CHECK-NOT: __aeabi_dadd
|
||||
// CHECK: %add = fadd double {{.*}}, {{.*}}
|
||||
|
||||
double ddiv(double a, double b) { return a / b; }
|
||||
// CHECK-LABEL: define double @ddiv(double %a, double %b)
|
||||
// CHECK-LABEL: define{{.*}} double @ddiv(double %a, double %b)
|
||||
// CHECK-NOT: __aeabi_ddiv
|
||||
// CHECK: %div = fdiv double {{.*}}, {{.*}}
|
||||
|
||||
double dmul(double a, double b) { return a * b; }
|
||||
// CHECK-LABEL: define double @dmul(double %a, double %b)
|
||||
// CHECK-LABEL: define{{.*}} double @dmul(double %a, double %b)
|
||||
// CHECK-NOT: __aeabi_dmul
|
||||
// CHECK: %mul = fmul double {{.*}}, {{.*}}
|
||||
|
||||
double dsub(double a, double b) { return a - b; }
|
||||
// CHECK-LABEL: define double @dsub(double %a, double %b)
|
||||
// CHECK-LABEL: define{{.*}} double @dsub(double %a, double %b)
|
||||
// CHECK-NOT: __aeabi_dsub
|
||||
// CHECK: %sub = fsub double {{.*}}, {{.*}}
|
||||
|
||||
int dcmpeq(double a, double b) { return a == b; }
|
||||
// CHECK-LABEL: define i32 @dcmpeq(double %a, double %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @dcmpeq(double %a, double %b)
|
||||
// CHECK-NOT: __aeabi_dcmpeq
|
||||
// CHECK: %cmp = fcmp oeq double {{.*}}, {{.*}}
|
||||
|
||||
int dcmplt(double a, double b) { return a < b; }
|
||||
// CHECK-LABEL: define i32 @dcmplt(double %a, double %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @dcmplt(double %a, double %b)
|
||||
// CHECK-NOT: __aeabi_dcmplt
|
||||
// CHECK: %cmp = fcmp olt double {{.*}}, {{.*}}
|
||||
|
||||
int dcmple(double a, double b) { return a <= b; }
|
||||
// CHECK-LABEL: define i32 @dcmple(double %a, double %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @dcmple(double %a, double %b)
|
||||
// CHECK-NOT: __aeabi_dcmple
|
||||
// CHECK: %cmp = fcmp ole double {{.*}}, {{.*}}
|
||||
|
||||
int dcmpge(double a, double b) { return a >= b; }
|
||||
// CHECK-LABEL: define i32 @dcmpge(double %a, double %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @dcmpge(double %a, double %b)
|
||||
// CHECK-NOT: __aeabi_dcmpge
|
||||
// CHECK: %cmp = fcmp oge double {{.*}}, {{.*}}
|
||||
|
||||
int dcmpgt(double a, double b) { return a > b; }
|
||||
// CHECK-LABEL: define i32 @dcmpgt(double %a, double %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @dcmpgt(double %a, double %b)
|
||||
// CHECK-NOT: __aeabi_dcmpgt
|
||||
// CHECK: %cmp = fcmp ogt double {{.*}}, {{.*}}
|
||||
|
||||
int dcmpun(double a, double b) { return __builtin_isunordered(a, b); }
|
||||
// CHECK-LABEL: define i32 @dcmpun(double %a, double %b)
|
||||
// CHECK-LABEL: define{{.*}} i32 @dcmpun(double %a, double %b)
|
||||
// CHECK-NOT: __aeabi_dcmpun
|
||||
// CHECK: %cmp = fcmp uno double {{.*}}, {{.*}}
|
||||
|
||||
int d2iz(double a) { return (int)a; }
|
||||
// CHECK-LABEL: define i32 @d2iz(double %a)
|
||||
// CHECK-LABEL: define{{.*}} i32 @d2iz(double %a)
|
||||
// CHECK-NOT: __aeabi_d2iz
|
||||
// CHECK: %conv = fptosi double {{.*}} to i32
|
||||
|
||||
unsigned int d2uiz(double a) { return (unsigned int)a; }
|
||||
// CHECK-LABEL: define i32 @d2uiz(double %a)
|
||||
// CHECK-LABEL: define{{.*}} i32 @d2uiz(double %a)
|
||||
// CHECK-NOT: __aeabi_d2uiz
|
||||
// CHECK: %conv = fptoui double {{.*}} to i32
|
||||
|
||||
long long d2lz(double a) { return (long long)a; }
|
||||
// CHECK-LABEL: define i64 @d2lz(double %a)
|
||||
// CHECK-LABEL: define{{.*}} i64 @d2lz(double %a)
|
||||
// CHECK-NOT: __aeabi_d2lz
|
||||
// CHECK: %conv = fptosi double {{.*}} to i64
|
||||
|
||||
unsigned long long d2ulz(double a) { return (unsigned long long)a; }
|
||||
// CHECK-LABEL: define i64 @d2ulz(double %a)
|
||||
// CHECK-LABEL: define{{.*}} i64 @d2ulz(double %a)
|
||||
// CHECK-NOT: __aeabi_d2ulz
|
||||
// CHECK: %conv = fptoui double {{.*}} to i64
|
||||
|
||||
int f2iz(float a) { return (int)a; }
|
||||
// CHECK-LABEL: define i32 @f2iz(float %a)
|
||||
// CHECK-LABEL: define{{.*}} i32 @f2iz(float %a)
|
||||
// CHECK-NOT: __aeabi_f2iz
|
||||
// CHECK: %conv = fptosi float {{.*}} to i32
|
||||
|
||||
unsigned int f2uiz(float a) { return (unsigned int)a; }
|
||||
// CHECK-LABEL: define i32 @f2uiz(float %a)
|
||||
// CHECK-LABEL: define{{.*}} i32 @f2uiz(float %a)
|
||||
// CHECK-NOT: __aeabi_f2uiz
|
||||
// CHECK: %conv = fptoui float {{.*}} to i32
|
||||
|
||||
long long f2lz(float a) { return (long long)a; }
|
||||
// CHECK-LABEL: define i64 @f2lz(float %a)
|
||||
// CHECK-LABEL: define{{.*}} i64 @f2lz(float %a)
|
||||
// CHECK-NOT: __aeabi_f2lz
|
||||
// CHECK: %conv = fptosi float {{.*}} to i64
|
||||
|
||||
unsigned long long f2ulz(float a) { return (unsigned long long)a; }
|
||||
// CHECK-LABEL: define i64 @f2ulz(float %a)
|
||||
// CHECK-LABEL: define{{.*}} i64 @f2ulz(float %a)
|
||||
// CHECK-NOT: __aeabi_f2ulz
|
||||
// CHECK: %conv = fptoui float {{.*}} to i64
|
||||
|
||||
float d2f(double a) { return (float)a; }
|
||||
// CHECK-LABEL: define float @d2f(double %a)
|
||||
// CHECK-LABEL: define{{.*}} float @d2f(double %a)
|
||||
// CHECK-NOT: __aeabi_d2f
|
||||
// CHECK: %conv = fptrunc double {{.*}} to float
|
||||
|
||||
double f2d(float a) { return (double)a; }
|
||||
// CHECK-LABEL: define double @f2d(float %a)
|
||||
// CHECK-LABEL: define{{.*}} double @f2d(float %a)
|
||||
// CHECK-NOT: __aeabi_f2d
|
||||
// CHECK: %conv = fpext float {{.*}} to double
|
||||
|
||||
double i2d(int a) { return (double)a; }
|
||||
// CHECK-LABEL: define double @i2d(i32 %a)
|
||||
// CHECK-LABEL: define{{.*}} double @i2d(i32 %a)
|
||||
// CHECK-NOT: __aeabi_i2d
|
||||
// CHECK: %conv = sitofp i32 {{.*}} to double
|
||||
|
||||
double ui2d(unsigned int a) { return (double)a; }
|
||||
// CHECK-LABEL: define double @ui2d(i32 %a)
|
||||
// CHECK-LABEL: define{{.*}} double @ui2d(i32 %a)
|
||||
// CHECK-NOT: __aeabi_ui2d
|
||||
// CHECK: %conv = uitofp i32 {{.*}} to double
|
||||
|
||||
double l2d(long long a) { return (double)a; }
|
||||
// CHECK-LABEL: define double @l2d(i64 %a)
|
||||
// CHECK-LABEL: define{{.*}} double @l2d(i64 %a)
|
||||
// CHECK-NOT: __aeabi_l2d
|
||||
// CHECK: %conv = sitofp i64 {{.*}} to double
|
||||
|
||||
double ul2d(unsigned long long a) { return (unsigned long long)a; }
|
||||
// CHECK-LABEL: define double @ul2d(i64 %a)
|
||||
// CHECK-LABEL: define{{.*}} double @ul2d(i64 %a)
|
||||
// CHECK-NOT: __aeabi_ul2d
|
||||
// CHECK: %conv = uitofp i64 {{.*}} to double
|
||||
|
||||
float i2f(int a) { return (int)a; }
|
||||
// CHECK-LABEL: define float @i2f(i32 %a)
|
||||
// CHECK-LABEL: define{{.*}} float @i2f(i32 %a)
|
||||
// CHECK-NOT: __aeabi_i2f
|
||||
// CHECK: %conv = sitofp i32 {{.*}} to float
|
||||
|
||||
float ui2f(unsigned int a) { return (unsigned int)a; }
|
||||
// CHECK-LABEL: define float @ui2f(i32 %a)
|
||||
// CHECK-LABEL: define{{.*}} float @ui2f(i32 %a)
|
||||
// CHECK-NOT: __aeabi_ui2f
|
||||
// CHECK: %conv = uitofp i32 {{.*}} to float
|
||||
|
||||
float l2f(long long a) { return (long long)a; }
|
||||
// CHECK-LABEL: define float @l2f(i64 %a)
|
||||
// CHECK-LABEL: define{{.*}} float @l2f(i64 %a)
|
||||
// CHECK-NOT: __aeabi_l2f
|
||||
// CHECK: %conv = sitofp i64 {{.*}} to float
|
||||
|
||||
float ul2f(unsigned long long a) { return (unsigned long long)a; }
|
||||
// CHECK-LABEL: define float @ul2f(i64 %a)
|
||||
// CHECK-LABEL: define{{.*}} float @ul2f(i64 %a)
|
||||
// CHECK-NOT: __aeabi_ul2f
|
||||
// CHECK: %conv = uitofp i64 {{.*}} to float
|
||||
|
||||
|
||||
@ -5,29 +5,29 @@
|
||||
__fp16 g;
|
||||
|
||||
void t1(__fp16 a) { g = a; }
|
||||
// SOFT: define void @t1(half [[PARAM:%.*]])
|
||||
// HARD: define arm_aapcs_vfpcc void @t1(half [[PARAM:%.*]])
|
||||
// NATIVE: define void @t1(half [[PARAM:%.*]])
|
||||
// SOFT: define{{.*}} void @t1(half [[PARAM:%.*]])
|
||||
// HARD: define{{.*}} arm_aapcs_vfpcc void @t1(half [[PARAM:%.*]])
|
||||
// NATIVE: define{{.*}} void @t1(half [[PARAM:%.*]])
|
||||
// CHECK: store half [[PARAM]], half* @g
|
||||
|
||||
__fp16 t2() { return g; }
|
||||
// SOFT: define half @t2()
|
||||
// HARD: define arm_aapcs_vfpcc half @t2()
|
||||
// NATIVE: define half @t2()
|
||||
// SOFT: define{{.*}} half @t2()
|
||||
// HARD: define{{.*}} arm_aapcs_vfpcc half @t2()
|
||||
// NATIVE: define{{.*}} half @t2()
|
||||
// CHECK: [[LOAD:%.*]] = load half, half* @g
|
||||
// CHECK: ret half [[LOAD]]
|
||||
|
||||
_Float16 h;
|
||||
|
||||
void t3(_Float16 a) { h = a; }
|
||||
// SOFT: define void @t3(half [[PARAM:%.*]])
|
||||
// HARD: define arm_aapcs_vfpcc void @t3(half [[PARAM:%.*]])
|
||||
// NATIVE: define void @t3(half [[PARAM:%.*]])
|
||||
// SOFT: define{{.*}} void @t3(half [[PARAM:%.*]])
|
||||
// HARD: define{{.*}} arm_aapcs_vfpcc void @t3(half [[PARAM:%.*]])
|
||||
// NATIVE: define{{.*}} void @t3(half [[PARAM:%.*]])
|
||||
// CHECK: store half [[PARAM]], half* @h
|
||||
|
||||
_Float16 t4() { return h; }
|
||||
// SOFT: define half @t4()
|
||||
// HARD: define arm_aapcs_vfpcc half @t4()
|
||||
// NATIVE: define half @t4()
|
||||
// SOFT: define{{.*}} half @t4()
|
||||
// HARD: define{{.*}} arm_aapcs_vfpcc half @t4()
|
||||
// NATIVE: define{{.*}} half @t4()
|
||||
// CHECK: [[LOAD:%.*]] = load half, half* @h
|
||||
// CHECK: ret half [[LOAD]]
|
||||
|
||||
@ -223,7 +223,7 @@ struct_of_double_and_long_double g_dld;
|
||||
struct_of_double_and_long_double test_struct_of_double_and_long_double(void) {
|
||||
return g_dld;
|
||||
}
|
||||
// CHECK: define arm_aapcs_vfpcc %struct.struct_of_double_and_long_double @test_struct_of_double_and_long_double()
|
||||
// CHECK: define{{.*}} arm_aapcs_vfpcc %struct.struct_of_double_and_long_double @test_struct_of_double_and_long_double()
|
||||
|
||||
// FIXME: Tests necessary:
|
||||
// - Vectors
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrnda_f32(<2 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vrnda_f32(<2 x float> %a)
|
||||
// CHECK-A32: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrinta.v2f32(<2 x float> %a)
|
||||
// CHECK-A64: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRNDA_V1_I]]
|
||||
@ -15,7 +15,7 @@ float32x2_t test_vrnda_f32(float32x2_t a) {
|
||||
return vrnda_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndaq_f32(<4 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndaq_f32(<4 x float> %a)
|
||||
// CHECK-A32: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrinta.v4f32(<4 x float> %a)
|
||||
// CHECK-A64: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDAQ_V1_I]]
|
||||
@ -23,7 +23,7 @@ float32x4_t test_vrndaq_f32(float32x4_t a) {
|
||||
return vrndaq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndm_f32(<2 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vrndm_f32(<2 x float> %a)
|
||||
// CHECK-A32: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintm.v2f32(<2 x float> %a)
|
||||
// CHECK-A64: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRNDM_V1_I]]
|
||||
@ -31,7 +31,7 @@ float32x2_t test_vrndm_f32(float32x2_t a) {
|
||||
return vrndm_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndmq_f32(<4 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndmq_f32(<4 x float> %a)
|
||||
// CHECK-A32: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintm.v4f32(<4 x float> %a)
|
||||
// CHECK-A64: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDMQ_V1_I]]
|
||||
@ -39,7 +39,7 @@ float32x4_t test_vrndmq_f32(float32x4_t a) {
|
||||
return vrndmq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndn_f32(<2 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vrndn_f32(<2 x float> %a)
|
||||
// CHECK-A32: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintn.v2f32(<2 x float> %a)
|
||||
// CHECK-A64: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRNDN_V1_I]]
|
||||
@ -47,7 +47,7 @@ float32x2_t test_vrndn_f32(float32x2_t a) {
|
||||
return vrndn_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndnq_f32(<4 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndnq_f32(<4 x float> %a)
|
||||
// CHECK-A32: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintn.v4f32(<4 x float> %a)
|
||||
// CHECK-A64: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDNQ_V1_I]]
|
||||
@ -55,7 +55,7 @@ float32x4_t test_vrndnq_f32(float32x4_t a) {
|
||||
return vrndnq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndp_f32(<2 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vrndp_f32(<2 x float> %a)
|
||||
// CHECK-A32: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintp.v2f32(<2 x float> %a)
|
||||
// CHECK-A64: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRNDP_V1_I]]
|
||||
@ -63,7 +63,7 @@ float32x2_t test_vrndp_f32(float32x2_t a) {
|
||||
return vrndp_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndpq_f32(<4 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndpq_f32(<4 x float> %a)
|
||||
// CHECK-A32: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintp.v4f32(<4 x float> %a)
|
||||
// CHECK-A64: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDPQ_V1_I]]
|
||||
@ -71,7 +71,7 @@ float32x4_t test_vrndpq_f32(float32x4_t a) {
|
||||
return vrndpq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndx_f32(<2 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vrndx_f32(<2 x float> %a)
|
||||
// CHECK-A32: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintx.v2f32(<2 x float> %a)
|
||||
// CHECK-A64: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRNDX_V1_I]]
|
||||
@ -79,7 +79,7 @@ float32x2_t test_vrndx_f32(float32x2_t a) {
|
||||
return vrndx_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndxq_f32(<4 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndxq_f32(<4 x float> %a)
|
||||
// CHECK-A32: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintx.v4f32(<4 x float> %a)
|
||||
// CHECK-A64: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDXQ_V1_I]]
|
||||
@ -87,7 +87,7 @@ float32x4_t test_vrndxq_f32(float32x4_t a) {
|
||||
return vrndxq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrnd_f32(<2 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vrnd_f32(<2 x float> %a)
|
||||
// CHECK-A32: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintz.v2f32(<2 x float> %a)
|
||||
// CHECK-A64: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.trunc.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRND_V1_I]]
|
||||
@ -95,7 +95,7 @@ float32x2_t test_vrnd_f32(float32x2_t a) {
|
||||
return vrnd_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndq_f32(<4 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndq_f32(<4 x float> %a)
|
||||
// CHECK-A32: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintz.v4f32(<4 x float> %a)
|
||||
// CHECK-A64: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDQ_V1_I]]
|
||||
@ -103,7 +103,7 @@ float32x4_t test_vrndq_f32(float32x4_t a) {
|
||||
return vrndq_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define float @test_vrndns_f32(float %a)
|
||||
// CHECK-LABEL: define{{.*}} float @test_vrndns_f32(float %a)
|
||||
// CHECK-A32: [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a)
|
||||
// CHECK-A64: [[VRNDN_I:%.*]] = call float @llvm.aarch64.neon.frintn.f32(float %a)
|
||||
// CHECK: ret float [[VRNDN_I]]
|
||||
@ -111,7 +111,7 @@ float32_t test_vrndns_f32(float32_t a) {
|
||||
return vrndns_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vrndi_f32(<2 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vrndi_f32(<2 x float> %a)
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
|
||||
// CHECK: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %a)
|
||||
// CHECK: ret <2 x float> [[VRNDI1_I]]
|
||||
@ -119,7 +119,7 @@ float32x2_t test_vrndi_f32(float32x2_t a) {
|
||||
return vrndi_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vrndiq_f32(<4 x float> %a)
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vrndiq_f32(<4 x float> %a)
|
||||
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
|
||||
// CHECK: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a)
|
||||
// CHECK: ret <4 x float> [[VRNDI1_I]]
|
||||
|
||||
@ -8,35 +8,35 @@
|
||||
#include <arm_neon.h>
|
||||
|
||||
uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
|
||||
// CHECK-LABEL: define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: ret <2 x i32> [[RESULT]]
|
||||
return vdot_u32(a, b, c);
|
||||
}
|
||||
|
||||
uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
|
||||
// CHECK-LABEL: define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: ret <4 x i32> [[RESULT]]
|
||||
return vdotq_u32(a, b, c);
|
||||
}
|
||||
|
||||
int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
|
||||
// CHECK-LABEL: define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: ret <2 x i32> [[RESULT]]
|
||||
return vdot_s32(a, b, c);
|
||||
}
|
||||
|
||||
int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) {
|
||||
// CHECK-LABEL: define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
|
||||
// CHECK: ret <4 x i32> [[RESULT]]
|
||||
return vdotq_s32(a, b, c);
|
||||
}
|
||||
|
||||
uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
|
||||
// CHECK-LABEL: define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
|
||||
@ -46,7 +46,7 @@ uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
|
||||
}
|
||||
|
||||
uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
|
||||
// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
|
||||
@ -56,7 +56,7 @@ uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
|
||||
}
|
||||
|
||||
int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
|
||||
// CHECK-LABEL: define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
|
||||
@ -66,7 +66,7 @@ int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
|
||||
}
|
||||
|
||||
int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) {
|
||||
// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
|
||||
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
|
||||
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
|
||||
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
|
||||
|
||||
@ -7,21 +7,21 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_fma_order(<2 x float> %accum, <2 x float> %lhs, <2 x float> %rhs) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_fma_order(<2 x float> %accum, <2 x float> %lhs, <2 x float> %rhs) #0 {
|
||||
// CHECK: [[TMP6:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> %lhs, <2 x float> %rhs, <2 x float> %accum) #3
|
||||
// CHECK: ret <2 x float> [[TMP6]]
|
||||
float32x2_t test_fma_order(float32x2_t accum, float32x2_t lhs, float32x2_t rhs) {
|
||||
return vfma_f32(accum, lhs, rhs);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_fmaq_order(<4 x float> %accum, <4 x float> %lhs, <4 x float> %rhs) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_fmaq_order(<4 x float> %accum, <4 x float> %lhs, <4 x float> %rhs) #1 {
|
||||
// CHECK: [[TMP6:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %lhs, <4 x float> %rhs, <4 x float> %accum) #3
|
||||
// CHECK: ret <4 x float> [[TMP6]]
|
||||
float32x4_t test_fmaq_order(float32x4_t accum, float32x4_t lhs, float32x4_t rhs) {
|
||||
return vfmaq_f32(accum, lhs, rhs);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vfma_n_f32(<2 x float> %a, <2 x float> %b, float %n) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vfma_n_f32(<2 x float> %a, <2 x float> %b, float %n) #0 {
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %n, i32 0
|
||||
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %n, i32 1
|
||||
// CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
|
||||
@ -32,7 +32,7 @@ float32x2_t test_vfma_n_f32(float32x2_t a, float32x2_t b, float32_t n) {
|
||||
return vfma_n_f32(a, b, n);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vfmaq_n_f32(<4 x float> %a, <4 x float> %b, float %n) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vfmaq_n_f32(<4 x float> %a, <4 x float> %b, float %n) #1 {
|
||||
// CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %n, i32 0
|
||||
// CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %n, i32 1
|
||||
// CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %n, i32 2
|
||||
|
||||
@ -2,28 +2,28 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vmaxnm_f32(<2 x float> %a, <2 x float> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vmaxnm_f32(<2 x float> %a, <2 x float> %b) #0 {
|
||||
// CHECK: [[VMAXNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float> %a, <2 x float> %b) #3
|
||||
// CHECK: ret <2 x float> [[VMAXNM_V2_I]]
|
||||
float32x2_t test_vmaxnm_f32(float32x2_t a, float32x2_t b) {
|
||||
return vmaxnm_f32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vmaxnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vmaxnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
|
||||
// CHECK: [[VMAXNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float> %a, <4 x float> %b) #3
|
||||
// CHECK: ret <4 x float> [[VMAXNMQ_V2_I]]
|
||||
float32x4_t test_vmaxnmq_f32(float32x4_t a, float32x4_t b) {
|
||||
return vmaxnmq_f32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x float> @test_vminnm_f32(<2 x float> %a, <2 x float> %b) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x float> @test_vminnm_f32(<2 x float> %a, <2 x float> %b) #0 {
|
||||
// CHECK: [[VMINNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float> %a, <2 x float> %b) #3
|
||||
// CHECK: ret <2 x float> [[VMINNM_V2_I]]
|
||||
float32x2_t test_vminnm_f32(float32x2_t a, float32x2_t b) {
|
||||
return vminnm_f32(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x float> @test_vminnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x float> @test_vminnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
|
||||
// CHECK: [[VMINNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float> %a, <4 x float> %b) #3
|
||||
// CHECK: ret <4 x float> [[VMINNMQ_V2_I]]
|
||||
float32x4_t test_vminnmq_f32(float32x4_t a, float32x4_t b) {
|
||||
|
||||
@ -2,112 +2,112 @@
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vcvta_s32_f32(<2 x float> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvta_s32_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VCVTA_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> %a) #3
|
||||
// CHECK: ret <2 x i32> [[VCVTA_S32_V1_I]]
|
||||
int32x2_t test_vcvta_s32_f32(float32x2_t a) {
|
||||
return vcvta_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vcvta_u32_f32(<2 x float> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvta_u32_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VCVTA_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> %a) #3
|
||||
// CHECK: ret <2 x i32> [[VCVTA_U32_V1_I]]
|
||||
uint32x2_t test_vcvta_u32_f32(float32x2_t a) {
|
||||
return vcvta_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vcvtaq_s32_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtaq_s32_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VCVTAQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret <4 x i32> [[VCVTAQ_S32_V1_I]]
|
||||
int32x4_t test_vcvtaq_s32_f32(float32x4_t a) {
|
||||
return vcvtaq_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vcvtaq_u32_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtaq_u32_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VCVTAQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtau.v4i32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret <4 x i32> [[VCVTAQ_U32_V1_I]]
|
||||
uint32x4_t test_vcvtaq_u32_f32(float32x4_t a) {
|
||||
return vcvtaq_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vcvtn_s32_f32(<2 x float> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtn_s32_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VCVTN_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> %a) #3
|
||||
// CHECK: ret <2 x i32> [[VCVTN_S32_V1_I]]
|
||||
int32x2_t test_vcvtn_s32_f32(float32x2_t a) {
|
||||
return vcvtn_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vcvtn_u32_f32(<2 x float> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtn_u32_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VCVTN_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> %a) #3
|
||||
// CHECK: ret <2 x i32> [[VCVTN_U32_V1_I]]
|
||||
uint32x2_t test_vcvtn_u32_f32(float32x2_t a) {
|
||||
return vcvtn_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vcvtnq_s32_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtnq_s32_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VCVTNQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret <4 x i32> [[VCVTNQ_S32_V1_I]]
|
||||
int32x4_t test_vcvtnq_s32_f32(float32x4_t a) {
|
||||
return vcvtnq_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vcvtnq_u32_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtnq_u32_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VCVTNQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtnu.v4i32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret <4 x i32> [[VCVTNQ_U32_V1_I]]
|
||||
uint32x4_t test_vcvtnq_u32_f32(float32x4_t a) {
|
||||
return vcvtnq_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vcvtp_s32_f32(<2 x float> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtp_s32_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VCVTP_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> %a) #3
|
||||
// CHECK: ret <2 x i32> [[VCVTP_S32_V1_I]]
|
||||
int32x2_t test_vcvtp_s32_f32(float32x2_t a) {
|
||||
return vcvtp_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vcvtp_u32_f32(<2 x float> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtp_u32_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VCVTP_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> %a) #3
|
||||
// CHECK: ret <2 x i32> [[VCVTP_U32_V1_I]]
|
||||
uint32x2_t test_vcvtp_u32_f32(float32x2_t a) {
|
||||
return vcvtp_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vcvtpq_s32_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtpq_s32_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VCVTPQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret <4 x i32> [[VCVTPQ_S32_V1_I]]
|
||||
int32x4_t test_vcvtpq_s32_f32(float32x4_t a) {
|
||||
return vcvtpq_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vcvtpq_u32_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtpq_u32_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VCVTPQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtpu.v4i32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret <4 x i32> [[VCVTPQ_U32_V1_I]]
|
||||
uint32x4_t test_vcvtpq_u32_f32(float32x4_t a) {
|
||||
return vcvtpq_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vcvtm_s32_f32(<2 x float> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtm_s32_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VCVTM_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> %a) #3
|
||||
// CHECK: ret <2 x i32> [[VCVTM_S32_V1_I]]
|
||||
int32x2_t test_vcvtm_s32_f32(float32x2_t a) {
|
||||
return vcvtm_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <2 x i32> @test_vcvtm_u32_f32(<2 x float> %a) #0 {
|
||||
// CHECK-LABEL: define{{.*}} <2 x i32> @test_vcvtm_u32_f32(<2 x float> %a) #0 {
|
||||
// CHECK: [[VCVTM_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> %a) #3
|
||||
// CHECK: ret <2 x i32> [[VCVTM_U32_V1_I]]
|
||||
uint32x2_t test_vcvtm_u32_f32(float32x2_t a) {
|
||||
return vcvtm_u32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vcvtmq_s32_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtmq_s32_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VCVTMQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtms.v4i32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret <4 x i32> [[VCVTMQ_S32_V1_I]]
|
||||
int32x4_t test_vcvtmq_s32_f32(float32x4_t a) {
|
||||
return vcvtmq_s32_f32(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define <4 x i32> @test_vcvtmq_u32_f32(<4 x float> %a) #1 {
|
||||
// CHECK-LABEL: define{{.*}} <4 x i32> @test_vcvtmq_u32_f32(<4 x float> %a) #1 {
|
||||
// CHECK: [[VCVTMQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtmu.v4i32.v4f32(<4 x float> %a) #3
|
||||
// CHECK: ret <4 x i32> [[VCVTMQ_U32_V1_I]]
|
||||
uint32x4_t test_vcvtmq_u32_f32(float32x4_t a) {
|
||||
|
||||
@ -6,7 +6,7 @@ typedef int __attribute__((pcs("aapcs-vfp"))) (*aapcs_vfp_fn)(void);
|
||||
aapcs_fn bar;
|
||||
|
||||
int foo(aapcs_vfp_fn baz) {
|
||||
// CHECK-LABEL: define i32 @foo
|
||||
// CHECK-LABEL: define{{.*}} i32 @foo
|
||||
// CHECK: call arm_aapcscc
|
||||
// CHECK: call arm_aapcs_vfpcc
|
||||
return bar() + baz();
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
va_list the_list;
|
||||
|
||||
int simple_int(void) {
|
||||
// CHECK-LABEL: define i32 @simple_int
|
||||
// CHECK-LABEL: define{{.*}} i32 @simple_int
|
||||
return va_arg(the_list, int);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4
|
||||
@ -24,7 +24,7 @@ struct bigstruct {
|
||||
};
|
||||
|
||||
struct bigstruct simple_struct(void) {
|
||||
// CHECK-LABEL: define void @simple_struct(%struct.bigstruct* noalias sret(%struct.bigstruct) align 4 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @simple_struct(%struct.bigstruct* noalias sret(%struct.bigstruct) align 4 %agg.result)
|
||||
return va_arg(the_list, struct bigstruct);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 40
|
||||
@ -42,7 +42,7 @@ struct aligned_bigstruct {
|
||||
};
|
||||
|
||||
struct aligned_bigstruct simple_aligned_struct(void) {
|
||||
// CHECK-LABEL: define void @simple_aligned_struct(%struct.aligned_bigstruct* noalias sret(%struct.aligned_bigstruct) align 8 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @simple_aligned_struct(%struct.aligned_bigstruct* noalias sret(%struct.aligned_bigstruct) align 8 %agg.result)
|
||||
return va_arg(the_list, struct aligned_bigstruct);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
|
||||
@ -59,7 +59,7 @@ struct aligned_bigstruct simple_aligned_struct(void) {
|
||||
}
|
||||
|
||||
double simple_double(void) {
|
||||
// CHECK-LABEL: define double @simple_double
|
||||
// CHECK-LABEL: define{{.*}} double @simple_double
|
||||
return va_arg(the_list, double);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
|
||||
@ -78,7 +78,7 @@ struct hfa {
|
||||
};
|
||||
|
||||
struct hfa simple_hfa(void) {
|
||||
// CHECK-LABEL: define void @simple_hfa(%struct.hfa* noalias sret(%struct.hfa) align 4 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @simple_hfa(%struct.hfa* noalias sret(%struct.hfa) align 4 %agg.result)
|
||||
return va_arg(the_list, struct hfa);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 8
|
||||
@ -96,7 +96,7 @@ struct hfa simple_hfa(void) {
|
||||
|
||||
typedef int underaligned_int __attribute__((packed,aligned(2)));
|
||||
underaligned_int underaligned_int_test() {
|
||||
// CHECK-LABEL: define i32 @underaligned_int_test()
|
||||
// CHECK-LABEL: define{{.*}} i32 @underaligned_int_test()
|
||||
return va_arg(the_list, underaligned_int);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4
|
||||
@ -108,7 +108,7 @@ underaligned_int underaligned_int_test() {
|
||||
|
||||
typedef int overaligned_int __attribute__((aligned(32)));
|
||||
overaligned_int overaligned_int_test() {
|
||||
// CHECK-LABEL: define i32 @overaligned_int_test()
|
||||
// CHECK-LABEL: define{{.*}} i32 @overaligned_int_test()
|
||||
return va_arg(the_list, overaligned_int);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4
|
||||
@ -120,7 +120,7 @@ overaligned_int overaligned_int_test() {
|
||||
|
||||
typedef long long underaligned_long_long __attribute__((packed,aligned(2)));
|
||||
underaligned_long_long underaligned_long_long_test() {
|
||||
// CHECK-LABEL: define i64 @underaligned_long_long_test()
|
||||
// CHECK-LABEL: define{{.*}} i64 @underaligned_long_long_test()
|
||||
return va_arg(the_list, underaligned_long_long);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
|
||||
@ -136,7 +136,7 @@ underaligned_long_long underaligned_long_long_test() {
|
||||
|
||||
typedef long long overaligned_long_long __attribute__((aligned(32)));
|
||||
overaligned_long_long overaligned_long_long_test() {
|
||||
// CHECK-LABEL: define i64 @overaligned_long_long_test()
|
||||
// CHECK-LABEL: define{{.*}} i64 @overaligned_long_long_test()
|
||||
return va_arg(the_list, overaligned_long_long);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
|
||||
@ -166,7 +166,7 @@ typedef struct __attribute__((packed,aligned(2))) {
|
||||
int val;
|
||||
} underaligned_int_struct;
|
||||
underaligned_int_struct underaligned_int_struct_test() {
|
||||
// CHECK-LABEL: define i32 @underaligned_int_struct_test()
|
||||
// CHECK-LABEL: define{{.*}} i32 @underaligned_int_struct_test()
|
||||
return va_arg(the_list, underaligned_int_struct);
|
||||
// CHECK: [[RETVAL:%[a-z0-9._]+]] = alloca %struct.underaligned_int_struct, align 2
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
@ -185,7 +185,7 @@ typedef struct __attribute__((aligned(16))) {
|
||||
int val;
|
||||
} overaligned_int_struct;
|
||||
overaligned_int_struct overaligned_int_struct_test() {
|
||||
// CHECK-LABEL: define void @overaligned_int_struct_test(%struct.overaligned_int_struct* noalias sret(%struct.overaligned_int_struct) align 16 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @overaligned_int_struct_test(%struct.overaligned_int_struct* noalias sret(%struct.overaligned_int_struct) align 16 %agg.result)
|
||||
return va_arg(the_list, overaligned_int_struct);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 16
|
||||
@ -201,7 +201,7 @@ typedef struct __attribute__((packed,aligned(2))) {
|
||||
long long val;
|
||||
} underaligned_long_long_struct;
|
||||
underaligned_long_long_struct underaligned_long_long_struct_test() {
|
||||
// CHECK-LABEL: define void @underaligned_long_long_struct_test(%struct.underaligned_long_long_struct* noalias sret(%struct.underaligned_long_long_struct) align 2 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @underaligned_long_long_struct_test(%struct.underaligned_long_long_struct* noalias sret(%struct.underaligned_long_long_struct) align 2 %agg.result)
|
||||
return va_arg(the_list, underaligned_long_long_struct);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 8
|
||||
@ -217,7 +217,7 @@ typedef struct __attribute__((aligned(16))) {
|
||||
long long val;
|
||||
} overaligned_long_long_struct;
|
||||
overaligned_long_long_struct overaligned_long_long_struct_test() {
|
||||
// CHECK-LABEL: define void @overaligned_long_long_struct_test(%struct.overaligned_long_long_struct* noalias sret(%struct.overaligned_long_long_struct) align 16 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @overaligned_long_long_struct_test(%struct.overaligned_long_long_struct* noalias sret(%struct.overaligned_long_long_struct) align 16 %agg.result)
|
||||
return va_arg(the_list, overaligned_long_long_struct);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
|
||||
@ -240,7 +240,7 @@ typedef struct {
|
||||
int val __attribute__((packed,aligned(2)));
|
||||
} underaligned_int_struct_member;
|
||||
underaligned_int_struct_member underaligned_int_struct_member_test() {
|
||||
// CHECK-LABEL: define i32 @underaligned_int_struct_member_test()
|
||||
// CHECK-LABEL: define{{.*}} i32 @underaligned_int_struct_member_test()
|
||||
return va_arg(the_list, underaligned_int_struct_member);
|
||||
// CHECK: [[RETVAL:%[a-z0-9._]+]] = alloca %struct.underaligned_int_struct_member, align 2
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
@ -259,7 +259,7 @@ typedef struct {
|
||||
int val __attribute__((aligned(16)));
|
||||
} overaligned_int_struct_member;
|
||||
overaligned_int_struct_member overaligned_int_struct_member_test() {
|
||||
// CHECK-LABEL: define void @overaligned_int_struct_member_test(%struct.overaligned_int_struct_member* noalias sret(%struct.overaligned_int_struct_member) align 16 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @overaligned_int_struct_member_test(%struct.overaligned_int_struct_member* noalias sret(%struct.overaligned_int_struct_member) align 16 %agg.result)
|
||||
return va_arg(the_list, overaligned_int_struct_member);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
|
||||
@ -279,7 +279,7 @@ typedef struct {
|
||||
long long val __attribute__((packed,aligned(2)));
|
||||
} underaligned_long_long_struct_member;
|
||||
underaligned_long_long_struct_member underaligned_long_long_struct_member_test() {
|
||||
// CHECK-LABEL: define void @underaligned_long_long_struct_member_test(%struct.underaligned_long_long_struct_member* noalias sret(%struct.underaligned_long_long_struct_member) align 2 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @underaligned_long_long_struct_member_test(%struct.underaligned_long_long_struct_member* noalias sret(%struct.underaligned_long_long_struct_member) align 2 %agg.result)
|
||||
return va_arg(the_list, underaligned_long_long_struct_member);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 8
|
||||
@ -295,7 +295,7 @@ typedef struct {
|
||||
long long val __attribute__((aligned(16)));
|
||||
} overaligned_long_long_struct_member;
|
||||
overaligned_long_long_struct_member overaligned_long_long_struct_member_test() {
|
||||
// CHECK-LABEL: define void @overaligned_long_long_struct_member_test(%struct.overaligned_long_long_struct_member* noalias sret(%struct.overaligned_long_long_struct_member) align 16 %agg.result)
|
||||
// CHECK-LABEL: define{{.*}} void @overaligned_long_long_struct_member_test(%struct.overaligned_long_long_struct_member* noalias sret(%struct.overaligned_long_long_struct_member) align 16 %agg.result)
|
||||
return va_arg(the_list, overaligned_long_long_struct_member);
|
||||
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
|
||||
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
|
||||
@ -312,7 +312,7 @@ overaligned_long_long_struct_member overaligned_long_long_struct_member_test() {
|
||||
}
|
||||
|
||||
void check_start(int n, ...) {
|
||||
// CHECK-LABEL: define void @check_start(i32 %n, ...)
|
||||
// CHECK-LABEL: define{{.*}} void @check_start(i32 %n, ...)
|
||||
|
||||
va_list the_list;
|
||||
va_start(the_list, n);
|
||||
|
||||
@ -19,58 +19,58 @@ float16x4_t g4;
|
||||
float16x8_t g8;
|
||||
|
||||
void st4(float16x4_t a) { g4 = a; }
|
||||
// CHECK-SOFT: define void @st4(<2 x i32> %a.coerce)
|
||||
// CHECK-SOFT: define{{.*}} void @st4(<2 x i32> %a.coerce)
|
||||
// CHECK-SOFT: store <2 x i32> %a.coerce, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
|
||||
//
|
||||
// CHECK-HARD: define arm_aapcs_vfpcc void @st4(<2 x i32> %a.coerce)
|
||||
// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc void @st4(<2 x i32> %a.coerce)
|
||||
// CHECK-HARD: store <2 x i32> %a.coerce, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
|
||||
//
|
||||
// CHECK-FULL: define arm_aapcs_vfpcc void @st4(<4 x half> %a)
|
||||
// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc void @st4(<4 x half> %a)
|
||||
// CHECK-FULL: store <4 x half> %a, <4 x half>* @g4
|
||||
|
||||
float16x4_t ld4(void) { return g4; }
|
||||
// CHECK-SOFT: define <2 x i32> @ld4()
|
||||
// CHECK-SOFT: define{{.*}} <2 x i32> @ld4()
|
||||
// CHECK-SOFT: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
|
||||
// CHECK-SOFT: ret <2 x i32> %0
|
||||
//
|
||||
// CHECK-HARD: define arm_aapcs_vfpcc <2 x i32> @ld4()
|
||||
// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc <2 x i32> @ld4()
|
||||
// CHECK-HARD: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
|
||||
// CHECK-HARD: ret <2 x i32> %0
|
||||
//
|
||||
// CHECK-FULL: define arm_aapcs_vfpcc <4 x half> @ld4()
|
||||
// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc <4 x half> @ld4()
|
||||
// CHECK-FULL: %0 = load <4 x half>, <4 x half>* @g4
|
||||
// CHECK-FULL: ret <4 x half> %0
|
||||
|
||||
void st8(float16x8_t a) { g8 = a; }
|
||||
// CHECK-SOFT: define void @st8(<4 x i32> %a.coerce)
|
||||
// CHECK-SOFT: define{{.*}} void @st8(<4 x i32> %a.coerce)
|
||||
// CHECK-SOFT: store <4 x i32> %a.coerce, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
|
||||
//
|
||||
// CHECK-HARD: define arm_aapcs_vfpcc void @st8(<4 x i32> %a.coerce)
|
||||
// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc void @st8(<4 x i32> %a.coerce)
|
||||
// CHECK-HARD: store <4 x i32> %a.coerce, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
|
||||
//
|
||||
// CHECK-FULL: define arm_aapcs_vfpcc void @st8(<8 x half> %a)
|
||||
// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc void @st8(<8 x half> %a)
|
||||
// CHECK-FULL: store <8 x half> %a, <8 x half>* @g8
|
||||
|
||||
float16x8_t ld8(void) { return g8; }
|
||||
// CHECK-SOFT: define <4 x i32> @ld8()
|
||||
// CHECK-SOFT: define{{.*}} <4 x i32> @ld8()
|
||||
// CHECK-SOFT: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
|
||||
// CHECK-SOFT: ret <4 x i32> %0
|
||||
//
|
||||
// CHECK-HARD: define arm_aapcs_vfpcc <4 x i32> @ld8()
|
||||
// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc <4 x i32> @ld8()
|
||||
// CHECK-HARD: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
|
||||
// CHECK-HARD: ret <4 x i32> %0
|
||||
//
|
||||
// CHECK-FULL: define arm_aapcs_vfpcc <8 x half> @ld8()
|
||||
// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc <8 x half> @ld8()
|
||||
// CHECK-FULL: %0 = load <8 x half>, <8 x half>* @g8
|
||||
// CHECK-FULL: ret <8 x half> %0
|
||||
|
||||
void test_hfa(hfa_t a) {}
|
||||
// CHECK-SOFT: define void @test_hfa([2 x i64] %a.coerce)
|
||||
// CHECK-HARD: define arm_aapcs_vfpcc void @test_hfa([2 x <2 x i32>] %a.coerce)
|
||||
// CHECK-FULL: define arm_aapcs_vfpcc void @test_hfa(%struct.hfa_t %a.coerce)
|
||||
// CHECK-SOFT: define{{.*}} void @test_hfa([2 x i64] %a.coerce)
|
||||
// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc void @test_hfa([2 x <2 x i32>] %a.coerce)
|
||||
// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc void @test_hfa(%struct.hfa_t %a.coerce)
|
||||
|
||||
hfa_t ghfa;
|
||||
hfa_t test_ret_hfa(void) { return ghfa; }
|
||||
// CHECK-SOFT: define void @test_ret_hfa(%struct.hfa_t* noalias nocapture sret(%struct.hfa_t) align 8 %agg.result)
|
||||
// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @test_ret_hfa()
|
||||
// CHECK-FULL: define arm_aapcs_vfpcc %struct.hfa_t @test_ret_hfa()
|
||||
// CHECK-SOFT: define{{.*}} void @test_ret_hfa(%struct.hfa_t* noalias nocapture sret(%struct.hfa_t) align 8 %agg.result)
|
||||
// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @test_ret_hfa()
|
||||
// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.hfa_t @test_ret_hfa()
|
||||
|
||||
@ -37,27 +37,27 @@ struct S5 : B1 {
|
||||
B1 M[1];
|
||||
};
|
||||
|
||||
// CHECK-SOFT: define void @_Z2f12S1(%struct.S1* noalias nocapture sret(%struct.S1) align 8 %agg.result, [2 x i64] %s1.coerce)
|
||||
// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f12S1([2 x <2 x i32>] returned %s1.coerce)
|
||||
// CHECK-FULL: define arm_aapcs_vfpcc %struct.S1 @_Z2f12S1(%struct.S1 returned %s1.coerce)
|
||||
// CHECK-SOFT: define{{.*}} void @_Z2f12S1(%struct.S1* noalias nocapture sret(%struct.S1) align 8 %agg.result, [2 x i64] %s1.coerce)
|
||||
// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f12S1([2 x <2 x i32>] returned %s1.coerce)
|
||||
// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S1 @_Z2f12S1(%struct.S1 returned %s1.coerce)
|
||||
struct S1 f1(struct S1 s1) { return s1; }
|
||||
|
||||
// CHECK-SOFT: define void @_Z2f22S2(%struct.S2* noalias nocapture sret(%struct.S2) align 8 %agg.result, [4 x i32] %s2.coerce)
|
||||
// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f22S2([2 x <2 x i32>] returned %s2.coerce)
|
||||
// CHECK-FULL: define arm_aapcs_vfpcc %struct.S2 @_Z2f22S2(%struct.S2 returned %s2.coerce)
|
||||
// CHECK-SOFT: define{{.*}} void @_Z2f22S2(%struct.S2* noalias nocapture sret(%struct.S2) align 8 %agg.result, [4 x i32] %s2.coerce)
|
||||
// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f22S2([2 x <2 x i32>] returned %s2.coerce)
|
||||
// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S2 @_Z2f22S2(%struct.S2 returned %s2.coerce)
|
||||
struct S2 f2(struct S2 s2) { return s2; }
|
||||
|
||||
// CHECK-SOFT: define void @_Z2f32S3(%struct.S3* noalias nocapture sret(%struct.S3) align 8 %agg.result, [2 x i64] %s3.coerce)
|
||||
// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f32S3([2 x <2 x i32>] returned %s3.coerce)
|
||||
// CHECK-FULL: define arm_aapcs_vfpcc %struct.S3 @_Z2f32S3(%struct.S3 returned %s3.coerce)
|
||||
// CHECK-SOFT: define{{.*}} void @_Z2f32S3(%struct.S3* noalias nocapture sret(%struct.S3) align 8 %agg.result, [2 x i64] %s3.coerce)
|
||||
// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f32S3([2 x <2 x i32>] returned %s3.coerce)
|
||||
// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S3 @_Z2f32S3(%struct.S3 returned %s3.coerce)
|
||||
struct S3 f3(struct S3 s3) { return s3; }
|
||||
|
||||
// CHECK-SOFT: define void @_Z2f42S4(%struct.S4* noalias nocapture sret(%struct.S4) align 8 %agg.result, [2 x i64] %s4.coerce)
|
||||
// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f42S4([2 x <2 x i32>] returned %s4.coerce)
|
||||
// CHECK-FULL: define arm_aapcs_vfpcc %struct.S4 @_Z2f42S4(%struct.S4 returned %s4.coerce)
|
||||
// CHECK-SOFT: define{{.*}} void @_Z2f42S4(%struct.S4* noalias nocapture sret(%struct.S4) align 8 %agg.result, [2 x i64] %s4.coerce)
|
||||
// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f42S4([2 x <2 x i32>] returned %s4.coerce)
|
||||
// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S4 @_Z2f42S4(%struct.S4 returned %s4.coerce)
|
||||
struct S4 f4(struct S4 s4) { return s4; }
|
||||
|
||||
// CHECK-SOFT: define void @_Z2f52S5(%struct.S5* noalias nocapture sret(%struct.S5) align 8 %agg.result, [2 x i64] %s5.coerce)
|
||||
// CHECK-HARD: define arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
|
||||
// CHECK-FULL: define arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
|
||||
// CHECK-SOFT: define{{.*}} void @_Z2f52S5(%struct.S5* noalias nocapture sret(%struct.S5) align 8 %agg.result, [2 x i64] %s5.coerce)
|
||||
// CHECK-HARD: define{{.*}} arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
|
||||
// CHECK-FULL: define{{.*}} arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
|
||||
struct S5 f5(struct S5 s5) { return s5; }
|
||||
|
||||
@ -37,15 +37,15 @@ void test4(BigHFA v0_v2, BigHFA v3_v5, BigHFA sp, double sp48, BigHFA sp64) {
|
||||
// It's the job of the argument *consumer* to perform the required sign & zero
|
||||
// extensions under AAPCS. There shouldn't be
|
||||
|
||||
// CHECK: define i8 @test5(i8 %a, i16 %b)
|
||||
// CHECK: define{{.*}} i8 @test5(i8 %a, i16 %b)
|
||||
unsigned char test5(unsigned char a, signed short b) {
|
||||
}
|
||||
|
||||
// __fp16 can be used as a function argument or return type (ACLE 2.0)
|
||||
// CHECK: define half @test_half(half %{{.*}})
|
||||
// CHECK: define{{.*}} half @test_half(half %{{.*}})
|
||||
__fp16 test_half(__fp16 A) { }
|
||||
|
||||
// __fp16 is a base type for homogeneous floating-point aggregates for AArch64 (but not 32-bit ARM).
|
||||
// CHECK: define %struct.HFA_half @test_half_hfa([4 x half] %{{.*}})
|
||||
// CHECK: define{{.*}} %struct.HFA_half @test_half_hfa([4 x half] %{{.*}})
|
||||
struct HFA_half { __fp16 a[4]; };
|
||||
struct HFA_half test_half_hfa(struct HFA_half A) { }
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
#include <stddef.h>
|
||||
#include <arm_acle.h>
|
||||
|
||||
// CHECK-LABEL: define i32* @create_tag1
|
||||
// CHECK-LABEL: define{{.*}} i32* @create_tag1
|
||||
int *create_tag1(int *a, unsigned b) {
|
||||
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
|
||||
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
|
||||
@ -12,7 +12,7 @@ int *create_tag1(int *a, unsigned b) {
|
||||
return __arm_mte_create_random_tag(a,b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16* @create_tag2
|
||||
// CHECK-LABEL: define{{.*}} i16* @create_tag2
|
||||
short *create_tag2(short *a, unsigned b) {
|
||||
// CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8*
|
||||
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
|
||||
@ -21,7 +21,7 @@ short *create_tag2(short *a, unsigned b) {
|
||||
return __arm_mte_create_random_tag(a,b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8* @create_tag3
|
||||
// CHECK-LABEL: define{{.*}} i8* @create_tag3
|
||||
char *create_tag3(char *a, unsigned b) {
|
||||
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
|
||||
// CHECK: [[T2:%[0-9]+]] = tail call i8* @llvm.aarch64.irg(i8* %a, i64 [[T1]])
|
||||
@ -29,13 +29,13 @@ char *create_tag3(char *a, unsigned b) {
|
||||
return __arm_mte_create_random_tag(a,b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i8* @increment_tag1
|
||||
// CHECK-LABEL: define{{.*}} i8* @increment_tag1
|
||||
char *increment_tag1(char *a) {
|
||||
// CHECK: call i8* @llvm.aarch64.addg(i8* %a, i64 3)
|
||||
return __arm_mte_increment_tag(a,3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16* @increment_tag2
|
||||
// CHECK-LABEL: define{{.*}} i16* @increment_tag2
|
||||
short *increment_tag2(short *a) {
|
||||
// CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8*
|
||||
// CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.addg(i8* [[T0]], i64 3)
|
||||
@ -43,7 +43,7 @@ short *increment_tag2(short *a) {
|
||||
return __arm_mte_increment_tag(a,3);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32 @exclude_tag
|
||||
// CHECK-LABEL: define{{.*}} i32 @exclude_tag
|
||||
unsigned exclude_tag(int *a, unsigned m) {
|
||||
// CHECK: [[T0:%[0-9]+]] = zext i32 %m to i64
|
||||
// CHECK: [[T1:%[0-9]+]] = bitcast i32* %a to i8*
|
||||
@ -52,7 +52,7 @@ unsigned exclude_tag(int *a, unsigned m) {
|
||||
return __arm_mte_exclude_tag(a, m);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i32* @get_tag1
|
||||
// CHECK-LABEL: define{{.*}} i32* @get_tag1
|
||||
int *get_tag1(int *a) {
|
||||
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
|
||||
// CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.ldg(i8* [[T0]], i8* [[T0]])
|
||||
@ -60,7 +60,7 @@ int *get_tag1(int *a) {
|
||||
return __arm_mte_get_tag(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i16* @get_tag2
|
||||
// CHECK-LABEL: define{{.*}} i16* @get_tag2
|
||||
short *get_tag2(short *a) {
|
||||
// CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8*
|
||||
// CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.ldg(i8* [[T0]], i8* [[T0]])
|
||||
@ -68,14 +68,14 @@ short *get_tag2(short *a) {
|
||||
return __arm_mte_get_tag(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define void @set_tag1
|
||||
// CHECK-LABEL: define{{.*}} void @set_tag1
|
||||
void set_tag1(int *a) {
|
||||
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
|
||||
// CHECK: tail call void @llvm.aarch64.stg(i8* [[T0]], i8* [[T0]])
|
||||
__arm_mte_set_tag(a);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @subtract_pointers
|
||||
// CHECK-LABEL: define{{.*}} i64 @subtract_pointers
|
||||
ptrdiff_t subtract_pointers(int *a, int *b) {
|
||||
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
|
||||
// CHECK: [[T1:%[0-9]+]] = bitcast i32* %b to i8*
|
||||
@ -84,7 +84,7 @@ ptrdiff_t subtract_pointers(int *a, int *b) {
|
||||
return __arm_mte_ptrdiff(a, b);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @subtract_pointers_null_1
|
||||
// CHECK-LABEL: define{{.*}} i64 @subtract_pointers_null_1
|
||||
ptrdiff_t subtract_pointers_null_1(int *a) {
|
||||
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
|
||||
// CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* [[T0]], i8* null)
|
||||
@ -92,7 +92,7 @@ ptrdiff_t subtract_pointers_null_1(int *a) {
|
||||
return __arm_mte_ptrdiff(a, NULL);
|
||||
}
|
||||
|
||||
// CHECK-LABEL: define i64 @subtract_pointers_null_2
|
||||
// CHECK-LABEL: define{{.*}} i64 @subtract_pointers_null_2
|
||||
ptrdiff_t subtract_pointers_null_2(int *a) {
|
||||
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
|
||||
// CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* null, i8* [[T0]])
|
||||
@ -101,7 +101,7 @@ ptrdiff_t subtract_pointers_null_2(int *a) {
|
||||
}
|
||||
|
||||
// Check arithmetic promotion on return type
|
||||
// CHECK-LABEL: define i32 @subtract_pointers4
|
||||
// CHECK-LABEL: define{{.*}} i32 @subtract_pointers4
|
||||
int subtract_pointers4(void* a, void *b) {
|
||||
// CHECK: [[T0:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* %a, i8* %b)
|
||||
// CHECK-NEXT: %cmp = icmp slt i64 [[T0]], 1
|
||||
|
||||
@ -7,7 +7,7 @@ struct Vec2 {
|
||||
};
|
||||
};
|
||||
|
||||
// CHECK: define arm_aapcs_vfpcc %struct.Vec2 @_Z7getVec2v()
|
||||
// CHECK: define{{.*}} arm_aapcs_vfpcc %struct.Vec2 @_Z7getVec2v()
|
||||
// CHECK: ret %struct.Vec2
|
||||
Vec2 getVec2() {
|
||||
Vec2 out;
|
||||
|
||||
@ -30,10 +30,10 @@ extern struct input_device_id __attribute__((alias("joydev_ids"))) __mod_joydev_
|
||||
// KASAN: @joydev_ids{{.*}} global [1 x {{.*}}i64 1234 }], align 16
|
||||
|
||||
// Check the aliases exist:
|
||||
// CHECK: @__global_alias = alias
|
||||
// CHECK: @global_alias_2 = alias
|
||||
// CHECK: @__global_alias_2_alias = alias
|
||||
// CHECK: @__mod_joydev_ids_device_table = alias
|
||||
// CHECK: @__global_alias ={{.*}} alias
|
||||
// CHECK: @global_alias_2 ={{.*}} alias
|
||||
// CHECK: @__global_alias_2_alias ={{.*}} alias
|
||||
// CHECK: @__mod_joydev_ids_device_table ={{.*}} alias
|
||||
|
||||
// CHECK-LABEL: define internal void @asan.module_ctor
|
||||
// ASAN: call void @__asan_register_globals({{.*}}, i{{32|64}} 4)
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
// RUN: %clang_cc1 -triple i386-pc-linux-gnu -O0 -emit-llvm %s -o - | FileCheck %s
|
||||
|
||||
int test1(int cond) {
|
||||
// CHECK-LABEL: define i32 @test1(
|
||||
// CHECK-LABEL: define{{.*}} i32 @test1(
|
||||
// CHECK: callbr void asm sideeffect
|
||||
// CHECK: to label %asm.fallthrough [label %label_true, label %loop]
|
||||
// CHECK-LABEL: asm.fallthrough:
|
||||
@ -20,7 +20,7 @@ label_true:
|
||||
}
|
||||
|
||||
int test2(int cond) {
|
||||
// CHECK-LABEL: define i32 @test2(
|
||||
// CHECK-LABEL: define{{.*}} i32 @test2(
|
||||
// CHECK: callbr i32 asm sideeffect
|
||||
// CHECK: to label %asm.fallthrough [label %label_true, label %loop]
|
||||
// CHECK-LABEL: asm.fallthrough:
|
||||
@ -37,7 +37,7 @@ label_true:
|
||||
}
|
||||
|
||||
int test3(int out1, int out2) {
|
||||
// CHECK-LABEL: define i32 @test3(
|
||||
// CHECK-LABEL: define{{.*}} i32 @test3(
|
||||
// CHECK: callbr { i32, i32 } asm sideeffect
|
||||
// CHECK: to label %asm.fallthrough [label %label_true, label %loop]
|
||||
// CHECK-LABEL: asm.fallthrough:
|
||||
@ -54,7 +54,7 @@ label_true:
|
||||
}
|
||||
|
||||
int test4(int out1, int out2) {
|
||||
// CHECK-LABEL: define i32 @test4(
|
||||
// CHECK-LABEL: define{{.*}} i32 @test4(
|
||||
// CHECK: callbr { i32, i32 } asm sideeffect "jne ${3:l}", "={si},={di},r,X,X,0,1
|
||||
// CHECK: to label %asm.fallthrough [label %label_true, label %loop]
|
||||
// CHECK-LABEL: asm.fallthrough:
|
||||
@ -73,7 +73,7 @@ label_true:
|
||||
}
|
||||
|
||||
int test5(int addr, int size, int limit) {
|
||||
// CHECK-LABEL: define i32 @test5(
|
||||
// CHECK-LABEL: define{{.*}} i32 @test5(
|
||||
// CHECK: callbr i32 asm "add $1,$0 ; jc ${3:l} ; cmp $2,$0 ; ja ${3:l} ; ", "=r,imr,imr,X,0
|
||||
// CHECK: to label %asm.fallthrough [label %t_err]
|
||||
// CHECK-LABEL: asm.fallthrough:
|
||||
@ -91,7 +91,7 @@ t_err:
|
||||
}
|
||||
|
||||
int test6(int out1) {
|
||||
// CHECK-LABEL: define i32 @test6(
|
||||
// CHECK-LABEL: define{{.*}} i32 @test6(
|
||||
// CHECK: callbr i32 asm sideeffect "testl $0, $0; testl $1, $1; jne ${2:l}", "={si},r,X,X,0,{{.*}} i8* blockaddress(@test6, %label_true), i8* blockaddress(@test6, %landing)
|
||||
// CHECK: to label %asm.fallthrough [label %label_true, label %landing]
|
||||
// CHECK-LABEL: asm.fallthrough:
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
|
||||
// Check that we don't generate unnecessary reloads.
|
||||
//
|
||||
// CHECK-LABEL: define void @f0()
|
||||
// CHECK-LABEL: define{{.*}} void @f0()
|
||||
// CHECK: [[x_0:%.*]] = alloca i32, align 4
|
||||
// CHECK-NEXT: [[y_0:%.*]] = alloca i32, align 4
|
||||
// CHECK-NEXT: store i32 1, i32* [[x_0]]
|
||||
@ -18,7 +18,7 @@ void f0() {
|
||||
// This used to test that we generate reloads for volatile access,
|
||||
// but that does not appear to be correct behavior for C.
|
||||
//
|
||||
// CHECK-LABEL: define void @f1()
|
||||
// CHECK-LABEL: define{{.*}} void @f1()
|
||||
// CHECK: [[x_1:%.*]] = alloca i32, align 4
|
||||
// CHECK-NEXT: [[y_1:%.*]] = alloca i32, align 4
|
||||
// CHECK-NEXT: store volatile i32 1, i32* [[x_1]]
|
||||
|
||||
@ -48,7 +48,7 @@ void test1(void) {
|
||||
// ARM: call{{.*}} void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
|
||||
// ARM: call{{.*}} void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
|
||||
|
||||
// PPC32-LABEL: define void @test1
|
||||
// PPC32-LABEL: define{{.*}} void @test1
|
||||
// PPC32: = load atomic i8, i8* @c1 seq_cst
|
||||
// PPC32: store atomic i8 {{.*}}, i8* @c1 seq_cst
|
||||
// PPC32: = load atomic i16, i16* @s1 seq_cst
|
||||
@ -60,7 +60,7 @@ void test1(void) {
|
||||
// PPC32: call void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
|
||||
// PPC32: call void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
|
||||
|
||||
// PPC64-LABEL: define void @test1
|
||||
// PPC64-LABEL: define{{.*}} void @test1
|
||||
// PPC64: = load atomic i8, i8* @c1 seq_cst
|
||||
// PPC64: store atomic i8 {{.*}}, i8* @c1 seq_cst
|
||||
// PPC64: = load atomic i16, i16* @s1 seq_cst
|
||||
@ -72,7 +72,7 @@ void test1(void) {
|
||||
// PPC64: call void @__atomic_load(i64 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
|
||||
// PPC64: call void @__atomic_store(i64 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
|
||||
|
||||
// MIPS32-LABEL: define void @test1
|
||||
// MIPS32-LABEL: define{{.*}} void @test1
|
||||
// MIPS32: = load atomic i8, i8* @c1 seq_cst
|
||||
// MIPS32: store atomic i8 {{.*}}, i8* @c1 seq_cst
|
||||
// MIPS32: = load atomic i16, i16* @s1 seq_cst
|
||||
@ -84,7 +84,7 @@ void test1(void) {
|
||||
// MIPS32: call void @__atomic_load(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
|
||||
// MIPS32: call void @__atomic_store(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
|
||||
|
||||
// MIPS64-LABEL: define void @test1
|
||||
// MIPS64-LABEL: define{{.*}} void @test1
|
||||
// MIPS64: = load atomic i8, i8* @c1 seq_cst
|
||||
// MIPS64: store atomic i8 {{.*}}, i8* @c1 seq_cst
|
||||
// MIPS64: = load atomic i16, i16* @s1 seq_cst
|
||||
@ -96,7 +96,7 @@ void test1(void) {
|
||||
// MIPS64: call void @__atomic_load(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0)
|
||||
// MIPS64: call void @__atomic_store(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
|
||||
|
||||
// SPARC-LABEL: define void @test1
|
||||
// SPARC-LABEL: define{{.*}} void @test1
|
||||
// SPARC: = load atomic i8, i8* @c1 seq_cst
|
||||
// SPARC: store atomic i8 {{.*}}, i8* @c1 seq_cst
|
||||
// SPARC: = load atomic i16, i16* @s1 seq_cst
|
||||
|
||||
@ -292,148 +292,148 @@ void f() {
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Global variables
|
||||
//===----------------------------------------------------------------------===//
|
||||
// CHECK-128: @global_i8 = global <16 x i8> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_i16 = global <8 x i16> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_i32 = global <4 x i32> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_i64 = global <2 x i64> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_u8 = global <16 x i8> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_u16 = global <8 x i16> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_u32 = global <4 x i32> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_u64 = global <2 x i64> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_f16 = global <8 x half> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_f32 = global <4 x float> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_f64 = global <2 x double> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_bf16 = global <8 x bfloat> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_bool = global <2 x i8> zeroinitializer, align 2
|
||||
// CHECK-128: @global_i8 ={{.*}} global <16 x i8> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_i16 ={{.*}} global <8 x i16> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_i32 ={{.*}} global <4 x i32> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_i64 ={{.*}} global <2 x i64> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_u8 ={{.*}} global <16 x i8> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_u16 ={{.*}} global <8 x i16> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_u32 ={{.*}} global <4 x i32> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_u64 ={{.*}} global <2 x i64> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_f16 ={{.*}} global <8 x half> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_f32 ={{.*}} global <4 x float> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_f64 ={{.*}} global <2 x double> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_bf16 ={{.*}} global <8 x bfloat> zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_bool ={{.*}} global <2 x i8> zeroinitializer, align 2
|
||||
|
||||
// CHECK-256: @global_i8 = global <32 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_i16 = global <16 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_i32 = global <8 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_i64 = global <4 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_u8 = global <32 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_u16 = global <16 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_u32 = global <8 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_u64 = global <4 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_f16 = global <16 x half> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_f32 = global <8 x float> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_f64 = global <4 x double> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_bf16 = global <16 x bfloat> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_bool = global <4 x i8> zeroinitializer, align 2
|
||||
// CHECK-256: @global_i8 ={{.*}} global <32 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_i16 ={{.*}} global <16 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_i32 ={{.*}} global <8 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_i64 ={{.*}} global <4 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_u8 ={{.*}} global <32 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_u16 ={{.*}} global <16 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_u32 ={{.*}} global <8 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_u64 ={{.*}} global <4 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_f16 ={{.*}} global <16 x half> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_f32 ={{.*}} global <8 x float> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_f64 ={{.*}} global <4 x double> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_bf16 ={{.*}} global <16 x bfloat> zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_bool ={{.*}} global <4 x i8> zeroinitializer, align 2
|
||||
|
||||
// CHECK-512: @global_i8 = global <64 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_i16 = global <32 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_i32 = global <16 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_i64 = global <8 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_u8 = global <64 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_u16 = global <32 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_u32 = global <16 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_u64 = global <8 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_f16 = global <32 x half> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_f32 = global <16 x float> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_f64 = global <8 x double> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_bf16 = global <32 x bfloat> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_bool = global <8 x i8> zeroinitializer, align 2
|
||||
// CHECK-512: @global_i8 ={{.*}} global <64 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_i16 ={{.*}} global <32 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_i32 ={{.*}} global <16 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_i64 ={{.*}} global <8 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_u8 ={{.*}} global <64 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_u16 ={{.*}} global <32 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_u32 ={{.*}} global <16 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_u64 ={{.*}} global <8 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_f16 ={{.*}} global <32 x half> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_f32 ={{.*}} global <16 x float> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_f64 ={{.*}} global <8 x double> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_bf16 ={{.*}} global <32 x bfloat> zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_bool ={{.*}} global <8 x i8> zeroinitializer, align 2
|
||||
|
||||
// CHECK-1024: @global_i8 = global <128 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_i16 = global <64 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_i32 = global <32 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_i64 = global <16 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_u8 = global <128 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_u16 = global <64 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_u32 = global <32 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_u64 = global <16 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_f16 = global <64 x half> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_f32 = global <32 x float> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_f64 = global <16 x double> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_bf16 = global <64 x bfloat> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_bool = global <16 x i8> zeroinitializer, align 2
|
||||
// CHECK-1024: @global_i8 ={{.*}} global <128 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_i16 ={{.*}} global <64 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_i32 ={{.*}} global <32 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_i64 ={{.*}} global <16 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_u8 ={{.*}} global <128 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_u16 ={{.*}} global <64 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_u32 ={{.*}} global <32 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_u64 ={{.*}} global <16 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_f16 ={{.*}} global <64 x half> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_f32 ={{.*}} global <32 x float> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_f64 ={{.*}} global <16 x double> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_bf16 ={{.*}} global <64 x bfloat> zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_bool ={{.*}} global <16 x i8> zeroinitializer, align 2
|
||||
|
||||
// CHECK-2048: @global_i8 = global <256 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_i16 = global <128 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_i32 = global <64 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_i64 = global <32 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_u8 = global <256 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_u16 = global <128 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_u32 = global <64 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_u64 = global <32 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_f16 = global <128 x half> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_f32 = global <64 x float> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_f64 = global <32 x double> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_bf16 = global <128 x bfloat> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_bool = global <32 x i8> zeroinitializer, align 2
|
||||
// CHECK-2048: @global_i8 ={{.*}} global <256 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_i16 ={{.*}} global <128 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_i32 ={{.*}} global <64 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_i64 ={{.*}} global <32 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_u8 ={{.*}} global <256 x i8> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_u16 ={{.*}} global <128 x i16> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_u32 ={{.*}} global <64 x i32> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_u64 ={{.*}} global <32 x i64> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_f16 ={{.*}} global <128 x half> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_f32 ={{.*}} global <64 x float> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_f64 ={{.*}} global <32 x double> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_bf16 ={{.*}} global <128 x bfloat> zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_bool ={{.*}} global <32 x i8> zeroinitializer, align 2
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Global arrays
|
||||
//===----------------------------------------------------------------------===//
|
||||
// CHECK-128: @global_arr_i8 = global [3 x <16 x i8>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_i16 = global [3 x <8 x i16>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_i32 = global [3 x <4 x i32>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_i64 = global [3 x <2 x i64>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_u8 = global [3 x <16 x i8>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_u16 = global [3 x <8 x i16>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_u32 = global [3 x <4 x i32>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_u64 = global [3 x <2 x i64>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_f16 = global [3 x <8 x half>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_f32 = global [3 x <4 x float>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_f64 = global [3 x <2 x double>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_bf16 = global [3 x <8 x bfloat>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_bool = global [3 x <2 x i8>] zeroinitializer, align 2
|
||||
// CHECK-128: @global_arr_i8 ={{.*}} global [3 x <16 x i8>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_i16 ={{.*}} global [3 x <8 x i16>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_i32 ={{.*}} global [3 x <4 x i32>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_i64 ={{.*}} global [3 x <2 x i64>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_u8 ={{.*}} global [3 x <16 x i8>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_u16 ={{.*}} global [3 x <8 x i16>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_u32 ={{.*}} global [3 x <4 x i32>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_u64 ={{.*}} global [3 x <2 x i64>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_f16 ={{.*}} global [3 x <8 x half>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_f32 ={{.*}} global [3 x <4 x float>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_f64 ={{.*}} global [3 x <2 x double>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_bf16 ={{.*}} global [3 x <8 x bfloat>] zeroinitializer, align 16
|
||||
// CHECK-128-NEXT: @global_arr_bool ={{.*}} global [3 x <2 x i8>] zeroinitializer, align 2
|
||||
|
||||
// CHECK-256: @global_arr_i8 = global [3 x <32 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_i16 = global [3 x <16 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_i32 = global [3 x <8 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_i64 = global [3 x <4 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_u8 = global [3 x <32 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_u16 = global [3 x <16 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_u32 = global [3 x <8 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_u64 = global [3 x <4 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_f16 = global [3 x <16 x half>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_f32 = global [3 x <8 x float>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_f64 = global [3 x <4 x double>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_bf16 = global [3 x <16 x bfloat>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_bool = global [3 x <4 x i8>] zeroinitializer, align 2
|
||||
// CHECK-256: @global_arr_i8 ={{.*}} global [3 x <32 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_i16 ={{.*}} global [3 x <16 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_i32 ={{.*}} global [3 x <8 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_i64 ={{.*}} global [3 x <4 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_u8 ={{.*}} global [3 x <32 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_u16 ={{.*}} global [3 x <16 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_u32 ={{.*}} global [3 x <8 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_u64 ={{.*}} global [3 x <4 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_f16 ={{.*}} global [3 x <16 x half>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_f32 ={{.*}} global [3 x <8 x float>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_f64 ={{.*}} global [3 x <4 x double>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_bf16 ={{.*}} global [3 x <16 x bfloat>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-256: @global_arr_bool ={{.*}} global [3 x <4 x i8>] zeroinitializer, align 2
|
||||
|
||||
// CHECK-512: @global_arr_i8 = global [3 x <64 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_i16 = global [3 x <32 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_i32 = global [3 x <16 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_i64 = global [3 x <8 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_u8 = global [3 x <64 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_u16 = global [3 x <32 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_u32 = global [3 x <16 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_u64 = global [3 x <8 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_f16 = global [3 x <32 x half>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_f32 = global [3 x <16 x float>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_f64 = global [3 x <8 x double>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_bf16 = global [3 x <32 x bfloat>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_bool = global [3 x <8 x i8>] zeroinitializer, align 2
|
||||
// CHECK-512: @global_arr_i8 ={{.*}} global [3 x <64 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_i16 ={{.*}} global [3 x <32 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_i32 ={{.*}} global [3 x <16 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_i64 ={{.*}} global [3 x <8 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_u8 ={{.*}} global [3 x <64 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_u16 ={{.*}} global [3 x <32 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_u32 ={{.*}} global [3 x <16 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_u64 ={{.*}} global [3 x <8 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_f16 ={{.*}} global [3 x <32 x half>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_f32 ={{.*}} global [3 x <16 x float>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_f64 ={{.*}} global [3 x <8 x double>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_bf16 ={{.*}} global [3 x <32 x bfloat>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-512: @global_arr_bool ={{.*}} global [3 x <8 x i8>] zeroinitializer, align 2
|
||||
|
||||
// CHECK-1024: @global_arr_i8 = global [3 x <128 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_i16 = global [3 x <64 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_i32 = global [3 x <32 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_i64 = global [3 x <16 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_u8 = global [3 x <128 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_u16 = global [3 x <64 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_u32 = global [3 x <32 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_u64 = global [3 x <16 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_f16 = global [3 x <64 x half>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_f32 = global [3 x <32 x float>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_f64 = global [3 x <16 x double>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_bf16 = global [3 x <64 x bfloat>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_bool = global [3 x <16 x i8>] zeroinitializer, align 2
|
||||
// CHECK-1024: @global_arr_i8 ={{.*}} global [3 x <128 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_i16 ={{.*}} global [3 x <64 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_i32 ={{.*}} global [3 x <32 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_i64 ={{.*}} global [3 x <16 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_u8 ={{.*}} global [3 x <128 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_u16 ={{.*}} global [3 x <64 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_u32 ={{.*}} global [3 x <32 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_u64 ={{.*}} global [3 x <16 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_f16 ={{.*}} global [3 x <64 x half>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_f32 ={{.*}} global [3 x <32 x float>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_f64 ={{.*}} global [3 x <16 x double>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_bf16 ={{.*}} global [3 x <64 x bfloat>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-1024: @global_arr_bool ={{.*}} global [3 x <16 x i8>] zeroinitializer, align 2
|
||||
|
||||
// CHECK-2048: @global_arr_i8 = global [3 x <256 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_i16 = global [3 x <128 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_i32 = global [3 x <64 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_i64 = global [3 x <32 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_u8 = global [3 x <256 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_u16 = global [3 x <128 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_u32 = global [3 x <64 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_u64 = global [3 x <32 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_f16 = global [3 x <128 x half>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_f32 = global [3 x <64 x float>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_f64 = global [3 x <32 x double>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_bf16 = global [3 x <128 x bfloat>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_bool = global [3 x <32 x i8>] zeroinitializer, align 2
|
||||
// CHECK-2048: @global_arr_i8 ={{.*}} global [3 x <256 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_i16 ={{.*}} global [3 x <128 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_i32 ={{.*}} global [3 x <64 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_i64 ={{.*}} global [3 x <32 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_u8 ={{.*}} global [3 x <256 x i8>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_u16 ={{.*}} global [3 x <128 x i16>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_u32 ={{.*}} global [3 x <64 x i32>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_u64 ={{.*}} global [3 x <32 x i64>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_f16 ={{.*}} global [3 x <128 x half>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_f32 ={{.*}} global [3 x <64 x float>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_f64 ={{.*}} global [3 x <32 x double>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_bf16 ={{.*}} global [3 x <128 x bfloat>] zeroinitializer, align 16
|
||||
// CHECK-NEXT-2048: @global_arr_bool ={{.*}} global [3 x <32 x i8>] zeroinitializer, align 2
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Local variables
|
||||
|
||||
@ -31,12 +31,12 @@
|
||||
|
||||
ATTR(cpu_specific(ivybridge))
|
||||
void SingleVersion(void){}
|
||||
// LINUX: define void @SingleVersion.S() #[[S:[0-9]+]]
|
||||
// LINUX: define{{.*}} void @SingleVersion.S() #[[S:[0-9]+]]
|
||||
// WINDOWS: define dso_local void @SingleVersion.S() #[[S:[0-9]+]]
|
||||
|
||||
ATTR(cpu_specific(ivybridge))
|
||||
void NotCalled(void){}
|
||||
// LINUX: define void @NotCalled.S() #[[S]]
|
||||
// LINUX: define{{.*}} void @NotCalled.S() #[[S]]
|
||||
// WINDOWS: define dso_local void @NotCalled.S() #[[S:[0-9]+]]
|
||||
|
||||
// Done before any of the implementations. Also has an undecorated forward
|
||||
@ -256,7 +256,7 @@ int DispatchFirst(void);
|
||||
|
||||
ATTR(cpu_specific(atom))
|
||||
int DispatchFirst(void) {return 0;}
|
||||
// LINUX: define i32 @DispatchFirst.O
|
||||
// LINUX: define{{.*}} i32 @DispatchFirst.O
|
||||
// LINUX: ret i32 0
|
||||
|
||||
// WINDOWS: define dso_local i32 @DispatchFirst.O()
|
||||
@ -264,7 +264,7 @@ int DispatchFirst(void) {return 0;}
|
||||
|
||||
ATTR(cpu_specific(pentium))
|
||||
int DispatchFirst(void) {return 1;}
|
||||
// LINUX: define i32 @DispatchFirst.B
|
||||
// LINUX: define{{.*}} i32 @DispatchFirst.B
|
||||
// LINUX: ret i32 1
|
||||
|
||||
// WINDOWS: define dso_local i32 @DispatchFirst.B
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -Oz -o - %s | FileCheck %s
|
||||
|
||||
// CHECK: define void @f() local_unnamed_addr [[ATTRS:#[0-9]+]] {
|
||||
// CHECK: define{{.*}} void @f() local_unnamed_addr [[ATTRS:#[0-9]+]] {
|
||||
void f() __attribute__((leaf));
|
||||
|
||||
void f()
|
||||
|
||||
@ -1,14 +1,14 @@
|
||||
// RUN: %clang_cc1 -triple=x86_64-linux-gnu -emit-llvm %s -o - | FileCheck %s
|
||||
|
||||
// CHECK: @tentative_attr_first = global i32 undef
|
||||
// CHECK: @tentative_attr_first ={{.*}} global i32 undef
|
||||
int tentative_attr_first __attribute__((loader_uninitialized));
|
||||
int tentative_attr_first;
|
||||
|
||||
// CHECK: @tentative_attr_second = global i32 undef
|
||||
// CHECK: @tentative_attr_second ={{.*}} global i32 undef
|
||||
int tentative_attr_second;
|
||||
int tentative_attr_second __attribute__((loader_uninitialized));
|
||||
|
||||
// CHECK: @array = global [16 x float] undef
|
||||
// CHECK: @array ={{.*}} global [16 x float] undef
|
||||
float array[16] __attribute__((loader_uninitialized));
|
||||
|
||||
typedef struct
|
||||
@ -17,7 +17,7 @@ typedef struct
|
||||
float y;
|
||||
} s;
|
||||
|
||||
// CHECK: @i = global %struct.s undef
|
||||
// CHECK: @i ={{.*}} global %struct.s undef
|
||||
s i __attribute__((loader_uninitialized));
|
||||
|
||||
// CHECK: @private_extern_ok = hidden global i32 undef
|
||||
|
||||
@ -4,7 +4,7 @@ __attribute__((interrupt(1))) void foo(void) {}
|
||||
// CHECK: @llvm.used
|
||||
// CHECK-SAME: @foo
|
||||
|
||||
// CHECK: define msp430_intrcc void @foo() #0
|
||||
// CHECK: define{{.*}} msp430_intrcc void @foo() #0
|
||||
// CHECK: attributes #0
|
||||
// CHECK-SAME: noinline
|
||||
// CHECK-SAME: "interrupt"="1"
|
||||
|
||||
@ -84,7 +84,7 @@ void something_else_again() {
|
||||
// CHECK-DAG: declare void @_ZN1AC2Ev{{.*}} #[[ATTR2]]
|
||||
// CHECK-DAG: declare void @_ZN1AD1Ev{{.*}} #[[ATTR3:[0-9]+]]
|
||||
// CHECK-DAG: declare void @_ZN1AD2Ev{{.*}} #[[ATTR3]]
|
||||
// CHECK-DAG: define i32 @_Z1gi(i32 %i) #[[ATTR4:[0-9]+]] {
|
||||
// CHECK-DAG: define{{.*}} i32 @_Z1gi(i32 %i) #[[ATTR4:[0-9]+]] {
|
||||
|
||||
// CHECK-DAG: attributes #[[ATTR0]] = {{{.*}}nomerge{{.*}}}
|
||||
// CHECK-DAG: attributes #[[ATTR1]] = {{{.*}}nomerge{{.*}}}
|
||||
|
||||
@ -18,11 +18,11 @@ int bar() {
|
||||
}
|
||||
|
||||
// LINUX: @foo.ifunc = weak_odr ifunc i32 (i32), i32 (i32)* ()* @foo.resolver
|
||||
// LINUX: define i32 @foo.sse4.2(
|
||||
// LINUX: define{{.*}} i32 @foo.sse4.2(
|
||||
// LINUX: ret i32 0
|
||||
// LINUX: define i32 @foo.arch_ivybridge(
|
||||
// LINUX: define{{.*}} i32 @foo.arch_ivybridge(
|
||||
// LINUX: ret i32 1
|
||||
// LINUX: define i32 @foo(
|
||||
// LINUX: define{{.*}} i32 @foo(
|
||||
// LINUX: ret i32 2
|
||||
|
||||
// WINDOWS: define dso_local i32 @foo.sse4.2(
|
||||
@ -32,7 +32,7 @@ int bar() {
|
||||
// WINDOWS: define dso_local i32 @foo(
|
||||
// WINDOWS: ret i32 2
|
||||
|
||||
// LINUX: define i32 @bar()
|
||||
// LINUX: define{{.*}} i32 @bar()
|
||||
// LINUX: call void @func(i32 (i32)* @foo.ifunc)
|
||||
// LINUX: store i32 (i32)* @foo.ifunc
|
||||
// LINUX: store i32 (i32)* @foo.ifunc
|
||||
|
||||
@ -10,13 +10,13 @@ int bar() {
|
||||
}
|
||||
|
||||
// LINUX: @foo.ifunc = weak_odr ifunc i32 (i32, ...), i32 (i32, ...)* ()* @foo.resolver
|
||||
// LINUX: define i32 @foo.sse4.2(i32 %i, ...)
|
||||
// LINUX: define{{.*}} i32 @foo.sse4.2(i32 %i, ...)
|
||||
// LINUX: ret i32 0
|
||||
// LINUX: define i32 @foo.arch_ivybridge(i32 %i, ...)
|
||||
// LINUX: define{{.*}} i32 @foo.arch_ivybridge(i32 %i, ...)
|
||||
// LINUX: ret i32 1
|
||||
// LINUX: define i32 @foo(i32 %i, ...)
|
||||
// LINUX: define{{.*}} i32 @foo(i32 %i, ...)
|
||||
// LINUX: ret i32 2
|
||||
// LINUX: define i32 @bar()
|
||||
// LINUX: define{{.*}} i32 @bar()
|
||||
// LINUX: call i32 (i32, ...) @foo.ifunc(i32 1, i32 97, double
|
||||
// LINUX: call i32 (i32, ...) @foo.ifunc(i32 2, double 2.2{{[0-9Ee+]+}}, i8* getelementptr inbounds
|
||||
|
||||
|
||||
@ -75,31 +75,31 @@ __attribute__((target("avx,sse4.2"), used)) inline void foo_used2(int i, double
|
||||
// LINUX: @fwd_decl_default.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @fwd_decl_default.resolver
|
||||
// LINUX: @fwd_decl_avx.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @fwd_decl_avx.resolver
|
||||
|
||||
// LINUX: define i32 @foo.sse4.2()
|
||||
// LINUX: define{{.*}} i32 @foo.sse4.2()
|
||||
// LINUX: ret i32 0
|
||||
// LINUX: define i32 @foo.arch_ivybridge()
|
||||
// LINUX: define{{.*}} i32 @foo.arch_ivybridge()
|
||||
// LINUX: ret i32 1
|
||||
// LINUX: define i32 @foo.arch_goldmont()
|
||||
// LINUX: define{{.*}} i32 @foo.arch_goldmont()
|
||||
// LINUX: ret i32 3
|
||||
// LINUX: define i32 @foo.arch_goldmont-plus()
|
||||
// LINUX: define{{.*}} i32 @foo.arch_goldmont-plus()
|
||||
// LINUX: ret i32 4
|
||||
// LINUX: define i32 @foo.arch_tremont()
|
||||
// LINUX: define{{.*}} i32 @foo.arch_tremont()
|
||||
// LINUX: ret i32 5
|
||||
// LINUX: define i32 @foo.arch_icelake-client()
|
||||
// LINUX: define{{.*}} i32 @foo.arch_icelake-client()
|
||||
// LINUX: ret i32 6
|
||||
// LINUX: define i32 @foo.arch_icelake-server()
|
||||
// LINUX: define{{.*}} i32 @foo.arch_icelake-server()
|
||||
// LINUX: ret i32 7
|
||||
// LINUX: define i32 @foo.arch_cooperlake()
|
||||
// LINUX: define{{.*}} i32 @foo.arch_cooperlake()
|
||||
// LINUX: ret i32 8
|
||||
// LINUX: define i32 @foo.arch_tigerlake()
|
||||
// LINUX: define{{.*}} i32 @foo.arch_tigerlake()
|
||||
// LINUX: ret i32 9
|
||||
// LINUX: define i32 @foo.arch_sapphirerapids()
|
||||
// LINUX: define{{.*}} i32 @foo.arch_sapphirerapids()
|
||||
// LINUX: ret i32 10
|
||||
// LINUX: define i32 @foo.arch_alderlake()
|
||||
// LINUX: define{{.*}} i32 @foo.arch_alderlake()
|
||||
// LINUX: ret i32 11
|
||||
// LINUX: define i32 @foo()
|
||||
// LINUX: define{{.*}} i32 @foo()
|
||||
// LINUX: ret i32 2
|
||||
// LINUX: define i32 @bar()
|
||||
// LINUX: define{{.*}} i32 @bar()
|
||||
// LINUX: call i32 @foo.ifunc()
|
||||
|
||||
// WINDOWS: define dso_local i32 @foo.sse4.2()
|
||||
@ -135,7 +135,7 @@ __attribute__((target("avx,sse4.2"), used)) inline void foo_used2(int i, double
|
||||
// WINDOWS: call i32 @foo.sse4.2
|
||||
// WINDOWS: call i32 @foo
|
||||
|
||||
// LINUX: define i32 @bar2()
|
||||
// LINUX: define{{.*}} i32 @bar2()
|
||||
// LINUX: call i32 @foo_inline.ifunc()
|
||||
|
||||
// WINDOWS: define dso_local i32 @bar2()
|
||||
@ -155,7 +155,7 @@ __attribute__((target("avx,sse4.2"), used)) inline void foo_used2(int i, double
|
||||
// WINDOWS: call i32 @foo_inline.sse4.2
|
||||
// WINDOWS: call i32 @foo_inline
|
||||
|
||||
// LINUX: define void @bar3()
|
||||
// LINUX: define{{.*}} void @bar3()
|
||||
// LINUX: call void @foo_decls.ifunc()
|
||||
|
||||
// WINDOWS: define dso_local void @bar3()
|
||||
@ -169,7 +169,7 @@ __attribute__((target("avx,sse4.2"), used)) inline void foo_used2(int i, double
|
||||
// WINDOWS: call void @foo_decls.sse4.2
|
||||
// WINDOWS: call void @foo_decls
|
||||
|
||||
// LINUX: define void @bar4()
|
||||
// LINUX: define{{.*}} void @bar4()
|
||||
// LINUX: call void @foo_multi.ifunc(i32 1, double 5.{{[0+e]*}})
|
||||
|
||||
// WINDOWS: define dso_local void @bar4()
|
||||
@ -205,11 +205,11 @@ __attribute__((target("avx,sse4.2"), used)) inline void foo_used2(int i, double
|
||||
// WINDOWS: call void @foo_multi(i32 %0, double %1)
|
||||
// WINDOWS-NEXT: ret void
|
||||
|
||||
// LINUX: define i32 @fwd_decl_default()
|
||||
// LINUX: define{{.*}} i32 @fwd_decl_default()
|
||||
// LINUX: ret i32 2
|
||||
// LINUX: define i32 @fwd_decl_avx.avx()
|
||||
// LINUX: define{{.*}} i32 @fwd_decl_avx.avx()
|
||||
// LINUX: ret i32 2
|
||||
// LINUX: define i32 @fwd_decl_avx()
|
||||
// LINUX: define{{.*}} i32 @fwd_decl_avx()
|
||||
// LINUX: ret i32 2
|
||||
|
||||
// WINDOWS: define dso_local i32 @fwd_decl_default()
|
||||
@ -219,7 +219,7 @@ __attribute__((target("avx,sse4.2"), used)) inline void foo_used2(int i, double
|
||||
// WINDOWS: define dso_local i32 @fwd_decl_avx()
|
||||
// WINDOWS: ret i32 2
|
||||
|
||||
// LINUX: define void @bar5()
|
||||
// LINUX: define{{.*}} void @bar5()
|
||||
// LINUX: call i32 @fwd_decl_default.ifunc()
|
||||
// LINUX: call i32 @fwd_decl_avx.ifunc()
|
||||
|
||||
@ -243,8 +243,8 @@ __attribute__((target("avx,sse4.2"), used)) inline void foo_used2(int i, double
|
||||
// WINDOWS: call i32 @fwd_decl_avx.avx
|
||||
// WINDOWS: call i32 @fwd_decl_avx
|
||||
|
||||
// LINUX: define i32 @changed_to_mv.avx()
|
||||
// LINUX: define i32 @changed_to_mv.fma4()
|
||||
// LINUX: define{{.*}} i32 @changed_to_mv.avx()
|
||||
// LINUX: define{{.*}} i32 @changed_to_mv.fma4()
|
||||
|
||||
// WINDOWS: define dso_local i32 @changed_to_mv.avx()
|
||||
// WINDOWS: define dso_local i32 @changed_to_mv.fma4()
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user