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Author SHA1 Message Date
Rot127
ca07088b26 Add SystemZ decoder macro. 2024-09-03 11:24:32 +00:00
Giovanni
1496434327
Mips + microMips + nanoMips (#56) 
* Mips + microMips + nanoMips
* Add nanomips tests
 2024-09-01 00:57:34 +08:00
Rot127
029bac0e9b Allow to patch multiple default template arguments for Mips. 2024-08-28 08:36:41 +00:00
Rot127
6464d962f4 Handle MIPS SIMM9 operand 2024-07-28 14:29:13 +00:00
Rot127
584efadbc4 Panic if no decoder was initialized. 2024-07-28 14:29:13 +00:00
Rot127
90b6007454 Clear MCInst when the decode fails, to reset operand counter. 2024-07-28 14:29:13 +00:00
Rot127
dddf0d1faa Simplify name comparison 2024-07-07 03:41:09 +00:00
Rot127
933e2a85cf OP_GROUP enums can't be all upper case currently 2024-07-07 03:41:09 +00:00
Rot127
5f266ccfb9 Fix template patching for AArch64 2024-07-07 03:41:09 +00:00
Rot127
a795ea9719 Emit CS enum values in all capital letters 2024-06-24 07:27:52 +00:00
Rot127
5943ec6923 Add Alpha and LoongArch to the CI tests. 2024-06-04 12:57:14 +00:00
R3v0LT
3c619b615d Tblgen capstone backends - add Alpha architecture (#17) 2024-06-04 12:57:14 +00:00
Rot127
c302509824 Remove incorrect NZCV write. 2024-05-29 09:16:06 +00:00
Jiajie Chen
16baaaf307 Rename CS_AC_READ_WRTE to CS_AC_READ_WRITE 
Following https://github.com/capstone-engine/capstone/pull/2358
 2024-05-29 08:31:35 +00:00
Jiajie Chen
5c6d1fa0c9 Emit formats enum and supplemental info for LoongArch 2024-05-29 08:31:35 +00:00
Jiajie Chen
d93bd71b15 Set OperandType to OPERAND_IMMEDIATE for immediate operands 2024-05-29 08:31:35 +00:00
Jiajie Chen
4d5ca55385 Handle INVALID_SIMPLE_VALUE_TYPE in getEnumName 2024-05-29 08:31:35 +00:00
Rot127
1a7acd3aee Assign OPERAND_IMMEDIATE as OperandType of BareSymbol 2024-05-29 08:31:35 +00:00
Jiajie Chen
bece35d7fa Avoid using llvm_unreachable 2024-05-29 08:31:35 +00:00
Jiajie Chen
af1ff9c099 Change RegDiffLists type to MCPhysReg 2024-05-29 08:31:35 +00:00
Jiajie Chen
91da70b398 Handle multiple template arguments in handleDefaultArg 2024-05-29 08:31:35 +00:00
Jiajie Chen
1ac920cc21 Add LoongArch support 2024-05-29 08:31:35 +00:00
Rot127
1f5a51cec8 Generate BOUND flags for SME operands. 2024-05-29 08:31:35 +00:00
Rot127
118ad37dd0 Fix regex pattern to not match operand names between ] and [ 2024-05-29 08:31:35 +00:00
Rot127
1312d742a5 Add memory access info as supplementary AArch64 info 2024-05-29 08:31:35 +00:00
Rot127
f5c4f04bd6 Check in patterns for memory operand properties. 
- Determine memory operands by there membership of patterns.

Operands can be defined via patterns. The pattern has a type itself.
Patterns are commonly used to define memory operands
(as a collection of multiple other operands).

Here we check, if the operand is part of a pattern with type iPTR.
Type iPTR indicates a memory operand.

- Search for unspecified instruction patterns and extract memory op info from them.

AArch64 has the case of patterns which are not set in the CGI class.
Instead those patterns are free floating in the record keeper.

With this commit we first collect all such unassigned patterns and save them in a map
(indexed by instruction name they belong to).

When instruction operand details are generated, the operand type is searched in the pattern of the instruction.
If there is an operand with the same type in the pattern, which is also of a iPTR pattern, we treat it as memory operand.

Note that we can not compare the operands of the instruction and the pattern operands by name.
Because they simply are not named the same way.

This is a short coming in the td files and should be addressed in LLVM.
Because it is enormiously hard to get a 1 to 1 mapping from a pattern to an instruction
and its operands.
 2024-05-29 08:31:35 +00:00
Rot127
162c1c0002 Initialize DecoderComplete flag in generated decoder function. 2024-05-29 08:31:35 +00:00
Rot127
b025bae5cf Assign enum value to the raw_val member to prevent compiler warnings. 2024-05-29 08:31:35 +00:00
Rot127
d386558ab6 Remove check for same name, different signature functions. 2024-05-29 08:31:35 +00:00
Rot127
a35941283f Add AdrLabel and AdrpLable to OP_GROUPS 2024-05-29 08:31:35 +00:00
Rot127
2be2c0fed8 Add MatrixIndex_... to the OP_GROUP list 2024-05-29 08:31:35 +00:00
Rot127
04b82d5399 Fix template function translation 2024-05-29 08:31:35 +00:00
Rot127
86c1c566e6 Fix: Don't return NULL for a struct 2024-05-29 08:31:35 +00:00
Rot127
1318024d0c Format code 2024-05-29 08:31:35 +00:00
Rot127
2e51e2eded Generate InstDecs tables with references to the OpInfo structs. 2024-05-29 08:31:35 +00:00
Rot127
f3c60336ba Add default argument for printSVERegOp 2024-05-29 08:31:35 +00:00
Rot127
a7d6b2f4e1 Define the InstrTable as own type 2024-05-29 08:31:35 +00:00
Rot127
1d9e607d63 Remove asserts 2024-05-29 08:31:35 +00:00
Rot127
9cbe1f3883 Add missing include guard to ignore list. 2024-05-29 08:31:35 +00:00
Rot127
9b0af77cd4 Extends docs 2024-05-29 08:31:35 +00:00
Rot127
1beb1667d4 Enable EmitMapTable to print C tables. 2024-05-29 08:31:35 +00:00
Rot127
100ca315f2 Remove instruction encoding information. 2024-05-29 08:31:35 +00:00
Rot127
d77b8e1e18 Fix no-return values warning from compiler. 2024-05-29 08:31:35 +00:00
Rot127
77cde4e9bb Fix mismatch in generated C++ SystemOperands files. 2024-05-29 08:31:35 +00:00
Rot127
3d027d2146 Fix mismatch in C++ Subtarget files 2024-05-29 08:31:35 +00:00
Rot127
b9cb107187 Fix mismatches in generated C++ code. 2024-05-29 08:31:35 +00:00
Rot127
31564d0004 Remove syntax check, because it doesn't work that easy. 2024-05-29 08:31:35 +00:00
Rot127
38c9f1312a Make gen scripts use the repository root dir. 2024-05-29 08:31:35 +00:00
Rot127
1a0c3b2478 Fix some incorrectly generated source code after rebase. 2024-05-29 08:31:35 +00:00
Rot127
01fe52b2cc Fix workflows 2024-05-29 08:31:35 +00:00