Commit Graph

480240 Commits

Author SHA1 Message Date
David Spickett
e3d750cc40
[lldb][AArch64][Linux] Add fields for FPCR register (#71694)
Follows the format laid out in the Arm manual, AArch32 only fields are
ignored.

```
(lldb) register read fpcr
    fpcr = 0x00000000
         = (AHP = 0, DN = 0, FZ = 0, RMMode = 0, FZ16 = 0, IDE = 0, IXE = 0, UFE = 0, OFE = 0, DZE = 0, IOE = 0)
```

Tests use the first 4 fields that we know are always present.

Converted all the HCWAP defines to `UL` because I'm bound to
forget one if I don't do it now.
2023-11-09 09:32:24 +00:00
Nikita Popov
74a76a2885
[BranchFolding] Remove dubious assert from operator< (#71639)
`MergePotentialElts::operator<` asserts that the two elements being
compared are not equal. However, sorting functions are allowed to invoke
the comparison function with equal arguments (though they usually don't
for efficiency reasons).

There is an existing special-case that disables the assert if
_GLIBCXX_DEBUG is used, which may invoke the comparator with equal args
to verify strict weak ordering. I believe libc++ also has strict weak
ordering checks under some options nowadays.

Recently, #71312 was reported, where a change to glibc's qsort_r
implementation can also result in comparison between equal elements.
From what I understood, this is an inefficiency that will be fixed on
the glibc side as well, but I think at this point we should just remove
this assertion.

Fixes https://github.com/llvm/llvm-project/issues/71312.
2023-11-09 10:23:10 +01:00
Eymen Ünay
f6d525f8d8
[JITLink][AArch32] Unittest for error paths of readAddend and applyFixup functionality (#69636)
This test checks for error paths in relocation dependent functions of readAddend and applyFixup. It is useful to check these to avoid unexpected assert errors. Currently opcode errors are triggered in most of the cases in AArch32 but there might be further checks to look for in the future. Different backends can also implement a similar test.
2023-11-09 12:22:36 +03:00
Orlando Cazalet-Hyams
fbc652061e
[llvm-dwarfdump] pretty-print DW_AT_call_origin reference (#71693) 2023-11-09 09:04:11 +00:00
Eymen Ünay
87081f1c18
[JITLink][AArch32] Add support for ELF::R_ARM_THM_MOV{W_PREL_NC,T_PREL} (#70364)
Support for ELF::R_ARM_THM_MOVW_PREL_NC and ELF::R_ARM_THM_MOVT_PREL
is added. Move instructions with PC-relative immediates can be handled
in Thumb mode with this addition.
2023-11-09 11:51:02 +03:00
Nikita Popov
228ef85b5b
[X86] Return more accurate getNumSupportedRegs() (NFC) (#71690)
https://github.com/llvm/llvm-project/pull/70222 introduced a hook to
return a more accurate number of registers supported for a specific
subtarget (rather than target). However, while x86 registers were
reordered to allow using this, the implementation currently still always
returns NUM_TARGET_REGS.

Adjust it to return a smaller number of registers depending on
availability of avx/avx512/amx.

The actual impact of this seems to be pretty small, on the order of
0.05%.
2023-11-09 09:49:36 +01:00
David Spickett
14b5abbfe2
[lldb][AArch64][Linux] Add field information for the fpsr register (#71651)
This one is easy because none of the fields depend on extensions. Only
thing to note is that I've ignored some AArch32 only fields.

```
(lldb) register read fpsr
    fpsr = 0x00000000
         = (QC = 0, IDC = 0, IXC = 0, UFC = 0, OFC = 0, DZC = 0, IOC = 0)
```
2023-11-09 08:18:44 +00:00
Job Noorman
c4b096a343 [BOLT] Fix typo in test 2023-11-09 09:14:27 +01:00
Cullen Rhodes
0199d514ee
[compiler-rt][www] replace deprecated LLVM_CONFIG_PATH with LLVM_CMAKE_DIR (#71500)
This updates the standalone build docs for compiler-rt to replace
deprecated LLVM_CONFIG_PATH with LLVM_CMAKE_DIR. A warning (added in
D137024) is emitted for the current instructions.

---------

Co-authored-by: Chris B <cbieneman@microsoft.com>
2023-11-09 08:05:32 +00:00
martinboehme
ae74370511
[clang][dataflow][NFC] Fix stale comments. (#71654) 2023-11-09 08:39:06 +01:00
Chuanqi Xu
427f13bd72 [NFC] [C++20] [Modules] Remove 'ModuleInterface' bit in Sema::ModuleScope
The 'ModuleInterface' in Sema::ModuleScope is confusing. It actually
means 'not implementation'. This patch removes that bit and extract the
information from the recorded clang::Module.
2023-11-09 15:20:32 +08:00
Wang Pengcheng
e179b125fb
[RISCV][NFC] Pass MCSubtargetInfo instead of FeatureBitset in RISCVMatInt (#71770)
The use of `hasFeature` is more descriptive and the callers of
`RISCVMatInt` have no need to call `getFeatureBits()` any more.
2023-11-09 15:15:23 +08:00
Maksim Levental
7c7882fcff
[mlir][llvmir] fix docs (#71765) 2023-11-09 01:00:03 -06:00
Timm Baeder
8feb0830cb
[clang][Interp] Consider bit width in IntegralAP::toAPSInt() (#71646)
In `Interp.h`, when a add/sub/mul fails, we call this code and expect to
get an `APSInt` back that can handle more than the current bitwidth of
the type.
2023-11-09 07:46:55 +01:00
Chuanqi Xu
b7b5907b56
[Coroutines] Introduce [[clang::coro_only_destroy_when_complete]] (#71014)
Close https://github.com/llvm/llvm-project/issues/56980.

This patch tries to introduce a light-weight optimization attribute for
coroutines which are guaranteed to only be destroyed after it reached
the final suspend.

The rationale behind the patch is simple. See the example:

```C++
A foo() {
  dtor d;
  co_await something();
  dtor d1;
  co_await something();
  dtor d2;
  co_return 43;
}
```

Generally the generated .destroy function may be:

```C++
void foo.destroy(foo.Frame *frame) {
  switch(frame->suspend_index()) {
    case 1:
      frame->d.~dtor();
      break;
    case 2:
      frame->d.~dtor();
      frame->d1.~dtor();
      break;
    case 3:
      frame->d.~dtor();
      frame->d1.~dtor();
      frame->d2.~dtor();
      break;
    default: // coroutine completed or haven't started
      break;
  }

  frame->promise.~promise_type();
  delete frame;
}
```

Since the compiler need to be ready for all the cases that the coroutine
may be destroyed in a valid state.

However, from the user's perspective, we can understand that certain
coroutine types may only be destroyed after it reached to the final
suspend point. And we need a method to teach the compiler about this.
Then this is the patch. After the compiler recognized that the
coroutines can only be destroyed after complete, it can optimize the
above example to:

```C++
void foo.destroy(foo.Frame *frame) {
  frame->promise.~promise_type();
  delete frame;
}
```

I spent a lot of time experimenting and experiencing this in the
downstream. The numbers are really good. In a real-world coroutine-heavy
workload, the size of the build dir (including .o files) reduces 14%.
And the size of final libraries (excluding the .o files) reduces 8% in
Debug mode and 1% in Release mode.
2023-11-09 14:42:07 +08:00
Craig Topper
e3c120a585 [RISCV] Add a Zbb+Zbs command line to rv*zbs.ll to get coverage on an existing isel pattern. NFC
This pattern wasn't tested

def : Pat<(XLenVT (and (rotl -2, (XLenVT GPR:$rs2)), GPR:$rs1)),
          (BCLR GPR:$rs1, GPR:$rs2)>;1
2023-11-08 22:31:49 -08:00
Saiyedul Islam
21861991e7
[OpenMP] Cleanup and fixes for ABI agnostic DeviceRTL (#71234)
Fixes the DeviceRTL compilation to ensure it is ABI agnostic. Uses
already available global variable "oclc_ABI_version" instead of
"llvm.amdgcn.abi.verion".

It also adds some minor fields in ImplicitArg structure.
2023-11-09 10:34:35 +05:30
Pravin Jagtap
1f21e49870
Revert "Revert "[AMDGPU] const-fold imm operands of (#71669)
amdgcn_update_dpp intrinsic (#71139)""

This reverts commit d1fb930795 and fixes
the lit test clang/test/CodeGenHIP/dpp-const-fold.hip

---------

Authored-by: Pravin Jagtap <Pravin.Jagtap@amd.com>
2023-11-09 10:09:22 +05:30
Allen
7ec86f4d68
[SimplifyCFG] Fix the compile crash for invalid upper bound value (#71351)
Fix the crash for the last land PR70542.

Note:
For '%add = add nuw i32 %x, 1', we can only infer the LowerBound is 1,
but the UpperBound is wrapped to 0 in computeConstantRange.
so we can't assume the UpperBound is valid bound when its value is 0.

Fix https://github.com/llvm/llvm-project/issues/71329.
Reviewed By: zmodem, nikic
2023-11-09 12:33:24 +08:00
Jonas Devlieghere
919f5ef462
[lldb] Add Checksum to FileSpec (#71457)
Store a Checksum in FileSpec. Its purpose is to store the MD5 hash that
was added to the DWARF 5 line table.

This increases the size of a FileSpec from 24 to 40 bytes. The
alternative is to introduce a new SupportFile abstraction for a FileSpec
+ Checksum but that would require a corresponding SupportFileList class.
During review we decided that wasn't worth it, but that's something we
can revisit in the future.
2023-11-08 20:11:48 -08:00
Tacet
8a454e1e3c
[libc++][ASan] Removing clang version checks (#71673)
This commit removes checks like `_LIBCPP_CLANG_VER >= 1600` related to
ASan annotations. As only 2 previous versions are supported, it's a TODO
for LLVM 18.
2023-11-08 16:28:08 -10:00
Conrad Donahue
68d618f908
[clang-format] Add ability for clang-format-diff to exit with non-0 status (#70883)
This patch adds the ability for the clang-format-diff script to exit
with a non-zero status if it detects that formatting changes are
necessary. This makes it easier to use clang-format-diff as part of a
DevOps pipeline, since you could add a stage to run clang-format-diff
and fail if the formatting needs to be fixed.
2023-11-08 18:13:03 -08:00
Jianjian Guan
d36eb79ccc
[RISCV] Support Strict FP arithmetic Op when only have Zvfhmin (#68867)
Include: STRICT_FADD, STRICT_FSUB, STRICT_FMUL, STRICT_FDIV,
STRICT_FSQRT and STRICT_FMA.
2023-11-09 09:55:48 +08:00
Uday Bondhugula
ab03141106
[MLIR][Affine] NFC. Move misplaced MDG init method (#71665)
MemRefDependenceGraph::init should have been in affine analysis utils
since MemRefDependenceGraph is part of the affine analysis library; its
move was missed. Move it. NFC.
2023-11-09 07:10:28 +05:30
Uday Bondhugula
d1ceb740ab
[MLIR][Affine] NFC. Fix stale comments and style in affine libraries (#71660)
Fix stale comments in affine libraries; fix clang-tidy warnings/style.
NFC.
2023-11-09 07:08:44 +05:30
Med Ismail Bennani
0adbde6541
[lldb] Fix assert in ScriptedProcess destructor (#71744)
This patch should fix a test failure in
`Expr/TestIRMemoryMapWindows.test`:

https://lab.llvm.org/buildbot/#/builders/219/builds/6786

The problem here is that since 7991412 landed, all the
`ScriptInterpreter::CreateScripted*Interface` now return a `nullptr`
when using the base `ScriptInterpreter` instance, instead of
`ScriptInterpreterPython` for instance.

This nullptr is actually well handled in the various places where we
create a Scripted Interface, however, because of the way to instanciate
a process, the process plugin manager have to iterate over every process
plugin and call the `CreateInstance` static function that should
instanciate the right object.

So in the ScriptedProcess case, because we are getting a `nullptr` when
trying to create a `ScriptedProcessInterface`, we try to discard the
process object, which calls the Process destructor, which in turns calls
the `ScriptedProcess` plugin `IsAlive` method. That method will fire an
assertion if the scripted interface pointer is not allocated.

This patch address that issue by setting a flag when destroying the
ScriptedProcess object, and checks that flag when calling `IsAlive`.

Signed-off-by: Med Ismail Bennani <ismail@bennani.ma>
2023-11-08 17:18:40 -08:00
jeffreytan81
f175b9647c
Improve VSCode DAP logpoint value summary (#71723)
Currently VSCode logpoint uses `SBValue::GetValue` to get the value for
printing. This is not providing an intuitive result for std::string or
char * -- it shows the pointer value instead of the string content.

This patch improves by prefers `SBValue::GetSummary()` before using
`SBValue::GetValue()`.

---------

Co-authored-by: jeffreytan81 <jeffreytan@fb.com>
2023-11-08 16:48:55 -08:00
Rafael Auler
4c9f6d6f02
[BOLT][AArch64] Fix ifuncs test header inclusion (#71741)
Summary: Do not include stdlib headers as these tests are built with
-nostdlib. Tests outside of runtime folder also run cross-platforms, so
an x86 machine wouldn't have access to the correct headers used in the
aarch64 toolchain, even if it has an aarch64 compiler (clang itself).
2023-11-08 16:42:21 -08:00
Alex Langford
d42b2ceb6c Revert "[Pass][CodeGen] Add some necessary passes for codegen (#70903)"
This change broke building LLVM with Module support enabled, i.e.
`LLVM_ENABLE_MODULES=ON`.
This reverts commit f40da072ed.
2023-11-08 15:59:44 -08:00
Daniel Thornburgh
71de61259a
[lld][MachO] Prevent doubled N_SO when comp_dir and name absolute (#71608)
When forming MachO STABS, this change detects if the DW_AT_name of the
compile unit is already absolute (as allowed by DWARF), and if so, does
not prepend DW_AT_comp_dir.

Fixes #70995
2023-11-08 15:55:22 -08:00
Konstantin Varlamov
4a9c71b8c2
[libc++][hardening] Fix references to old names for hardening modes (#71743)
This should fix some builds broken by
https://github.com/llvm/llvm-project/pull/70575
2023-11-08 13:16:01 -10:00
Maksim Levental
950f68991f
[mlir][cmake] export list of CAPI libs (#71722) 2023-11-08 16:59:17 -06:00
Anthony Cabrera
8803211a32
[flang][hlfir] patch for assumed shape dummy with VALUE keyword when lowering to HLFIR (#70391)
Adds functionality for assumed shape dummy with value keyword when
lowering to HLFIR
2023-11-08 16:21:51 -06:00
Quinn Dawkins
f6d487207d
[mlir][vector] Add folders for full constant transfer masks (#71676)
When the mask bounds of a `vector.constant_mask` exactly equal the shape
of the vector, any transfer op consuming that mask will be unaffected by
it. Drop the mask in such cases.
2023-11-08 16:35:28 -05:00
spupyrev
ef6d187115
[ELF] Fix assertion in cdsort (#71708)
It seems that some functions (.text.unlikely.xxx) may have zero size,
which
makes some builds with enabled assertions fail. Removing the assertion
and
extending one test to fix the build.
The sorting can process such zero-sized functions so no changes there
are needed
2023-11-08 12:34:36 -08:00
Aleksei Nurmukhametov
76947e0405
[LLD][COFF] Support /DEPENDENTLOADFLAG[:flags] (#71537)
This should fix https://github.com/llvm/llvm-project/issues/43935
2023-11-08 15:21:05 -05:00
Fabian Mora
fd389f46de
[flang] Change uniqueCGIdent separator from . to X (#71338)
Change the separator in the `uniqueCGIdent` method to `X`. This change
is required to enable OpenMP offloading for the NVPTX target, as dots
are not valid identifiers in PTX and `uniqueCGIdent` is used to mangle
some literals. Follow up patches will change the remainder of `.`
appearances in names to `X` and add support for the NVPTX target.
2023-11-08 15:04:00 -05:00
Krzysztof Drewniak
05fa923a9b
Fix SmallVector usage in SerailzeToHsaco (#71702)
Enable merging #71439 by removing a definitely-wrong usage of
std::unique_ptr<SmallVectorImpl<char>> as a return value with passing in
a SmallVectorImpl<char>&

Also change the following function to take ArrayRef<char> instead of
const SmalVectorImpl<char>& .
2023-11-08 13:57:41 -06:00
Arthur Eubanks
955dd8800b
Revert "Reland [clang] Canonicalize system headers in dependency file when -canonical-prefixes" (#71697)
This reverts commit 578a4716f5.

This causes multiple issues. Compile time slowdown due to more path
canonicalization, and weird behavior on Windows.

Will reland under a separate flag `-f[no-]canonical-system-headers` to
match gcc in the future and further limit when it's passed by default.

Fixes #70011.
2023-11-08 11:43:35 -08:00
Jun Wang
54470176af
[AMDGPU] Add inreg support for SGPR arguments (#67182)
Function parameters marked with inreg are supposed to be allocated to
SGPRs. However, for compute functions, this is ignored and function
parameters are allocated to VGPRs. This fix modifies CC_AMDGPU_Func in
AMDGPUCallingConv.td to use SGPRs if input arg is marked inreg.
---------

Co-authored-by: Jun Wang <jun.wang7@amd.com>
2023-11-08 11:35:52 -08:00
Peiming Liu
c99951d491
[mlir][sparse] end-to-end matmul between Dense and BSR tensors (#71448) 2023-11-08 11:28:00 -08:00
Konstantin Varlamov
64d413efdd
[libc++][hardening] Rework macros for enabling the hardening mode. (#70575)
1. Instead of using individual "boolean" macros, have an "enum" macro
`_LIBCPP_HARDENING_MODE`. This avoids issues with macros being
mutually exclusive and makes overriding the hardening mode within a TU
more straightforward.

2. Rename the safe mode to debug-lite.

This brings the code in line with the RFC:
https://discourse.llvm.org/t/rfc-hardening-in-libc/73925

Fixes #65101
2023-11-08 09:10:00 -10:00
LLVM GN Syncbot
b8a0620615 [gn build] Port c6cf329502 2023-11-08 18:54:05 +00:00
Jacob Lambert
c6cf329502
[CodeGen] Implement post-opt linking option for builtin bitocdes (#69371)
In this patch, we create a new ModulePass that mimics the LinkInModules
API from CodeGenAction.cpp, and a new command line option to enable the
pass. As part of the implementation, we needed to refactor the
BackendConsumer class definition into a new separate header (instead of
embedded in CodeGenAction.cpp). With this new pass, we can now re-link
bitcodes supplied via the -mlink-built-in bitcodes as part of the
RunOptimizationPipeline.

With the re-linking pass, we now handle cases where new device library
functions are introduced as part of the optimization pipeline.
Previously, these newly introduced functions (for example a fused sincos
call) would result in a linking error due to a missing function
definition. This new pass can be initiated via:

      -mllvm -relink-builtin-bitcode-postop

Also note we intentionally exclude bitcodes supplied via the
-mlink-bitcode-file option from the second linking step
2023-11-08 10:53:49 -08:00
Maksim Panchenko
254ccb95e8
[BOLT] Follow-up to "Fix incorrect basic block output addresses" (#71630)
In 8244ff6739, I've introduced an
assertion that incorrectly used BasicBlock::empty(). Some basic blocks
may contain only pseudo instructions and thus BB->empty() will evaluate
to false, while the actual code size will be zero.
2023-11-08 10:53:36 -08:00
Greg Clayton
5aa934e2af
Make DWARFUnitVector threadsafe. (#71487)
The DWARFUnitVector class lives inside of the DWARFContextState. Prior
to this fix a non const reference was being handed out to clients. When
fetching the DWO units, there used to be a "bool Lazy" parameter that
could be passed that would allow the DWARFUnitVector to parse individual
units on the fly. There were two major issues with this approach:
- not thread safe and causes crashes
- the accessor would check if DWARFUnitVector was empty and if not empty
it would return a partially filled in DWARFUnitVector if it was
constructed with "Lazy = true"

This patch fixes the issues by always fully parsing the DWARFUnitVector
when it is requested and only hands out a "const DWARFUnitVector &".
This allows the thread safety mechanism built into the DWARFContext
class to work corrrectly, and avoids the issue where if someone
construct DWARFUnitVector with "Lazy = true", and then calls an API that
partially fills in the DWARFUnitVector with individual entries, and then
someone accesses the DWARFUnitVector, they would get a partial and
incomplete listing of the DWARF units for the DWOs.
2023-11-08 10:20:02 -08:00
LLVM GN Syncbot
070fde30a7 [gn build] Port 7ef7a92ead 2023-11-08 18:12:25 +00:00
Jonas Devlieghere
7ef7a92ead
[lldb] Add Checksum class to lldbUtility (#71456)
This commit adds an MD5 checksum (`Checksum`) class to LLDB. Its purpose
is to store the MD5 hash added to the DWARF 5 line table.
2023-11-08 10:11:58 -08:00
Adrian Prantl
767ce07c2d
Simplify ValueObject::GetQualifiedRepresentationIfAvailable(). (#71559)
I received a couple of nullptr-deref crash reports with no line numbers
in this function. The way the function was written it was a bit
diffucult to keep track of when result_sp could be null, so this patch
simplifies the function to make it more obvious when a nullptr can be
contained in the variable.
2023-11-08 09:54:41 -08:00
Aart Bik
5ef446790f
[mlir][sparse][gpu] cleanup GPUDataTransferStrategy (#71615)
The flag seems to be doing practically the same thing for zero cost and
pinned dma. In addition, the register host is not truly the right zero
cost mechanism according to Thomas. So we are simplifying the setup for
now, until we have a better definition for what to implement and test.
    
https://github.com/llvm/llvm-project/issues/64316
2023-11-08 09:45:11 -08:00