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https://github.com/capstone-engine/llvm-capstone.git
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158d72d728
Set the writable and dead_on_unwind attributes for sret arguments. These indicate that the argument points to writable memory (and it's legal to introduce spurious writes to it on entry to the function) and that the argument memory will not be used if the call unwinds. This enables additional MemCpyOpt/DSE/LICM optimizations.
174 lines
6.8 KiB
C
174 lines
6.8 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
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// RUN: %clang_cc1 -triple aarch64-linux-gnu -S -O1 -emit-llvm %s -o - | FileCheck %s
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// CHECK-LABEL: define dso_local noundef i1 @check_isfpclass_finite
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// CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[X]])
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// CHECK-NEXT: [[TMP1:%.*]] = fcmp one float [[TMP0]], 0x7FF0000000000000
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// CHECK-NEXT: ret i1 [[TMP1]]
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//
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_Bool check_isfpclass_finite(float x) {
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return __builtin_isfpclass(x, 504 /*Finite*/);
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}
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// CHECK-LABEL: define dso_local noundef i1 @check_isfpclass_finite_strict
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// CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 504) #[[ATTR5:[0-9]+]]
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// CHECK-NEXT: ret i1 [[TMP0]]
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//
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_Bool check_isfpclass_finite_strict(float x) {
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#pragma STDC FENV_ACCESS ON
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return __builtin_isfpclass(x, 504 /*Finite*/);
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}
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// CHECK-LABEL: define dso_local noundef i1 @check_isfpclass_nan_f32
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// CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = fcmp uno float [[X]], 0.000000e+00
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// CHECK-NEXT: ret i1 [[TMP0]]
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//
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_Bool check_isfpclass_nan_f32(float x) {
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return __builtin_isfpclass(x, 3 /*NaN*/);
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}
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// CHECK-LABEL: define dso_local noundef i1 @check_isfpclass_nan_f32_strict
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// CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 3) #[[ATTR5]]
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// CHECK-NEXT: ret i1 [[TMP0]]
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//
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_Bool check_isfpclass_nan_f32_strict(float x) {
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#pragma STDC FENV_ACCESS ON
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return __builtin_isfpclass(x, 3 /*NaN*/);
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}
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// CHECK-LABEL: define dso_local noundef i1 @check_isfpclass_snan_f64
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// CHECK-SAME: (double noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f64(double [[X]], i32 1)
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// CHECK-NEXT: ret i1 [[TMP0]]
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//
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_Bool check_isfpclass_snan_f64(double x) {
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return __builtin_isfpclass(x, 1 /*SNaN*/);
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}
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// CHECK-LABEL: define dso_local noundef i1 @check_isfpclass_snan_f64_strict
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// CHECK-SAME: (double noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f64(double [[X]], i32 1) #[[ATTR5]]
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// CHECK-NEXT: ret i1 [[TMP0]]
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//
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_Bool check_isfpclass_snan_f64_strict(double x) {
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#pragma STDC FENV_ACCESS ON
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return __builtin_isfpclass(x, 1 /*NaN*/);
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}
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// CHECK-LABEL: define dso_local noundef i1 @check_isfpclass_zero_f16
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// CHECK-SAME: (half noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = fcmp oeq half [[X]], 0xH0000
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// CHECK-NEXT: ret i1 [[TMP0]]
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//
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_Bool check_isfpclass_zero_f16(_Float16 x) {
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return __builtin_isfpclass(x, 96 /*Zero*/);
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}
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// CHECK-LABEL: define dso_local noundef i1 @check_isfpclass_zero_f16_strict
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// CHECK-SAME: (half noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f16(half [[X]], i32 96) #[[ATTR5]]
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// CHECK-NEXT: ret i1 [[TMP0]]
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//
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_Bool check_isfpclass_zero_f16_strict(_Float16 x) {
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#pragma STDC FENV_ACCESS ON
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return __builtin_isfpclass(x, 96 /*Zero*/);
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}
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// CHECK-LABEL: define dso_local noundef i1 @check_isnan
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// CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 3) #[[ATTR5]]
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// CHECK-NEXT: ret i1 [[TMP0]]
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//
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_Bool check_isnan(float x) {
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#pragma STDC FENV_ACCESS ON
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return __builtin_isnan(x);
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}
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// CHECK-LABEL: define dso_local noundef i1 @check_isinf
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// CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 516) #[[ATTR5]]
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// CHECK-NEXT: ret i1 [[TMP0]]
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//
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_Bool check_isinf(float x) {
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#pragma STDC FENV_ACCESS ON
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return __builtin_isinf(x);
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}
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// CHECK-LABEL: define dso_local noundef i1 @check_isfinite
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// CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 504) #[[ATTR5]]
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// CHECK-NEXT: ret i1 [[TMP0]]
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//
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_Bool check_isfinite(float x) {
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#pragma STDC FENV_ACCESS ON
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return __builtin_isfinite(x);
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}
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// CHECK-LABEL: define dso_local noundef i1 @check_isnormal
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// CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float [[X]], i32 264) #[[ATTR5]]
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// CHECK-NEXT: ret i1 [[TMP0]]
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//
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_Bool check_isnormal(float x) {
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#pragma STDC FENV_ACCESS ON
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return __builtin_isnormal(x);
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}
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typedef float __attribute__((ext_vector_type(4))) float4;
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typedef double __attribute__((ext_vector_type(4))) double4;
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typedef int __attribute__((ext_vector_type(4))) int4;
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typedef long __attribute__((ext_vector_type(4))) long4;
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// CHECK-LABEL: define dso_local noundef <4 x i32> @check_isfpclass_nan_v4f32
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// CHECK-SAME: (<4 x float> noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = fcmp uno <4 x float> [[X]], zeroinitializer
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// CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i1> [[TMP0]] to <4 x i32>
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// CHECK-NEXT: ret <4 x i32> [[TMP1]]
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//
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int4 check_isfpclass_nan_v4f32(float4 x) {
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return __builtin_isfpclass(x, 3 /*NaN*/);
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}
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// CHECK-LABEL: define dso_local noundef <4 x i32> @check_isfpclass_nan_strict_v4f32
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// CHECK-SAME: (<4 x float> noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = tail call <4 x i1> @llvm.is.fpclass.v4f32(<4 x float> [[X]], i32 3) #[[ATTR5]]
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// CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i1> [[TMP0]] to <4 x i32>
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// CHECK-NEXT: ret <4 x i32> [[TMP1]]
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//
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int4 check_isfpclass_nan_strict_v4f32(float4 x) {
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#pragma STDC FENV_ACCESS ON
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return __builtin_isfpclass(x, 3 /*NaN*/);
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}
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// CHECK-LABEL: define dso_local void @check_isfpclass_nan_v4f64
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// CHECK-SAME: (ptr dead_on_unwind noalias nocapture writable writeonly sret(<4 x i64>) align 16 [[AGG_RESULT:%.*]], ptr nocapture noundef readonly [[TMP0:%.*]]) local_unnamed_addr #[[ATTR3:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[X:%.*]] = load <4 x double>, ptr [[TMP0]], align 16, !tbaa [[TBAA2:![0-9]+]]
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// CHECK-NEXT: [[TMP1:%.*]] = fcmp uno <4 x double> [[X]], zeroinitializer
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// CHECK-NEXT: [[TMP2:%.*]] = zext <4 x i1> [[TMP1]] to <4 x i64>
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// CHECK-NEXT: store <4 x i64> [[TMP2]], ptr [[AGG_RESULT]], align 16, !tbaa [[TBAA2]]
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// CHECK-NEXT: ret void
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//
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long4 check_isfpclass_nan_v4f64(double4 x) {
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return __builtin_isfpclass(x, 3 /*NaN*/);
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}
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