mirror of
https://github.com/capstone-engine/llvm-capstone.git
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1864 lines
96 KiB
C++
1864 lines
96 KiB
C++
//===--------------- Printer.h - Printer Interface --------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_UTILS_TABLEGEN_PRINTER_H
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#define LLVM_UTILS_TABLEGEN_PRINTER_H
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#include "AsmMatcherEmitterTypes.h"
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#include "AsmWriterInst.h"
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#include "CodeGenRegisters.h"
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#include "CodeGenTarget.h"
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#include "DecoderEmitterTypes.h"
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#include "InstrInfoEmitterTypes.h"
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#include "PrinterTypes.h"
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#include "RegisterInfoEmitterTypes.h"
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#include "SearchableTablesTypes.h"
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#include "SubtargetEmitterTypes.h"
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#include "SubtargetFeatureInfo.h"
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#include "llvm/MC/MCInstrItineraries.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Support/raw_ostream.h"
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typedef enum {
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ST_NONE,
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ST_DECL_OS,
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ST_IMPL_OS,
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ST_ENUM_SYSOPS_OS,
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} StreamType;
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namespace llvm {
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class PrinterBitVectorEmitter {
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BitVector Values;
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public:
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virtual void add(unsigned V);
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virtual void print(raw_ostream &OS);
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};
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void printBitVectorAsHex(raw_ostream &OS, const BitVector &Bits,
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unsigned Width);
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class PrinterCapstone;
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//==============================
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//
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// Implementation: LLVM
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//
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//==============================
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/// Interface for printing the generated code.
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/// Every string which will be in the generated code of a backend originates
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/// from here.
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///
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/// It also is the only class which writes directly into the output stream for
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/// the backend.
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///
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/// This class has methods for all classes of backends which emit generated
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/// code. If a backend currently does not emit the code in a language you need
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/// you simply inherit this class and implement the relevant methods.
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///
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/// Printer implementation of LLVM.
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/// This is the default printer for all backends.
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///
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/// Output language: C++
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class PrinterLLVM {
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friend PrinterCapstone;
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private:
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formatted_raw_ostream &OS;
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//-------------------------
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// Backend: DecoderEmitter and Subtarget
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//-------------------------
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std::string TargetName;
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std::string PredicateNamespace;
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std::string GuardPrefix, GuardPostfix;
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std::string ReturnOK, ReturnFail;
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std::string Locals;
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//----------------------------
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// Backends: InstrInfo
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// SubTargetInfo
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// SearchableTables
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//----------------------------
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PredicateExpander *PE = nullptr;
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std::set<std::string> PreprocessorGuards = std::set<std::string>();
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//--------------------------
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// Backend: AsmMatcher
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//--------------------------
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// Convert function stream.
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// Write the convert function to a separate stream, so we can drop it after
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// the enum. We'll build up the conversion handlers for the individual
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// operand types opportunistically as we encounter them.
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std::string *ConvertFnBody = new std::string;
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raw_string_ostream *CvtOS = new raw_string_ostream(*ConvertFnBody);
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// Operand lookup function stream.
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std::string *OperandFnBody = new std::string;
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raw_string_ostream *OpOS = new raw_string_ostream(*OperandFnBody);
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public:
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PrinterLLVM(formatted_raw_ostream &OS);
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PrinterLLVM(formatted_raw_ostream &OS, std::string TargetName);
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virtual ~PrinterLLVM();
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// Backend: DecoderEmitter
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PrinterLLVM(formatted_raw_ostream &OS, std::string PredicateNamespace,
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std::string GPrefix, std::string GPostfix, std::string ROK,
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std::string RFail, std::string L, std::string Target);
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static PrinterLanguage getLanguage();
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virtual void flushOS() const { OS.flush(); }
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//------------------------------
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// PredicateExpander management
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//------------------------------
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void initNewPE(StringRef const &Target) {
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if (PE) {
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delete PE;
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PE = nullptr;
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}
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PE = getNewPE(Target);
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}
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virtual PredicateExpander *getNewPE(StringRef const &Target) const {
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return new PredicateExpanderLLVM(Target);
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}
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//--------------------------
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// General printing methods
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//--------------------------
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virtual void emitIncludeToggle(std::string const &Name, bool Begin,
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bool Newline = true,
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bool UndefAtEnd = false) const;
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virtual void emitPPIf(std::string const &Arg, bool Begin,
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bool Newline = true) const;
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virtual void emitNewline(unsigned Count) const {
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for (unsigned I = Count; I > 0; --I)
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OS << "\n";
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}
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virtual void emitIfNotDef(std::string const &Name, bool Begin) const {
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if (Begin) {
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OS << "#ifndef " << Name << "\n";
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} else {
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OS << "#endif // " << Name << "\n\n";
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}
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}
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virtual void emitString(std::string const &Str) const { OS << Str; }
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virtual void emitNamespace(std::string const &Name, bool Begin,
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std::string const &Comment = "",
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bool Newline = true) const;
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//------------------------
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// Backend: RegisterInfo
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//------------------------
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virtual void regInfoEmitSourceFileHeader(std::string const &Desc) const;
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virtual void regInfoEmitEnums(CodeGenTarget const &Target,
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CodeGenRegBank const &Bank) const;
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virtual void
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regInfoEmitRegDiffLists(std::string const TargetName,
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SequenceToOffsetTable<DiffVec> const &DiffSeqs) const;
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virtual void regInfoEmitLaneMaskLists(
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std::string const TargetName,
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SequenceToOffsetTable<MaskVec> const &DiffSeqs) const;
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virtual void regInfoEmitSubRegIdxLists(
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std::string const TargetName,
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SequenceToOffsetTable<SubRegIdxVec, deref<std::less<>>> const
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&SubRegIdxSeqs) const;
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virtual void regInfoEmitSubRegIdxSizes(
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std::string const TargetName,
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std::deque<CodeGenSubRegIndex> const &SubRegIndices) const;
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virtual void regInfoEmitSubRegStrTable(
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std::string const TargetName,
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SequenceToOffsetTable<std::string> const &RegStrings) const;
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virtual void regInfoEmitRegDesc(
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SequenceToOffsetTable<MaskVec> const &LaneMaskSeqs,
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std::deque<CodeGenRegister> const &Regs,
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SequenceToOffsetTable<SubRegIdxVec, deref<std::less<>>> const
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&SubRegIdxSeqs,
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SequenceToOffsetTable<DiffVec> const &DiffSeqs,
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SmallVector<SubRegIdxVec, 4> const &SubRegIdxLists,
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SmallVector<DiffVec, 4> const &SubRegLists,
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SmallVector<DiffVec, 4> const &SuperRegLists,
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SmallVector<DiffVec, 4> const &RegUnitLists,
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SmallVector<MaskVec, 4> const &RegUnitLaneMasks,
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SequenceToOffsetTable<std::string> const &RegStrings) const;
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virtual void regInfoEmitRegUnitRoots(std::string const TargetName,
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CodeGenRegBank const &RegBank) const;
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virtual void
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regInfoEmitRegClasses(std::list<CodeGenRegisterClass> const &RegClasses,
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SequenceToOffsetTable<std::string> &RegClassStrings,
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CodeGenTarget const &Target) const;
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virtual void regInfoEmitStrLiteralRegClasses(
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std::string const TargetName,
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SequenceToOffsetTable<std::string> const &RegClassStrings) const;
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virtual void regInfoEmitMCRegClassesTable(
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std::string const TargetName,
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std::list<CodeGenRegisterClass> const &RegClasses,
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SequenceToOffsetTable<std::string> &RegClassStrings) const;
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virtual void
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regInfoEmitRegEncodingTable(std::string const TargetName,
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std::deque<CodeGenRegister> const &Regs) const;
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virtual void regInfoEmitMCRegInfoInit(
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std::string const TargetName, CodeGenRegBank const &RegBank,
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std::deque<CodeGenRegister> const &Regs,
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std::list<CodeGenRegisterClass> const &RegClasses,
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std::deque<CodeGenSubRegIndex> const &SubRegIndices) const;
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virtual void regInfoEmitInfoDwarfRegs(StringRef const &Namespace,
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DwarfRegNumsVecTy &DwarfRegNums,
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unsigned MaxLength, bool IsCtor) const;
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virtual void regInfoEmitInfoDwarfRegsRev(StringRef const &Namespace,
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DwarfRegNumsVecTy &DwarfRegNums,
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unsigned MaxLength,
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bool IsCtor) const;
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virtual void regInfoEmitInfoRegMapping(StringRef const &Namespace,
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unsigned MaxLength, bool IsCtor) const;
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virtual void regInfoEmitHeaderIncludes() const;
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virtual void regInfoEmitHeaderExternRegClasses(
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std::list<CodeGenRegisterClass> const &RegClasses) const;
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virtual void regInfoEmitHeaderDecl(std::string const &TargetName,
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std::string const &ClassName,
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bool SubRegsPresent,
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bool DeclareGetPhysRegBaseClass) const;
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virtual void
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regInfoEmitExternRegClassesArr(std::string const &TargetName) const;
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virtual void regInfoEmitVTSeqs(
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SequenceToOffsetTable<std::vector<MVT::SimpleValueType>> const &VTSeqs)
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const;
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virtual void regInfoEmitSubRegIdxTable(
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std::deque<CodeGenSubRegIndex> const &SubRegIndices) const;
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virtual void regInfoEmitRegClassInfoTable(
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std::list<CodeGenRegisterClass> const &RegClasses,
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SequenceToOffsetTable<std::vector<MVT::SimpleValueType>> const &VTSeqs,
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CodeGenHwModes const &CGH, unsigned NumModes) const;
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virtual void regInfoEmitSubClassMaskTable(
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std::list<CodeGenRegisterClass> const &RegClasses,
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SmallVector<IdxList, 8> &SuperRegIdxLists,
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SequenceToOffsetTable<IdxList, deref<std::less<>>> &SuperRegIdxSeqs,
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std::deque<CodeGenSubRegIndex> const &SubRegIndices,
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BitVector &MaskBV) const;
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virtual void regInfoEmitSuperRegIdxSeqsTable(
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SequenceToOffsetTable<IdxList, deref<std::less<>>> const &SuperRegIdxSeqs)
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const;
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virtual void regInfoEmitSuperClassesTable(
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std::list<CodeGenRegisterClass> const &RegClasses) const;
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virtual void
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regInfoEmitRegClassMethods(std::list<CodeGenRegisterClass> const &RegClasses,
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std::string const &TargetName) const;
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virtual void regInfomitRegClassInstances(
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std::list<CodeGenRegisterClass> const &RegClasses,
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SequenceToOffsetTable<IdxList, deref<std::less<>>> const &SuperRegIdxSeqs,
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SmallVector<IdxList, 8> const &SuperRegIdxLists,
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std::string const &TargetName) const;
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virtual void regInfoEmitRegClassTable(
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std::list<CodeGenRegisterClass> const &RegClasses) const;
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virtual void
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regInfoEmitCostPerUseTable(std::vector<unsigned> const &AllRegCostPerUse,
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unsigned NumRegCosts) const;
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virtual void
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regInfoEmitInAllocatableClassTable(llvm::BitVector const &InAllocClass) const;
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virtual void regInfoEmitRegExtraDesc(std::string const &TargetName,
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unsigned NumRegCosts) const;
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virtual void regInfoEmitSubClassSubRegGetter(
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std::string const &ClassName, unsigned SubRegIndicesSize,
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std::deque<CodeGenSubRegIndex> const &SubRegIndices,
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std::list<CodeGenRegisterClass> const &RegClasses,
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CodeGenRegBank &RegBank) const;
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virtual void regInfoEmitRegClassWeight(CodeGenRegBank const &RegBank,
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std::string const &ClassName) const;
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virtual void regInfoEmitRegUnitWeight(CodeGenRegBank const &RegBank,
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std::string const &ClassName,
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bool RegUnitsHaveUnitWeight) const;
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virtual void regInfoEmitGetNumRegPressureSets(std::string const &ClassName,
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unsigned NumSets) const;
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virtual void regInfoEmitGetRegPressureTables(CodeGenRegBank const &RegBank,
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std::string const &ClassName,
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unsigned NumSets) const;
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virtual void regInfoEmitRCSetsTable(
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std::string const &ClassName, unsigned NumRCs,
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SequenceToOffsetTable<std::vector<int>> const &PSetsSeqs,
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std::vector<std::vector<int>> const &PSets) const;
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virtual void regInfoEmitGetRegUnitPressureSets(
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SequenceToOffsetTable<std::vector<int>> const &PSetsSeqs,
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CodeGenRegBank const &RegBank, std::string const &ClassName,
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std::vector<std::vector<int>> const &PSets) const;
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virtual void regInfoEmitExternTableDecl(std::string const &TargetName) const;
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virtual void
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regInfoEmitRegClassInit(std::string const &TargetName,
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std::string const &ClassName,
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CodeGenRegBank const &RegBank,
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std::list<CodeGenRegisterClass> const &RegClasses,
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std::deque<CodeGenRegister> const &Regs,
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unsigned SubRegIndicesSize) const;
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virtual void regInfoEmitSaveListTable(Record const *CSRSet,
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SetTheory::RecVec const *Regs) const;
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virtual void regInfoEmitRegMaskTable(std::string const &CSRSetName,
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BitVector &Covered) const;
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virtual void
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regInfoEmitIsConstantPhysReg(std::deque<CodeGenRegister> const &Regs,
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std::string const &ClassName) const;
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virtual void regInfoEmitGetRegMasks(std::vector<Record *> const &CSRSets,
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std::string const &ClassName) const;
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virtual void regInfoEmitGPRCheck(
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std::string const &ClassName,
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std::list<CodeGenRegisterCategory> const &RegCategories) const;
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virtual void regInfoEmitFixedRegCheck(
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std::string const &ClassName,
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std::list<CodeGenRegisterCategory> const &RegCategories) const;
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virtual void regInfoEmitArgRegCheck(
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std::string const &ClassName,
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std::list<CodeGenRegisterCategory> const &RegCategories) const;
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virtual void regInfoEmitGetRegMaskNames(std::vector<Record *> const &CSRSets,
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std::string const &ClassName) const;
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virtual void regInfoEmitGetFrameLowering(std::string const &TargetName) const;
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virtual void
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regInfoEmitComposeSubRegIndicesImplHead(std::string const &ClName) const;
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virtual void regInfoEmitComposeSubRegIndicesImplBody(
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SmallVector<SmallVector<CodeGenSubRegIndex *, 4>, 4> const &Rows,
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unsigned SubRegIndicesSize, SmallVector<unsigned, 4> const &RowMap) const;
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virtual void regInfoEmitLaneMaskComposeSeq(
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SmallVector<SmallVector<MaskRolPair, 1>, 4> const &Sequences,
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SmallVector<unsigned, 4> const &SubReg2SequenceIndexMap,
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std::deque<CodeGenSubRegIndex> const &SubRegIndices) const;
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virtual void regInfoEmitComposeSubRegIdxLaneMask(
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std::string const &ClName,
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std::deque<CodeGenSubRegIndex> const &SubRegIndices) const;
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virtual void regInfoEmitComposeSubRegIdxLaneMaskRev(
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std::string const &ClName,
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std::deque<CodeGenSubRegIndex> const &SubRegIndices) const;
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virtual void regInfoEmitRegBaseClassMapping(
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std::string const &ClassName,
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SmallVector<const CodeGenRegisterClass *> BaseClasses,
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std::deque<CodeGenRegister> const Regs) const;
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//-------------------------
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// Backend: DecoderEmitter
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//-------------------------
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// FilterChooser printing
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virtual void decoderEmitterEmitOpDecoder(raw_ostream &DecoderOS,
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const OperandInfo &Op) const;
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virtual void
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decoderEmitterEmitOpBinaryParser(raw_ostream &DecoderOS,
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const OperandInfo &OpInfo) const;
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virtual bool decoderEmitterEmitPredicateMatchAux(const Init &Val,
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bool ParenIfBinOp,
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raw_ostream &PredOS) const;
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// Emits code to check the Predicates member of an instruction are true.
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// Returns true if predicate matches were emitted, false otherwise.
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virtual bool decoderEmitterEmitPredicateMatch(raw_ostream &PredOS,
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const ListInit *Predicates,
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unsigned Opc) const;
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// DecoderEmitter printing
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virtual void decoderEmitterEmitCheck() const;
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virtual void decoderEmitterEmitFieldFromInstruction() const;
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virtual void decoderEmitterEmitInsertBits() const;
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virtual void decoderEmitterEmitDecodeInstruction(bool IsVarLenInst) const;
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// Emit the decoder state machine table.
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virtual void decoderEmitterEmitTable(
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DecoderTable &Table, unsigned BitWidth, StringRef Namespace,
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std::vector<EncodingAndInst> &NumberedEncodings) const;
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virtual void
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decoderEmitterEmitInstrLenTable(std::vector<unsigned> &InstrLen) const;
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virtual void decoderEmitterEmitPredicateFunction(PredicateSet &Predicates,
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unsigned Indentation) const;
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virtual void decoderEmitterEmitDecoderFunction(DecoderSet &Decoders,
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unsigned Indentation) const;
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virtual void decoderEmitterEmitIncludes() const;
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virtual void decoderEmitterEmitSourceFileHeader() const;
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//-------------------------
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// Backend: AsmWriter
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//-------------------------
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virtual void asmWriterEmitSourceFileHeader(RecordKeeper &Records) const;
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virtual void asmWriterEmitGetMnemonic(std::string const &TargetName,
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StringRef const &ClassName) const;
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virtual void asmWriterEmitAsmStrs(
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SequenceToOffsetTable<std::string> const &StrTable) const;
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virtual void asmWriterEmitMnemonicDecodeTable(
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unsigned const OpcodeInfoBits, unsigned BitsLeft,
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unsigned const &AsmStrBits,
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ArrayRef<const CodeGenInstruction *> const &NumberedInstructions,
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std::vector<uint64_t> const &OpcodeInfo) const;
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virtual void asmWriterEmitPrintInstruction(
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std::string const &TargetName,
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std::vector<std::vector<std::string>> &TableDrivenOperandPrinters,
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unsigned &BitsLeft, unsigned &AsmStrBits, StringRef const &ClassName,
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bool PassSubtarget) const;
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virtual void asmWriterEmitOpCases(
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std::vector<std::pair<std::string, AsmWriterOperand>> &OpsToPrint,
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bool PassSubtarget) const;
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virtual void asmWriterEmitInstrSwitch() const;
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virtual void asmWriterEmitCompoundClosure(unsigned Indent, bool Newline,
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bool Semicolon) const;
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virtual void
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asmWriterEmitInstruction(AsmWriterInst const &FirstInst,
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std::vector<AsmWriterInst> const &SimilarInsts,
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unsigned DifferingOperand, bool PassSubtarget) const;
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virtual void asmWriterEmitGetRegNameAssert(std::string const &TargetName,
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StringRef const &ClassName,
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bool HasAltNames,
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unsigned RegSize) const;
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virtual void asmWriterEmitStringLiteralDef(
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SequenceToOffsetTable<std::string> const &StringTable,
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StringRef const &AltName) const;
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virtual void
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asmWriterEmitAltIdxSwitch(bool HasAltNames,
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std::vector<Record *> const &AltNameIndices,
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StringRef const &Namespace) const;
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virtual void asmWriterEmitRegAsmOffsets(
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unsigned RegSizes, SmallVector<std::string, 4> const &AsmNames,
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SequenceToOffsetTable<std::string> const &StringTable,
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StringRef const &AltName) const;
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virtual char const *asmWriterGetPatCondKIgnore() const;
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virtual char const *asmWriterGetPatCondKRegClass() const;
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virtual char const *asmWriterGetPatCondKTiedReg() const;
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virtual char const *asmWriterGetPatCondKCustom() const;
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virtual char const *asmWriterGetPatCondKImm() const;
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virtual char const *asmWriterGetPatCondKNoReg() const;
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virtual char const *asmWriterGetPatCondKReg() const;
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virtual char const *asmWriterGetPatCondKFeature() const;
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virtual char const *asmWriterGetPatCondKEndOrFeature() const;
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virtual char const *asmWriterGetPatOpcStart() const;
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virtual char const *asmWriterGetCondPatStart() const;
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virtual std::string asmWriterGetCond(std::string const &Cond) const;
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virtual char const *asmWriterGetPatternFormat() const;
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virtual char const *asmWriterGetOpcodeFormat() const;
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virtual void asmWriterEmitPrintAliasInstrHeader(std::string const &TargetName,
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StringRef const &ClassName,
|
|
bool PassSubtarget) const;
|
|
virtual void asmWriterEmitPrintAliasInstrBodyRetFalse() const;
|
|
virtual void asmWriterEmitPrintAliasInstrBody(
|
|
raw_string_ostream &OpcodeO, raw_string_ostream &PatternO,
|
|
raw_string_ostream &CondO,
|
|
std::vector<std::pair<uint32_t, std::string>> const &AsmStrings,
|
|
std::vector<const Record *> const &MCOpPredicates,
|
|
std::string const &TargetName, StringRef const &ClassName,
|
|
bool PassSubtarget) const;
|
|
virtual void asmWriterEmitDeclValid(std::string const &TargetName,
|
|
StringRef const &ClassName) const;
|
|
virtual void asmWriterEmitPrintAliasOp(
|
|
std::string const &TargetName, StringRef const &ClassName,
|
|
std::vector<std::pair<std::string, bool>> const &PrintMethods,
|
|
bool PassSubtarget) const;
|
|
virtual void
|
|
asmWriterEmitPrintMC(std::string const &TargetName,
|
|
StringRef const &ClassName,
|
|
std::vector<const Record *> const &MCOpPredicates) const;
|
|
|
|
//-------------------------
|
|
// Backend: Subtarget
|
|
//-------------------------
|
|
|
|
virtual void subtargetEmitSourceFileHeader() const;
|
|
virtual void
|
|
subtargetEmitFeatureEnum(DenseMap<Record *, unsigned> &FeatureMap,
|
|
std::vector<Record *> const &DefList,
|
|
unsigned N) const;
|
|
virtual void subtargetEmitGetSTIMacro(StringRef const &Value,
|
|
StringRef const &Attribute) const;
|
|
virtual void subtargetEmitHwModes(CodeGenHwModes const &CGH,
|
|
std::string const &ClassName) const;
|
|
virtual void subtargetEmitFeatureKVHeader(std::string const &Target) const;
|
|
virtual void subtargetEmitFeatureKVEnd() const;
|
|
virtual void subtargetEmitFeatureKVPartI(std::string const &Target,
|
|
StringRef const &CommandLineName,
|
|
StringRef const &Name,
|
|
StringRef const &Desc) const;
|
|
virtual void subtargetEmitFeatureKVPartII() const;
|
|
virtual void subtargetEmitPrintFeatureMask(
|
|
std::array<uint64_t, MAX_SUBTARGET_WORDS> const &Mask) const;
|
|
virtual void subtargetEmitCPUKVHeader(std::string const &Target) const;
|
|
virtual void subtargetEmitCPUKVEnd() const;
|
|
virtual void subtargetEmitCPUKVPartI(StringRef const &Name) const;
|
|
virtual void subtargetEmitCPUKVPartII() const;
|
|
virtual void
|
|
subtargetEmitCPUKVPartIII(std::string const &ProcModelName) const;
|
|
virtual void subtargetEmitDBGMacrosBegin() const;
|
|
virtual void subtargetEmitDBGMacrosEnd() const;
|
|
virtual void subtargetEmitFunctionalItinaryUnits(
|
|
CodeGenSchedModels const &SchedModels) const;
|
|
virtual std::string const
|
|
subtargetGetBeginStageTable(std::string const &TargetName) const;
|
|
virtual std::string const
|
|
subtargetGetBeginOperandCycleTable(std::string const &TargetName) const;
|
|
virtual std::string const
|
|
subtargetGetBeginBypassTable(std::string const &TargetName) const;
|
|
virtual std::string const subtargetGetEndStageTable() const;
|
|
virtual std::string const subtargetGetEndOperandCycleTable() const;
|
|
virtual std::string const subtargetGetEndBypassTable() const;
|
|
virtual void subtargetFormItineraryStageString(std::string const &Name,
|
|
Record *ItinData,
|
|
std::string &ItinString,
|
|
unsigned &NStages) const;
|
|
virtual void
|
|
subtargetFormItineraryOperandCycleString(Record *ItinData,
|
|
std::string &ItinString,
|
|
unsigned &NOperandCycles) const;
|
|
virtual void
|
|
subtargetFormItineraryBypassString(const std::string &Name, Record *ItinData,
|
|
std::string &ItinString,
|
|
unsigned NOperandCycles) const;
|
|
virtual std::string
|
|
subtargetGetStageEntryPartI(std::string const &ItinStageString,
|
|
unsigned StageCount) const;
|
|
virtual std::string subtargetGetStageEntryPartII(unsigned StageCount,
|
|
unsigned NStages) const;
|
|
virtual std::string subtargetGetStageEntryPartIII() const;
|
|
virtual std::string subtargetGetOperandCycleEntryPartI(
|
|
std::string const &ItinOperandCycleString) const;
|
|
virtual std::string
|
|
subtargetGetOperandCycleEntryPartII(unsigned OperandCycleCount,
|
|
unsigned NOperandCycles) const;
|
|
virtual std::string subtargetGetOperandCycleEntryPartIII(
|
|
std::string const &OperandIdxComment) const;
|
|
virtual std::string subtargetGetOperandCycleEntryPartIV(
|
|
std::string const &ItinBypassString,
|
|
std::string const &OperandIdxComment) const;
|
|
virtual void subtargetEmitProcessorItineraryTable(
|
|
std::string const &ItinsDefName, std::vector<InstrItinerary> &ItinList,
|
|
CodeGenSchedModels const &SchedModels) const;
|
|
virtual void subtargetEmitPreOperandTableComment() const;
|
|
virtual void
|
|
subtargetEmitSchedClassTables(SchedClassTablesT &SchedTables,
|
|
std::string const &TargetName,
|
|
CodeGenSchedModels const &SchedModels) const;
|
|
virtual unsigned
|
|
subtargetEmitRegisterFileTables(CodeGenProcModel const &ProcModel) const;
|
|
virtual void subtargetEmitMCExtraProcInfoTableHeader(
|
|
std::string const &ProcModelName) const;
|
|
virtual void subtargetEmitMCExtraProcInfoTableEnd() const;
|
|
virtual void subtargetEmitReorderBufferSize(int64_t ReorderBufferSize) const;
|
|
virtual void subtargetEmitMaxRetirePerCycle(int64_t MaxRetirePerCycle) const;
|
|
virtual void subtargetEmitRegisterFileInfo(CodeGenProcModel const &ProcModel,
|
|
unsigned NumRegisterFiles,
|
|
unsigned NumCostEntries) const;
|
|
virtual void subtargetEmitResourceDescriptorLoadQueue(unsigned QueueID) const;
|
|
virtual void
|
|
subtargetEmitResourceDescriptorStoreQueue(unsigned QueueID) const;
|
|
virtual void subtargetEmitProcessorResourceSubUnits(
|
|
const CodeGenProcModel &ProcModel,
|
|
CodeGenSchedModels const &SchedModels) const;
|
|
virtual void
|
|
subtargetEmitMCProcResourceDescHeader(std::string const &ProcModelName) const;
|
|
virtual void subtargetEmitMCProcResourceDescEnd() const;
|
|
virtual void
|
|
subtargetEmitMCProcResourceDesc(Record const *PRDef, Record const *SuperDef,
|
|
std::string const &ProcModelName,
|
|
unsigned SubUnitsOffset, unsigned SuperIdx,
|
|
unsigned NumUnits, int BufferSize, unsigned I,
|
|
unsigned const SubUnitsBeginOffset) const;
|
|
virtual void subtargetEmitProcessorProp(Record const *R, StringRef const Name,
|
|
char Separator) const;
|
|
virtual void subtargetEmitProcModelHeader(std::string const &ModelName) const;
|
|
virtual void
|
|
subtargetEmitProcModel(CodeGenProcModel const &PM,
|
|
CodeGenSchedModels const &SchedModels) const;
|
|
virtual void subtargetEmitResolveVariantSchedClassImplHdr() const;
|
|
virtual void subtargetEmitResolveVariantSchedClassImplEnd() const;
|
|
virtual void subtargetEmitSchedClassSwitch() const;
|
|
virtual void subtargetEmitSchedClassSwitchEnd() const;
|
|
virtual void subtargetEmitSchedClassCase(unsigned VC,
|
|
std::string const &SCName) const;
|
|
virtual void
|
|
subtargetEmitSchedClassProcGuard(unsigned Pi, bool OnlyExpandMCInstPredicates,
|
|
std::string const &ModelName) const;
|
|
virtual void subtargetEmitPredicates(
|
|
CodeGenSchedTransition const &T, CodeGenSchedClass const &SC,
|
|
bool (*IsTruePredicate)(Record const *Rec), int Indent = -1) const;
|
|
virtual void subtargetEmitProcTransitionEnd() const;
|
|
virtual void
|
|
subtargetEmitSchedClassCaseEnd(CodeGenSchedClass const &SC) const;
|
|
virtual void
|
|
subtargetEmitSchedModelHelperEpilogue(bool ShouldReturnZero) const;
|
|
virtual void
|
|
subtargetEmitGenMCSubtargetInfoClass(std::string const &TargetName,
|
|
bool OverrideGetHwMode) const;
|
|
virtual void subtargetEmitMCSubtargetInfoImpl(std::string const &TargetName,
|
|
unsigned NumFeatures,
|
|
unsigned NumProcs,
|
|
bool SchedModelHasItin) const;
|
|
virtual void subtargetEmitIncludeSTIDesc() const;
|
|
virtual void
|
|
subtargetEmitDFAPacketizerClass(CodeGenTarget &TGT,
|
|
std::string const &TargetName,
|
|
std::string const &ClassName) const;
|
|
virtual void subtargetEmitDFAPacketizerClassEnd() const;
|
|
virtual void subtargetEmitSTICtor() const;
|
|
virtual void subtargetEmitExternKVArrays(std::string const &TargetName,
|
|
bool SchedModelsHasItin) const;
|
|
virtual void subtargetEmitClassDefs(std::string const &TargetName,
|
|
std::string const &ClassName,
|
|
unsigned NumFeatures, unsigned NumProcs,
|
|
bool SchedModelsHasItin) const;
|
|
virtual void
|
|
subtargetEmitResolveSchedClassHdr(std::string const &ClassName) const;
|
|
virtual void
|
|
subtargetEmitResolveSchedClassEnd(std::string const &ClassName) const;
|
|
virtual void
|
|
subtargetEmitResolveVariantSchedClass(std::string const &TargetName,
|
|
std::string const &ClassName) const;
|
|
virtual void subtargetEmitPredicateProlog(const RecordKeeper &Records) const;
|
|
virtual void subtargetEmitParseFeaturesFunction(
|
|
std::string const &TargetName,
|
|
std::vector<Record *> const &Features) const;
|
|
virtual void
|
|
subtargetEmitExpandedSTIPreds(StringRef const &TargetName,
|
|
std::string const &ClassName,
|
|
CodeGenSchedModels const &SchedModels);
|
|
virtual void subtargetPrepareSchedClassPreds(StringRef const &TargetName,
|
|
bool OnlyExpandMCInstPredicates);
|
|
virtual void
|
|
subtargetEmitExpandedSTIPredsMCAnaDecl(StringRef const &TargetName,
|
|
CodeGenSchedModels const &SchedModels);
|
|
virtual void subtargetEmitExpandedSTIPredsMCAnaDefs(
|
|
StringRef const &TargetName, std::string const &ClassPrefix,
|
|
CodeGenSchedModels const &SchedModels) const;
|
|
virtual void
|
|
subtargetEmitExpandedSTIPredsHeader(StringRef const &TargetName,
|
|
CodeGenSchedModels const &SchedModels);
|
|
virtual void
|
|
subtargetEmitStageAndSycleTables(std::string const &StageTable,
|
|
std::string const &OperandCycleTable,
|
|
std::string const &BypassTable) const;
|
|
virtual void subtargetEmitGetMacroFusions(CodeGenTarget &TGT,
|
|
std::string Target,
|
|
const std::string &ClassName) const;
|
|
virtual void asmMatcherEmitSTFBitEnum(AsmMatcherInfo &Info) const;
|
|
virtual void asmMatcherEmitComputeAssemblerAvailableFeatures(
|
|
AsmMatcherInfo &Info, StringRef const &ClassName) const;
|
|
|
|
//---------------------------
|
|
// Backend: InstrInfoEmitter
|
|
//---------------------------
|
|
|
|
virtual void instrInfoEmitSourceFileHeader() const;
|
|
virtual void instrInfoEmitSetGetComputeFeatureMacro() const;
|
|
virtual void instrInfoSetOperandInfoStr(
|
|
std::string &Res, Record const *OpR,
|
|
CGIOperandList::OperandInfo const &Op,
|
|
CGIOperandList::ConstraintInfo const &Constraint) const;
|
|
virtual void instrInfoEmitMCInstrDescHdr(std::string TargetName) const;
|
|
virtual void instrInfoEmitMCInstrDescClose() const;
|
|
virtual void instrInfoEmitMCInstrDescEnd() const;
|
|
virtual void instrInfoEmitMCInstrImplUses(
|
|
std::vector<std::vector<Record *>> ImplicitLists,
|
|
std::map<std::vector<Record *>, unsigned> &EmittedLists) const;
|
|
virtual void instrInfoEmitRecord(CodeGenSchedModels const &SchedModels,
|
|
CodeGenInstruction const &Inst, unsigned Num,
|
|
int MinOperands) const;
|
|
virtual void
|
|
instrInfoEmitTargetIndepFlags(CodeGenInstruction const &Inst,
|
|
bool GetAllowRegisterRenaming) const;
|
|
virtual void instrInfoEmitTSFFlags(uint64_t Value) const;
|
|
virtual void instrInfoEmitUseDefsLists(
|
|
StringRef TargetName, const CodeGenInstruction &Inst,
|
|
std::map<std::vector<Record *>, unsigned> &EmittedLists,
|
|
std::vector<Record *> const &ImplicitOps) const;
|
|
virtual void
|
|
instrInfoEmitOperandInfo(OperandInfoListTy &OperandInfoList) const;
|
|
virtual void
|
|
instrInfoEmitOperandInfoOffset(StringRef TargetName,
|
|
std::vector<std::string> const &OperandInfo,
|
|
OperandInfoMapTy const &OperandInfoMap) const;
|
|
virtual void instrInfoEmitRecordEnd(unsigned InstNum,
|
|
std::string const &InstName) const;
|
|
virtual void instrInfoEmitMCInstrDescDecl(std::string const &TargetName,
|
|
unsigned NumberedInstructionsSize,
|
|
unsigned OperandInfoSize,
|
|
unsigned ImplicitListSize) const;
|
|
virtual void instrInfoEmitStringLiteralDef(
|
|
std::string const &TargetName,
|
|
SequenceToOffsetTable<std::string> InstrNames) const;
|
|
virtual void instrInfoEmitInstrNameIndices(
|
|
std::string const &TargetName,
|
|
ArrayRef<const CodeGenInstruction *> const &NumberedInstructions,
|
|
SequenceToOffsetTable<std::string> const &InstrNames) const;
|
|
virtual void instrInfoEmitInstrDeprFeatures(
|
|
std::string const &TargetName, std::string const &TargetNamespace,
|
|
ArrayRef<const CodeGenInstruction *> const &NumberedInstructions,
|
|
SequenceToOffsetTable<std::string> const &InstrNames) const;
|
|
virtual void instrInfoEmitInstrComplexDeprInfos(
|
|
std::string const &TargetName,
|
|
ArrayRef<const CodeGenInstruction *> const &NumberedInstructions) const;
|
|
virtual void instrInfoEmitMCInstrInfoInitRoutine(
|
|
std::string const &TargetName, unsigned NumberedInstrSize,
|
|
bool HasDeprecationFeatures, bool HasComplexDeprecationInfos) const;
|
|
virtual void instrInfoEmitHeader(std::string const &TargetName) const;
|
|
virtual void instrInfoEmitClassStruct(std::string const &ClassName) const;
|
|
virtual void instrInfoEmitTIIHelperMethod(StringRef const &TargetName,
|
|
Record const *Rec,
|
|
bool ExpandDefinition) const;
|
|
virtual void instrInfoEmitExternArrays(std::string const &TargetName,
|
|
bool HasDeprecationFeatures,
|
|
bool HasComplexDeprecationInfos) const;
|
|
virtual void instrInfoEmitMCInstrInfoInit(
|
|
std::string const &TargetName, unsigned NumberedInstrSize,
|
|
bool HasDeprecationFeatures, bool HasComplexDeprecationInfos) const;
|
|
virtual void instrInfoEmitOperandEnum(
|
|
std::map<std::string, unsigned> const &Operands) const;
|
|
virtual void instrInfoEmitGetNamedOperandIdx(
|
|
std::map<std::string, unsigned> const &Operands,
|
|
OpNameMapTy const &OperandMap) const;
|
|
virtual void instrInfoEmitOpTypeEnumPartI() const;
|
|
virtual void instrInfoEmitOpTypeEnumPartII(StringRef const &OpName,
|
|
unsigned EnumVal) const;
|
|
virtual void instrInfoEmitOpTypeEnumPartIII() const;
|
|
virtual void instrInfoEmitOpTypeOffsetTable(
|
|
std::vector<int> OperandOffsets, unsigned OpRecSize,
|
|
ArrayRef<const CodeGenInstruction *> const &NumberedInstructions) const;
|
|
virtual void instrInfoEmitOpcodeOpTypesTable(
|
|
unsigned EnumVal, std::vector<Record *> const &OperandRecords,
|
|
std::vector<int> OperandOffsets,
|
|
ArrayRef<const CodeGenInstruction *> const &NumberedInstructions) const;
|
|
virtual void instrInfoEmitGetOpTypeHdr() const;
|
|
virtual void instrInfoEmitGetOpTypeReturn() const;
|
|
virtual void instrInfoEmitGetOpTypeUnreachable() const;
|
|
virtual void instrInfoEmitGetOpTypeEnd() const;
|
|
virtual void instrInfoEmitGetMemOpSizeHdr() const;
|
|
virtual void instrInfoEmitGetOpMemSizeTbl(
|
|
std::map<int, SmallVector<StringRef, 0>> &SizeToOperandName) const;
|
|
virtual std::string
|
|
instrInfoGetInstMapEntry(StringRef const &Namespace,
|
|
StringRef const &InstrName) const;
|
|
virtual void instrInfoEmitGetLogicalOpSizeHdr() const;
|
|
virtual void instrInfoEmitGetLogicalOpSizeTable(
|
|
size_t LogicalOpListSize,
|
|
std::vector<const std::vector<unsigned> *> const &LogicalOpSizeList)
|
|
const;
|
|
virtual void instrInfoEmitGetLogicalOpSizeSwitch(
|
|
std::map<unsigned, std::vector<std::string>> InstMap) const;
|
|
virtual void instrInfoEmitGetLogicalOpSizeReturn() const;
|
|
virtual void instrInfoEmitGetLogicalOpSizeEnd() const;
|
|
virtual void instrInfoEmitGetLogicalOpIdx() const;
|
|
virtual std::string
|
|
instrInfoGetOpTypeListEntry(StringRef const &Namespace,
|
|
StringRef const &OpName) const;
|
|
virtual void instrInfoEmitGetLogicalOpTypeHdr() const;
|
|
virtual void instrInfoEmitGetLogicalOpTypeTable(
|
|
size_t LogicalOpTypeListSize,
|
|
std::vector<const std::vector<std::string> *> const &LogicalOpTypeList)
|
|
const;
|
|
virtual void instrInfoEmitGetLogicalOpTypeSwitch(
|
|
std::map<unsigned, std::vector<std::string>> InstMap) const;
|
|
virtual void instrInfoEmitGetLogicalOpTypeReturn() const;
|
|
virtual void instrInfoEmitGetLogicalOpTypeEnd() const;
|
|
virtual void instrInfoEmitDeclareMCInstFeatureClasses() const;
|
|
virtual void instrInfoEmitPredFcnDecl(RecVec const &TIIPredicates) const;
|
|
virtual void instrInfoEmitPredFcnImpl(StringRef const &TargetName,
|
|
RecVec const &TIIPredicates);
|
|
virtual void instrInfoEmitInstrPredVerifierIncludes() const;
|
|
virtual void instrInfoEmitMacroDefineCheck() const;
|
|
virtual void instrInfoEmitSubtargetFeatureBitEnumeration(
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
|
&SubtargetFeatures) const;
|
|
virtual void instrInfoEmitEmitSTFNameTable(
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
|
&SubtargetFeatures) const;
|
|
virtual void instrInfoEmitFeatureBitsEnum(
|
|
std::vector<std::vector<Record *>> const &FeatureBitsets) const;
|
|
virtual void instrInfoEmitFeatureBitsArray(
|
|
std::vector<std::vector<Record *>> const &FeatureBitsets,
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> const
|
|
&SubtargetFeatures) const;
|
|
virtual void instrInfoEmitRequiredFeatureRefs(
|
|
std::vector<std::vector<Record *>> const &FeatureBitsets,
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> const
|
|
&SubtargetFeatures,
|
|
CodeGenTarget const &Target) const;
|
|
virtual void instrInfoEmitOpcodeChecker() const;
|
|
virtual void
|
|
instrInfoEmitPredicateVerifier(StringRef const &TargetName) const;
|
|
virtual void instrInfoEmitEnums(CodeGenTarget const &Target,
|
|
StringRef const &Namespace,
|
|
CodeGenSchedModels const &SchedModels) const;
|
|
virtual void instrInfoEmitTIIPredicates(StringRef const &TargetName,
|
|
RecVec const &TIIPredicates,
|
|
bool ExpandDefinition);
|
|
virtual void instrInfoEmitComputeAssemblerAvailableFeatures(
|
|
StringRef const &TargetName,
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
|
&SubtargetFeatures) const;
|
|
|
|
//--------------------------
|
|
// Backend: AsmMatcher
|
|
//--------------------------
|
|
|
|
virtual void asmMatcherEmitSourceFileHeader(std::string const &Desc) const;
|
|
virtual void asmMatcherEmitDeclarations(bool HasOptionalOperands,
|
|
bool ReportMultipleNearMisses,
|
|
bool HasOperandInfos) const;
|
|
virtual void
|
|
asmMatcherEmitOperandDiagTypes(std::set<StringRef> const Types) const;
|
|
|
|
virtual void asmMatcherEmitGetSubtargetFeatureName(
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> const
|
|
SubtargetFeatures) const;
|
|
virtual void asmMatcherEmitConversionFunctionI(
|
|
StringRef const &TargetName, StringRef const &ClassName,
|
|
std::string const &TargetOperandClass, bool HasOptionalOperands,
|
|
size_t MaxNumOperands) const;
|
|
virtual void
|
|
asmMatcherEmitConversionFunctionII(std::string const &EnumName,
|
|
StringRef const &AsmMatchConverter) const;
|
|
virtual void asmMatcherEmitConversionFunctionIII(
|
|
std::string const &EnumName, std::string const TargetOperandClass,
|
|
bool HasOptionalOperands, MatchableInfo::AsmOperand const &Op,
|
|
MatchableInfo::ResOperand const &OpInfo) const;
|
|
virtual void asmMatcherEmitConversionFunctionIV(std::string const &EnumName,
|
|
int64_t Val) const;
|
|
virtual void asmMatcherEmitConversionFunctionV(std::string const &EnumName,
|
|
std::string const &Reg) const;
|
|
virtual void asmMatcherEmitConversionFunctionVI() const;
|
|
virtual void asmMatcherWriteCvtOSToOS() const;
|
|
virtual void asmMatcherEmitOperandFunctionI(StringRef const &TargetName,
|
|
StringRef const &ClassName) const;
|
|
virtual void asmMatcherEmitOperandFunctionII(
|
|
std::string const &EnumName, MatchableInfo::AsmOperand const &Op,
|
|
MatchableInfo::ResOperand const &OpInfo) const;
|
|
virtual void
|
|
asmMatcherEmitOperandFunctionIII(std::string const &EnumName) const;
|
|
virtual void
|
|
asmMatcherEmitOperandFunctionIV(std::string const &EnumName) const;
|
|
virtual void asmMatcherEmitOperandFunctionV() const;
|
|
virtual void asmMatcherEmitTiedOperandEnum(
|
|
std::map<std::tuple<uint8_t, uint8_t, uint8_t>, std::string>
|
|
TiedOperandsEnumMap) const;
|
|
virtual void asmMatcherWriteOpOSToOS() const;
|
|
virtual void asmMatcherEmitTiedOpTable(
|
|
std::map<std::tuple<uint8_t, uint8_t, uint8_t>, std::string>
|
|
TiedOperandsEnumMap) const;
|
|
virtual void asmMatcherEmitTiedOpEmptyTable() const;
|
|
virtual void asmMatcherEmitOperandConvKindEnum(
|
|
SmallSetVector<CachedHashString, 16> OperandConversionKinds) const;
|
|
virtual void asmMatcherEmitInstrConvKindEnum(
|
|
SmallSetVector<CachedHashString, 16> InstructionConversionKinds) const;
|
|
virtual void asmMatcherEmitConversionTable(
|
|
size_t MaxRowLength,
|
|
std::vector<std::vector<uint8_t>> const ConversionTable,
|
|
SmallSetVector<CachedHashString, 16> InstructionConversionKinds,
|
|
SmallSetVector<CachedHashString, 16> OperandConversionKinds,
|
|
std::map<std::tuple<uint8_t, uint8_t, uint8_t>, std::string>
|
|
TiedOperandsEnumMap) const;
|
|
virtual void asmMatcherEmitMatchClassKindEnum(
|
|
std::forward_list<ClassInfo> const &Infos) const;
|
|
virtual void
|
|
asmMatcherEmitMatchClassDiagStrings(AsmMatcherInfo const &Info) const;
|
|
virtual void asmMatcherEmitRegisterMatchErrorFunc(AsmMatcherInfo &Info) const;
|
|
virtual void asmMatcherEmitIsSubclassI() const;
|
|
virtual bool asmMatcherEmitIsSubclassII(bool EmittedSwitch,
|
|
std::string const &Name) const;
|
|
virtual void asmMatcherEmitIsSubclassIII(StringRef const &Name) const;
|
|
virtual void
|
|
asmMatcherEmitIsSubclassIV(std::vector<StringRef> const &SuperClasses) const;
|
|
virtual void asmMatcherEmitIsSubclassV(bool EmittedSwitch) const;
|
|
virtual void asmMatcherEmitValidateOperandClass(AsmMatcherInfo &Info) const;
|
|
virtual void
|
|
asmMatcherEmitMatchClassKindNames(std::forward_list<ClassInfo> &Infos) const;
|
|
virtual void
|
|
asmMatcherEmitAsmTiedOperandConstraints(CodeGenTarget &Target,
|
|
AsmMatcherInfo &Info) const;
|
|
virtual std::string
|
|
getNameForFeatureBitset(const std::vector<Record *> &FeatureBitset) const;
|
|
virtual void asmMatcherEmitFeatureBitsetEnum(
|
|
std::vector<std::vector<Record *>> const FeatureBitsets) const;
|
|
virtual void asmMatcherEmitFeatureBitsets(
|
|
std::vector<std::vector<Record *>> const FeatureBitsets,
|
|
AsmMatcherInfo const &Info) const;
|
|
virtual void asmMatcherEmitMatchEntryStruct(
|
|
unsigned MaxMnemonicIndex, unsigned NumConverters, size_t MaxNumOperands,
|
|
std::vector<std::vector<Record *>> const FeatureBitsets,
|
|
AsmMatcherInfo const &Info) const;
|
|
virtual void asmMatcherEmitMatchFunction(
|
|
CodeGenTarget const &Target, Record const *AsmParser,
|
|
StringRef const &ClassName, bool HasMnemonicFirst,
|
|
bool HasOptionalOperands, bool ReportMultipleNearMisses,
|
|
bool HasMnemonicAliases, size_t MaxNumOperands, bool HasDeprecation,
|
|
unsigned int VariantCount) const;
|
|
virtual void asmMatcherEmitMnemonicSpellChecker(CodeGenTarget const &Target,
|
|
unsigned VariantCount) const;
|
|
virtual void asmMatcherEmitMnemonicChecker(CodeGenTarget const &Target,
|
|
unsigned VariantCount,
|
|
bool HasMnemonicFirst,
|
|
bool HasMnemonicAliases) const;
|
|
virtual void asmMatcherEmitCustomOperandParsing(
|
|
unsigned MaxMask, CodeGenTarget &Target, AsmMatcherInfo const &Info,
|
|
StringRef ClassName, StringToOffsetTable &StringTable,
|
|
unsigned MaxMnemonicIndex, unsigned MaxFeaturesIndex,
|
|
bool HasMnemonicFirst, Record const &AsmParser) const;
|
|
virtual void asmMatcherEmitIncludes() const;
|
|
virtual void
|
|
asmMatcherEmitMnemonicTable(StringToOffsetTable &StringTable) const;
|
|
virtual void asmMatcherEmitMatchTable(CodeGenTarget const &Target,
|
|
AsmMatcherInfo &Info,
|
|
StringToOffsetTable &StringTable,
|
|
unsigned VariantCount) const;
|
|
virtual void asmMatcherEmitMatchRegisterName(
|
|
Record const *AsmParser,
|
|
std::vector<StringMatcher::StringPair> const Matches) const;
|
|
virtual void asmMatcherEmitMatchTokenString(
|
|
std::vector<StringMatcher::StringPair> const Matches) const;
|
|
virtual void asmMatcherEmitMatchRegisterAltName(
|
|
Record const *AsmParser,
|
|
std::vector<StringMatcher::StringPair> const Matches) const;
|
|
virtual void asmMatcherEmitMnemonicAliasVariant(
|
|
std::vector<StringMatcher::StringPair> const &Cases,
|
|
unsigned Indent) const;
|
|
virtual void asmMatcherAppendMnemonicAlias(Record const *R,
|
|
std::string const &FeatureMask,
|
|
std::string &MatchCode) const;
|
|
virtual void asmMatcherAppendMnemonic(Record const *R,
|
|
std::string &MatchCode) const;
|
|
virtual void asmMatcherAppendMnemonicAliasEnd(std::string &MatchCode) const;
|
|
virtual void asmMatcherEmitApplyMnemonicAliasesI() const;
|
|
virtual void
|
|
asmMatcherEmitApplyMnemonicAliasesII(int AsmParserVariantNo) const;
|
|
virtual void asmMatcherEmitApplyMnemonicAliasesIII() const;
|
|
virtual void asmMatcherEmitApplyMnemonicAliasesIV() const;
|
|
virtual void asmMatcherEmitApplyMnemonicAliasesV() const;
|
|
|
|
//---------------------------
|
|
// Backend: SearchableTables
|
|
//---------------------------
|
|
|
|
virtual void searchableTablesWriteFiles() const;
|
|
virtual void searchableTablesEmitGenericEnum(const GenericEnum &Enum) const;
|
|
virtual void searchableTablesEmitGenericTable(const GenericTable &Enum) const;
|
|
virtual void searchableTablesEmitIfdef(const std::string Guard,
|
|
StreamType ST = ST_NONE);
|
|
virtual void searchableTablesEmitEndif(StreamType ST = ST_NONE) const;
|
|
virtual void searchableTablesEmitUndef() const;
|
|
virtual void searchableTablesEmitLookupDeclaration(const GenericTable &Table,
|
|
const SearchIndex &Index,
|
|
StreamType ST);
|
|
virtual std::string searchableTablesPrimaryRepresentation(
|
|
SMLoc Loc, const GenericField &Field, Init *I,
|
|
StringRef const &InstrinsicEnumName) const;
|
|
virtual std::string searchableTablesSearchableFieldType(
|
|
const GenericTable &Table, const SearchIndex &Index,
|
|
const GenericField &Field, TypeContext Ctx) const;
|
|
virtual void
|
|
searchableTablesEmitKeyTypeStruct(const GenericTable &Table,
|
|
const SearchIndex &Index) const;
|
|
|
|
virtual void
|
|
searchableTablesEmitIfFieldCase(const GenericField &Field,
|
|
std::string const &FirstRepr,
|
|
std::string const &LastRepr) const;
|
|
virtual void searchableTablesEmitIsContiguousCase(StringRef const &IndexName,
|
|
const GenericTable &Table,
|
|
const SearchIndex &Index,
|
|
bool IsPrimary);
|
|
virtual void searchableTablesEmitIndexArrayV() const;
|
|
virtual void searchableTablesEmitIndexArrayIV(
|
|
std::pair<Record *, unsigned> const &Entry) const;
|
|
virtual void searchableTablesEmitIndexArrayIII(ListSeparator &LS,
|
|
std::string Repr) const;
|
|
virtual void searchableTablesEmitIndexArrayII() const;
|
|
virtual void searchableTablesEmitIndexArrayI() const;
|
|
virtual void searchableTablesEmitIndexTypeStruct(const GenericTable &Table,
|
|
const SearchIndex &Index);
|
|
virtual void searchableTablesEmitReturns(const GenericTable &Table,
|
|
const SearchIndex &Index,
|
|
bool IsPrimary);
|
|
virtual void
|
|
searchableTablesEmitIndexLamda(const SearchIndex &Index,
|
|
StringRef const &IndexName,
|
|
StringRef const &IndexTypeName) const;
|
|
virtual void searchableTablesEmitKeyArray(const GenericTable &Table,
|
|
const SearchIndex &Index,
|
|
bool IsPrimary) const;
|
|
virtual void searchableTablesEmitMapI(const GenericTable &Table) const;
|
|
virtual void searchableTablesEmitMapII() const;
|
|
virtual void searchableTablesEmitMapIII(const GenericTable &Table,
|
|
ListSeparator &LS,
|
|
GenericField const &Field,
|
|
StringRef &Intrinsic,
|
|
Record *Entry) const;
|
|
virtual void searchableTablesEmitMapIV(unsigned i) const;
|
|
virtual void searchableTablesEmitMapV();
|
|
};
|
|
|
|
//==============================
|
|
//
|
|
// Implementation: Capstone
|
|
//
|
|
//==============================
|
|
|
|
/// Printer implementation of Capstone.
|
|
///
|
|
/// Output language: C
|
|
class PrinterCapstone : public PrinterLLVM {
|
|
// TODO: Toggle a flag is not nice to skip the search functions by strings
|
|
// is ugly. We should support them in the future.
|
|
bool EmittingNameLookup = false;
|
|
|
|
public:
|
|
using PrinterLLVM::PrinterLLVM;
|
|
virtual void flushOS() const override { OS.flush(); }
|
|
|
|
//--------------------------
|
|
// General printing methods
|
|
//--------------------------
|
|
|
|
void emitNamespace(std::string const &Name, bool Begin,
|
|
std::string const &Comment = "",
|
|
bool Newline = true) const override;
|
|
void emitIfNotDef(std::string const &Name, bool Begin) const override;
|
|
void emitIncludeToggle(std::string const &Name, bool Begin,
|
|
bool Newline = true,
|
|
bool UndefAtEnd = false) const override;
|
|
void emitPPIf(std::string const &Arg, bool Begin,
|
|
bool Newline = true) const override;
|
|
|
|
static std::string translateToC(std::string const &TargetName,
|
|
std::string const &Dec);
|
|
|
|
//------------------------
|
|
// Backend: RegisterInfo
|
|
//------------------------
|
|
|
|
void regInfoEmitSourceFileHeader(std::string const &Desc) const override;
|
|
void regInfoEmitEnums(CodeGenTarget const &Target,
|
|
CodeGenRegBank const &Bank) const override;
|
|
void regInfoEmitRegDiffLists(
|
|
std::string const TargetName,
|
|
SequenceToOffsetTable<DiffVec> const &DiffSeqs) const override;
|
|
void regInfoEmitLaneMaskLists(
|
|
std::string const TargetName,
|
|
SequenceToOffsetTable<MaskVec> const &DiffSeqs) const override;
|
|
void regInfoEmitSubRegIdxLists(
|
|
std::string const TargetName,
|
|
SequenceToOffsetTable<SubRegIdxVec, deref<std::less<>>> const
|
|
&SubRegIdxSeqs) const override;
|
|
void regInfoEmitSubRegIdxSizes(
|
|
std::string const TargetName,
|
|
std::deque<CodeGenSubRegIndex> const &SubRegIndices) const override;
|
|
void regInfoEmitSubRegStrTable(
|
|
std::string const TargetName,
|
|
SequenceToOffsetTable<std::string> const &RegStrings) const override;
|
|
void regInfoEmitRegDesc(
|
|
SequenceToOffsetTable<MaskVec> const &LaneMaskSeqs,
|
|
std::deque<CodeGenRegister> const &Regs,
|
|
SequenceToOffsetTable<SubRegIdxVec, deref<std::less<>>> const
|
|
&SubRegIdxSeqs,
|
|
SequenceToOffsetTable<DiffVec> const &DiffSeqs,
|
|
SmallVector<SubRegIdxVec, 4> const &SubRegIdxLists,
|
|
SmallVector<DiffVec, 4> const &SubRegLists,
|
|
SmallVector<DiffVec, 4> const &SuperRegLists,
|
|
SmallVector<DiffVec, 4> const &RegUnitLists,
|
|
SmallVector<MaskVec, 4> const &RegUnitLaneMasks,
|
|
SequenceToOffsetTable<std::string> const &RegStrings) const override;
|
|
void regInfoEmitRegUnitRoots(std::string const TargetName,
|
|
CodeGenRegBank const &RegBank) const override;
|
|
void
|
|
regInfoEmitRegClasses(std::list<CodeGenRegisterClass> const &RegClasses,
|
|
SequenceToOffsetTable<std::string> &RegClassStrings,
|
|
CodeGenTarget const &Target) const override;
|
|
void regInfoEmitStrLiteralRegClasses(
|
|
std::string const TargetName,
|
|
SequenceToOffsetTable<std::string> const &RegClassStrings) const override;
|
|
void regInfoEmitMCRegClassesTable(
|
|
std::string const TargetName,
|
|
std::list<CodeGenRegisterClass> const &RegClasses,
|
|
SequenceToOffsetTable<std::string> &RegClassStrings) const override;
|
|
void regInfoEmitRegEncodingTable(
|
|
std::string const TargetName,
|
|
std::deque<CodeGenRegister> const &Regs) const override;
|
|
void regInfoEmitMCRegInfoInit(
|
|
std::string const TargetName, CodeGenRegBank const &RegBank,
|
|
std::deque<CodeGenRegister> const &Regs,
|
|
std::list<CodeGenRegisterClass> const &RegClasses,
|
|
std::deque<CodeGenSubRegIndex> const &SubRegIndices) const override;
|
|
void regInfoEmitInfoDwarfRegs(StringRef const &Namespace,
|
|
DwarfRegNumsVecTy &DwarfRegNums,
|
|
unsigned MaxLength, bool IsCtor) const override;
|
|
void regInfoEmitInfoDwarfRegsRev(StringRef const &Namespace,
|
|
DwarfRegNumsVecTy &DwarfRegNums,
|
|
unsigned MaxLength,
|
|
bool IsCtor) const override;
|
|
void regInfoEmitInfoRegMapping(StringRef const &Namespace, unsigned MaxLength,
|
|
bool IsCtor) const override;
|
|
void regInfoEmitHeaderIncludes() const override;
|
|
void regInfoEmitHeaderExternRegClasses(
|
|
std::list<CodeGenRegisterClass> const &RegClasses) const override;
|
|
void regInfoEmitHeaderDecl(std::string const &TargetName,
|
|
std::string const &ClassName, bool SubRegsPresent,
|
|
bool DeclareGetPhysRegBaseClass) const override;
|
|
void
|
|
regInfoEmitExternRegClassesArr(std::string const &TargetName) const override;
|
|
void regInfoEmitVTSeqs(
|
|
SequenceToOffsetTable<std::vector<MVT::SimpleValueType>> const &VTSeqs)
|
|
const override;
|
|
void regInfoEmitSubRegIdxTable(
|
|
std::deque<CodeGenSubRegIndex> const &SubRegIndices) const override;
|
|
void regInfoEmitRegClassInfoTable(
|
|
std::list<CodeGenRegisterClass> const &RegClasses,
|
|
SequenceToOffsetTable<std::vector<MVT::SimpleValueType>> const &VTSeqs,
|
|
CodeGenHwModes const &CGH, unsigned NumModes) const override;
|
|
void regInfoEmitSubClassMaskTable(
|
|
std::list<CodeGenRegisterClass> const &RegClasses,
|
|
SmallVector<IdxList, 8> &SuperRegIdxLists,
|
|
SequenceToOffsetTable<IdxList, deref<std::less<>>> &SuperRegIdxSeqs,
|
|
std::deque<CodeGenSubRegIndex> const &SubRegIndices,
|
|
BitVector &MaskBV) const override;
|
|
void regInfoEmitSuperRegIdxSeqsTable(
|
|
SequenceToOffsetTable<IdxList, deref<std::less<>>> const &SuperRegIdxSeqs)
|
|
const override;
|
|
void regInfoEmitSuperClassesTable(
|
|
std::list<CodeGenRegisterClass> const &RegClasses) const override;
|
|
void
|
|
regInfoEmitRegClassMethods(std::list<CodeGenRegisterClass> const &RegClasses,
|
|
std::string const &TargetName) const override;
|
|
void regInfomitRegClassInstances(
|
|
std::list<CodeGenRegisterClass> const &RegClasses,
|
|
SequenceToOffsetTable<IdxList, deref<std::less<>>> const &SuperRegIdxSeqs,
|
|
SmallVector<IdxList, 8> const &SuperRegIdxLists,
|
|
std::string const &TargetName) const override;
|
|
void regInfoEmitRegClassTable(
|
|
std::list<CodeGenRegisterClass> const &RegClasses) const override;
|
|
void regInfoEmitCostPerUseTable(std::vector<unsigned> const &AllRegCostPerUse,
|
|
unsigned NumRegCosts) const override;
|
|
void regInfoEmitInAllocatableClassTable(
|
|
llvm::BitVector const &InAllocClass) const override;
|
|
void regInfoEmitRegExtraDesc(std::string const &TargetName,
|
|
unsigned NumRegCosts) const override;
|
|
void regInfoEmitSubClassSubRegGetter(
|
|
std::string const &ClassName, unsigned SubRegIndicesSize,
|
|
std::deque<CodeGenSubRegIndex> const &SubRegIndices,
|
|
std::list<CodeGenRegisterClass> const &RegClasses,
|
|
CodeGenRegBank &RegBank) const override;
|
|
void regInfoEmitRegClassWeight(CodeGenRegBank const &RegBank,
|
|
std::string const &ClassName) const override;
|
|
void regInfoEmitRegUnitWeight(CodeGenRegBank const &RegBank,
|
|
std::string const &ClassName,
|
|
bool RegUnitsHaveUnitWeight) const override;
|
|
void regInfoEmitGetNumRegPressureSets(std::string const &ClassName,
|
|
unsigned NumSets) const override;
|
|
void regInfoEmitGetRegPressureTables(CodeGenRegBank const &RegBank,
|
|
std::string const &ClassName,
|
|
unsigned NumSets) const override;
|
|
void regInfoEmitRCSetsTable(
|
|
std::string const &ClassName, unsigned NumRCs,
|
|
SequenceToOffsetTable<std::vector<int>> const &PSetsSeqs,
|
|
std::vector<std::vector<int>> const &PSets) const override;
|
|
void regInfoEmitGetRegUnitPressureSets(
|
|
SequenceToOffsetTable<std::vector<int>> const &PSetsSeqs,
|
|
CodeGenRegBank const &RegBank, std::string const &ClassName,
|
|
std::vector<std::vector<int>> const &PSets) const override;
|
|
void regInfoEmitExternTableDecl(std::string const &TargetName) const override;
|
|
void
|
|
regInfoEmitRegClassInit(std::string const &TargetName,
|
|
std::string const &ClassName,
|
|
CodeGenRegBank const &RegBank,
|
|
std::list<CodeGenRegisterClass> const &RegClasses,
|
|
std::deque<CodeGenRegister> const &Regs,
|
|
unsigned SubRegIndicesSize) const override;
|
|
void regInfoEmitSaveListTable(Record const *CSRSet,
|
|
SetTheory::RecVec const *Regs) const override;
|
|
void regInfoEmitRegMaskTable(std::string const &CSRSetName,
|
|
BitVector &Covered) const override;
|
|
void regInfoEmitGetRegMasks(std::vector<Record *> const &CSRSets,
|
|
std::string const &ClassName) const override;
|
|
void regInfoEmitGPRCheck(
|
|
std::string const &ClassName,
|
|
std::list<CodeGenRegisterCategory> const &RegCategories) const override;
|
|
void regInfoEmitFixedRegCheck(
|
|
std::string const &ClassName,
|
|
std::list<CodeGenRegisterCategory> const &RegCategories) const override;
|
|
void regInfoEmitArgRegCheck(
|
|
std::string const &ClassName,
|
|
std::list<CodeGenRegisterCategory> const &RegCategories) const override;
|
|
void regInfoEmitGetRegMaskNames(std::vector<Record *> const &CSRSets,
|
|
std::string const &ClassName) const override;
|
|
void
|
|
regInfoEmitGetFrameLowering(std::string const &TargetName) const override;
|
|
void regInfoEmitComposeSubRegIndicesImplHead(
|
|
std::string const &ClName) const override;
|
|
void regInfoEmitComposeSubRegIndicesImplBody(
|
|
SmallVector<SmallVector<CodeGenSubRegIndex *, 4>, 4> const &Rows,
|
|
unsigned SubRegIndicesSize,
|
|
SmallVector<unsigned, 4> const &RowMap) const override;
|
|
void regInfoEmitLaneMaskComposeSeq(
|
|
SmallVector<SmallVector<MaskRolPair, 1>, 4> const &Sequences,
|
|
SmallVector<unsigned, 4> const &SubReg2SequenceIndexMap,
|
|
std::deque<CodeGenSubRegIndex> const &SubRegIndices) const override;
|
|
void regInfoEmitComposeSubRegIdxLaneMask(
|
|
std::string const &ClName,
|
|
std::deque<CodeGenSubRegIndex> const &SubRegIndices) const override;
|
|
void regInfoEmitComposeSubRegIdxLaneMaskRev(
|
|
std::string const &ClName,
|
|
std::deque<CodeGenSubRegIndex> const &SubRegIndices) const override;
|
|
void
|
|
regInfoEmitIsConstantPhysReg(std::deque<CodeGenRegister> const &Regs,
|
|
std::string const &ClassName) const override;
|
|
|
|
//-------------------------
|
|
// Backend: DecoderEmitter
|
|
//-------------------------
|
|
|
|
void decoderEmitterEmitOpDecoder(raw_ostream &DecoderOS,
|
|
const OperandInfo &Op) const override;
|
|
void
|
|
decoderEmitterEmitOpBinaryParser(raw_ostream &DecoderOS,
|
|
const OperandInfo &OpInfo) const override;
|
|
bool decoderEmitterEmitPredicateMatchAux(const Init &Val, bool ParenIfBinOp,
|
|
raw_ostream &OS) const override;
|
|
bool decoderEmitterEmitPredicateMatch(raw_ostream &PredOS,
|
|
const ListInit *Predicates,
|
|
unsigned Opc) const override;
|
|
void decoderEmitterEmitCheck() const override;
|
|
void decoderEmitterEmitFieldFromInstruction() const override;
|
|
void decoderEmitterEmitInsertBits() const override;
|
|
void decoderEmitterEmitDecodeInstruction(bool IsVarLenInst) const override;
|
|
void decoderEmitterEmitTable(
|
|
DecoderTable &Table, unsigned BitWidth, StringRef Namespace,
|
|
std::vector<EncodingAndInst> &NumberedEncodings) const override;
|
|
void decoderEmitterEmitInstrLenTable(
|
|
std::vector<unsigned> &InstrLen) const override;
|
|
void decoderEmitterEmitPredicateFunction(PredicateSet &Predicates,
|
|
unsigned Indentation) const override;
|
|
void decoderEmitterEmitDecoderFunction(DecoderSet &Decoders,
|
|
unsigned Indentation) const override;
|
|
void decoderEmitterEmitIncludes() const override;
|
|
void decoderEmitterEmitSourceFileHeader() const override;
|
|
|
|
//-------------------------
|
|
// Backend: AsmWriter
|
|
//-------------------------
|
|
|
|
void asmWriterEmitSourceFileHeader(RecordKeeper &Records) const override;
|
|
void asmWriterEmitGetMnemonic(std::string const &TargetName,
|
|
StringRef const &ClassName) const override;
|
|
void asmWriterEmitAsmStrs(
|
|
SequenceToOffsetTable<std::string> const &StrTable) const override;
|
|
void asmWriterEmitMnemonicDecodeTable(
|
|
unsigned const OpcodeInfoBits, unsigned BitsLeft,
|
|
unsigned const &AsmStrBits,
|
|
ArrayRef<const CodeGenInstruction *> const &NumberedInstructions,
|
|
std::vector<uint64_t> const &OpcodeInfo) const override;
|
|
void asmWriterEmitPrintInstruction(
|
|
std::string const &TargetName,
|
|
std::vector<std::vector<std::string>> &TableDrivenOperandPrinters,
|
|
unsigned &BitsLeft, unsigned &AsmStrBits, StringRef const &ClassName,
|
|
bool PassSubtarget) const override;
|
|
void asmWriterEmitOpCases(
|
|
std::vector<std::pair<std::string, AsmWriterOperand>> &OpsToPrint,
|
|
bool PassSubtarget) const override;
|
|
void asmWriterEmitInstrSwitch() const override;
|
|
void asmWriterEmitCompoundClosure(unsigned Indent, bool Newline,
|
|
bool Semicolon) const override;
|
|
void asmWriterEmitInstruction(AsmWriterInst const &FirstInst,
|
|
std::vector<AsmWriterInst> const &SimilarInsts,
|
|
unsigned DifferingOperand,
|
|
bool PassSubtarget) const override;
|
|
void asmWriterEmitGetRegNameAssert(std::string const &TargetName,
|
|
StringRef const &ClassName,
|
|
bool HasAltNames,
|
|
unsigned RegSize) const override;
|
|
void asmWriterEmitStringLiteralDef(
|
|
SequenceToOffsetTable<std::string> const &StringTable,
|
|
StringRef const &AltName) const override;
|
|
void asmWriterEmitAltIdxSwitch(bool HasAltNames,
|
|
std::vector<Record *> const &AltNameIndices,
|
|
StringRef const &Namespace) const override;
|
|
void asmWriterEmitRegAsmOffsets(
|
|
unsigned RegSizes, SmallVector<std::string, 4> const &AsmNames,
|
|
SequenceToOffsetTable<std::string> const &StringTable,
|
|
StringRef const &AltName) const override;
|
|
char const *asmWriterGetPatCondKIgnore() const override;
|
|
char const *asmWriterGetPatCondKRegClass() const override;
|
|
char const *asmWriterGetPatCondKTiedReg() const override;
|
|
char const *asmWriterGetPatCondKCustom() const override;
|
|
char const *asmWriterGetPatCondKImm() const override;
|
|
char const *asmWriterGetPatCondKNoReg() const override;
|
|
char const *asmWriterGetPatCondKReg() const override;
|
|
char const *asmWriterGetPatCondKFeature() const override;
|
|
char const *asmWriterGetPatCondKEndOrFeature() const override;
|
|
char const *asmWriterGetPatOpcStart() const override;
|
|
char const *asmWriterGetCondPatStart() const override;
|
|
std::string asmWriterGetCond(std::string const &Cond) const override;
|
|
char const *asmWriterGetPatternFormat() const override;
|
|
char const *asmWriterGetOpcodeFormat() const override;
|
|
void asmWriterEmitPrintAliasInstrHeader(std::string const &TargetName,
|
|
StringRef const &ClassName,
|
|
bool PassSubtarget) const override;
|
|
void asmWriterEmitPrintAliasInstrBodyRetFalse() const override;
|
|
void asmWriterEmitPrintAliasInstrBody(
|
|
raw_string_ostream &OpcodeO, raw_string_ostream &PatternO,
|
|
raw_string_ostream &CondO,
|
|
std::vector<std::pair<uint32_t, std::string>> const &AsmStrings,
|
|
std::vector<const Record *> const &MCOpPredicates,
|
|
std::string const &TargetName, StringRef const &ClassName,
|
|
bool PassSubtarget) const override;
|
|
void asmWriterEmitDeclValid(std::string const &TargetName,
|
|
StringRef const &ClassName) const override;
|
|
void asmWriterEmitPrintAliasOp(
|
|
std::string const &TargetName, StringRef const &ClassName,
|
|
std::vector<std::pair<std::string, bool>> const &PrintMethods,
|
|
bool PassSubtarget) const override;
|
|
void asmWriterEmitPrintMC(
|
|
std::string const &TargetName, StringRef const &ClassName,
|
|
std::vector<const Record *> const &MCOpPredicates) const override;
|
|
|
|
//-------------------------
|
|
// Backend: Subtarget
|
|
//-------------------------
|
|
|
|
void subtargetEmitSourceFileHeader() const override;
|
|
void subtargetEmitFeatureEnum(DenseMap<Record *, unsigned> &FeatureMap,
|
|
std::vector<Record *> const &DefList,
|
|
unsigned N) const override;
|
|
void subtargetEmitGetSTIMacro(StringRef const &Value,
|
|
StringRef const &Attribute) const override;
|
|
void subtargetEmitHwModes(CodeGenHwModes const &CGH,
|
|
std::string const &ClassName) const override;
|
|
void subtargetEmitFeatureKVHeader(std::string const &Target) const override;
|
|
void subtargetEmitFeatureKVEnd() const override;
|
|
void subtargetEmitFeatureKVPartI(std::string const &Target,
|
|
StringRef const &CommandLineName,
|
|
StringRef const &Name,
|
|
StringRef const &Desc) const override;
|
|
void subtargetEmitFeatureKVPartII() const override;
|
|
void subtargetEmitPrintFeatureMask(
|
|
std::array<uint64_t, MAX_SUBTARGET_WORDS> const &Mask) const override;
|
|
void subtargetEmitCPUKVHeader(std::string const &Target) const override;
|
|
void subtargetEmitCPUKVEnd() const override;
|
|
void subtargetEmitCPUKVPartI(StringRef const &Name) const override;
|
|
void subtargetEmitCPUKVPartII() const override;
|
|
void
|
|
subtargetEmitCPUKVPartIII(std::string const &ProcModelName) const override;
|
|
void subtargetEmitDBGMacrosBegin() const override;
|
|
void subtargetEmitDBGMacrosEnd() const override;
|
|
void subtargetEmitFunctionalItinaryUnits(
|
|
CodeGenSchedModels const &SchedModels) const override;
|
|
std::string const
|
|
subtargetGetBeginStageTable(std::string const &TargetName) const override;
|
|
std::string const subtargetGetBeginOperandCycleTable(
|
|
std::string const &TargetName) const override;
|
|
std::string const
|
|
subtargetGetBeginBypassTable(std::string const &TargetName) const override;
|
|
std::string const subtargetGetEndStageTable() const override;
|
|
std::string const subtargetGetEndOperandCycleTable() const override;
|
|
std::string const subtargetGetEndBypassTable() const override;
|
|
void subtargetFormItineraryStageString(std::string const &Name,
|
|
Record *ItinData,
|
|
std::string &ItinString,
|
|
unsigned &NStages) const override;
|
|
void subtargetFormItineraryOperandCycleString(
|
|
Record *ItinData, std::string &ItinString,
|
|
unsigned &NOperandCycles) const override;
|
|
void
|
|
subtargetFormItineraryBypassString(const std::string &Name, Record *ItinData,
|
|
std::string &ItinString,
|
|
unsigned NOperandCycles) const override;
|
|
std::string subtargetGetStageEntryPartI(std::string const &ItinStageString,
|
|
unsigned StageCount) const override;
|
|
std::string subtargetGetStageEntryPartII(unsigned StageCount,
|
|
unsigned NStages) const override;
|
|
std::string subtargetGetStageEntryPartIII() const override;
|
|
std::string subtargetGetOperandCycleEntryPartI(
|
|
std::string const &ItinOperandCycleString) const override;
|
|
std::string
|
|
subtargetGetOperandCycleEntryPartII(unsigned OperandCycleCount,
|
|
unsigned NOperandCycles) const override;
|
|
std::string subtargetGetOperandCycleEntryPartIII(
|
|
std::string const &OperandIdxComment) const override;
|
|
std::string subtargetGetOperandCycleEntryPartIV(
|
|
std::string const &ItinBypassString,
|
|
std::string const &OperandIdxComment) const override;
|
|
void subtargetEmitProcessorItineraryTable(
|
|
std::string const &ItinsDefName, std::vector<InstrItinerary> &ItinList,
|
|
CodeGenSchedModels const &SchedModels) const override;
|
|
void subtargetEmitPreOperandTableComment() const override;
|
|
void subtargetEmitSchedClassTables(
|
|
SchedClassTablesT &SchedTables, std::string const &TargetName,
|
|
CodeGenSchedModels const &SchedModels) const override;
|
|
unsigned subtargetEmitRegisterFileTables(
|
|
CodeGenProcModel const &ProcModel) const override;
|
|
void subtargetEmitMCExtraProcInfoTableHeader(
|
|
std::string const &ProcModelName) const override;
|
|
void subtargetEmitMCExtraProcInfoTableEnd() const override;
|
|
void subtargetEmitReorderBufferSize(int64_t ReorderBufferSize) const override;
|
|
void subtargetEmitMaxRetirePerCycle(int64_t MaxRetirePerCycle) const override;
|
|
void subtargetEmitRegisterFileInfo(CodeGenProcModel const &ProcModel,
|
|
unsigned NumRegisterFiles,
|
|
unsigned NumCostEntries) const override;
|
|
void
|
|
subtargetEmitResourceDescriptorLoadQueue(unsigned QueueID) const override;
|
|
void
|
|
subtargetEmitResourceDescriptorStoreQueue(unsigned QueueID) const override;
|
|
void subtargetEmitProcessorResourceSubUnits(
|
|
const CodeGenProcModel &ProcModel,
|
|
CodeGenSchedModels const &SchedModels) const override;
|
|
void subtargetEmitMCProcResourceDescHeader(
|
|
std::string const &ProcModelName) const override;
|
|
void subtargetEmitMCProcResourceDescEnd() const override;
|
|
void subtargetEmitMCProcResourceDesc(
|
|
Record const *PRDef, Record const *SuperDef,
|
|
std::string const &ProcModelName, unsigned SubUnitsOffset,
|
|
unsigned SuperIdx, unsigned NumUnits, int BufferSize, unsigned I,
|
|
unsigned const SubUnitsBeginOffset) const override;
|
|
void subtargetEmitProcessorProp(Record const *R, StringRef const Name,
|
|
char Separator) const override;
|
|
void
|
|
subtargetEmitProcModelHeader(std::string const &ModelName) const override;
|
|
void
|
|
subtargetEmitProcModel(CodeGenProcModel const &PM,
|
|
CodeGenSchedModels const &SchedModels) const override;
|
|
void subtargetEmitResolveVariantSchedClassImplHdr() const override;
|
|
void subtargetEmitResolveVariantSchedClassImplEnd() const override;
|
|
void subtargetEmitSchedClassSwitch() const override;
|
|
void subtargetEmitSchedClassSwitchEnd() const override;
|
|
void subtargetEmitSchedClassCase(unsigned VC,
|
|
std::string const &SCName) const override;
|
|
void
|
|
subtargetEmitSchedClassProcGuard(unsigned Pi, bool OnlyExpandMCInstPredicates,
|
|
std::string const &ModelName) const override;
|
|
void subtargetEmitPredicates(CodeGenSchedTransition const &T,
|
|
CodeGenSchedClass const &SC,
|
|
bool (*IsTruePredicate)(Record const *Rec),
|
|
int Indent = -1) const override;
|
|
void subtargetEmitProcTransitionEnd() const override;
|
|
void
|
|
subtargetEmitSchedClassCaseEnd(CodeGenSchedClass const &SC) const override;
|
|
void
|
|
subtargetEmitSchedModelHelperEpilogue(bool ShouldReturnZero) const override;
|
|
void
|
|
subtargetEmitGenMCSubtargetInfoClass(std::string const &TargetName,
|
|
bool OverrideGetHwMode) const override;
|
|
void subtargetEmitMCSubtargetInfoImpl(std::string const &TargetName,
|
|
unsigned NumFeatures, unsigned NumProcs,
|
|
bool SchedModelHasItin) const override;
|
|
void subtargetEmitIncludeSTIDesc() const override;
|
|
void
|
|
subtargetEmitDFAPacketizerClass(CodeGenTarget &TGT,
|
|
std::string const &TargetName,
|
|
std::string const &ClassName) const override;
|
|
void subtargetEmitDFAPacketizerClassEnd() const override;
|
|
void subtargetEmitSTICtor() const override;
|
|
void subtargetEmitExternKVArrays(std::string const &TargetName,
|
|
bool SchedModelsHasItin) const override;
|
|
void subtargetEmitClassDefs(std::string const &TargetName,
|
|
std::string const &ClassName,
|
|
unsigned NumFeatures, unsigned NumProcs,
|
|
bool SchedModelsHasItin) const override;
|
|
void subtargetEmitResolveSchedClassHdr(
|
|
std::string const &ClassName) const override;
|
|
void subtargetEmitResolveSchedClassEnd(
|
|
std::string const &ClassName) const override;
|
|
void subtargetEmitResolveVariantSchedClass(
|
|
std::string const &TargetName,
|
|
std::string const &ClassName) const override;
|
|
void subtargetEmitPredicateProlog(const RecordKeeper &Records) const override;
|
|
void subtargetEmitParseFeaturesFunction(
|
|
std::string const &TargetName,
|
|
std::vector<Record *> const &Features) const override;
|
|
void
|
|
subtargetEmitExpandedSTIPreds(StringRef const &TargetName,
|
|
std::string const &ClassName,
|
|
CodeGenSchedModels const &SchedModels) override;
|
|
void
|
|
subtargetPrepareSchedClassPreds(StringRef const &TargetName,
|
|
bool OnlyExpandMCInstPredicates) override;
|
|
void subtargetEmitExpandedSTIPredsMCAnaDecl(
|
|
StringRef const &TargetName,
|
|
CodeGenSchedModels const &SchedModels) override;
|
|
void subtargetEmitExpandedSTIPredsMCAnaDefs(
|
|
StringRef const &TargetName, std::string const &ClassPrefix,
|
|
CodeGenSchedModels const &SchedModels) const override;
|
|
void subtargetEmitExpandedSTIPredsHeader(
|
|
StringRef const &TargetName,
|
|
CodeGenSchedModels const &SchedModels) override;
|
|
void subtargetEmitStageAndSycleTables(
|
|
std::string const &StageTable, std::string const &OperandCycleTable,
|
|
std::string const &BypassTable) const override;
|
|
|
|
//---------------------------
|
|
// Backend: InstrInfoEmitter
|
|
//---------------------------
|
|
|
|
void instrInfoEmitSourceFileHeader() const override;
|
|
void instrInfoEmitSetGetComputeFeatureMacro() const override;
|
|
void instrInfoSetOperandInfoStr(
|
|
std::string &Res, Record const *OpR,
|
|
CGIOperandList::OperandInfo const &Op,
|
|
CGIOperandList::ConstraintInfo const &Constraint) const override;
|
|
void instrInfoEmitMCInstrDescHdr(std::string TargetName) const override;
|
|
void instrInfoEmitMCInstrDescClose() const override;
|
|
void instrInfoEmitMCInstrDescEnd() const override;
|
|
void instrInfoEmitMCInstrImplUses(
|
|
std::vector<std::vector<Record *>> ImplicitLists,
|
|
std::map<std::vector<Record *>, unsigned> &EmittedLists) const override;
|
|
void instrInfoEmitRecord(CodeGenSchedModels const &SchedModels,
|
|
CodeGenInstruction const &Inst, unsigned Num,
|
|
int MinOperands) const override;
|
|
void
|
|
instrInfoEmitTargetIndepFlags(CodeGenInstruction const &Inst,
|
|
bool GetAllowRegisterRenaming) const override;
|
|
void instrInfoEmitTSFFlags(uint64_t Value) const override;
|
|
void instrInfoEmitUseDefsLists(
|
|
StringRef TargetName, const CodeGenInstruction &Inst,
|
|
std::map<std::vector<Record *>, unsigned> &EmittedLists,
|
|
std::vector<Record *> const &ImplicitOps) const override;
|
|
void
|
|
instrInfoEmitOperandInfo(OperandInfoListTy &OperandInfoList) const override;
|
|
void instrInfoEmitOperandInfoOffset(
|
|
StringRef TargetName, std::vector<std::string> const &OperandInfo,
|
|
OperandInfoMapTy const &OperandInfoMap) const override;
|
|
void instrInfoEmitRecordEnd(unsigned InstNum,
|
|
std::string const &InstName) const override;
|
|
void instrInfoEmitMCInstrDescDecl(std::string const &TargetName,
|
|
unsigned NumberedInstructionsSize,
|
|
unsigned OperandInfoSize,
|
|
unsigned ImplicitListSize) const override;
|
|
void instrInfoEmitStringLiteralDef(
|
|
std::string const &TargetName,
|
|
SequenceToOffsetTable<std::string> InstrNames) const override;
|
|
void instrInfoEmitInstrNameIndices(
|
|
std::string const &TargetName,
|
|
ArrayRef<const CodeGenInstruction *> const &NumberedInstructions,
|
|
SequenceToOffsetTable<std::string> const &InstrNames) const override;
|
|
void instrInfoEmitInstrDeprFeatures(
|
|
std::string const &TargetName, std::string const &TargetNamespace,
|
|
ArrayRef<const CodeGenInstruction *> const &NumberedInstructions,
|
|
SequenceToOffsetTable<std::string> const &InstrNames) const override;
|
|
void
|
|
instrInfoEmitInstrComplexDeprInfos(std::string const &TargetName,
|
|
ArrayRef<const CodeGenInstruction *> const
|
|
&NumberedInstructions) const override;
|
|
void instrInfoEmitMCInstrInfoInitRoutine(
|
|
std::string const &TargetName, unsigned NumberedInstrSize,
|
|
bool HasDeprecationFeatures,
|
|
bool HasComplexDeprecationInfos) const override;
|
|
void instrInfoEmitHeader(std::string const &TargetName) const override;
|
|
void instrInfoEmitClassStruct(std::string const &ClassName) const override;
|
|
void instrInfoEmitTIIHelperMethod(StringRef const &TargetName,
|
|
Record const *Rec,
|
|
bool ExpandDefinition) const override;
|
|
void
|
|
instrInfoEmitExternArrays(std::string const &TargetName,
|
|
bool HasDeprecationFeatures,
|
|
bool HasComplexDeprecationInfos) const override;
|
|
void
|
|
instrInfoEmitMCInstrInfoInit(std::string const &TargetName,
|
|
unsigned NumberedInstrSize,
|
|
bool HasDeprecationFeatures,
|
|
bool HasComplexDeprecationInfos) const override;
|
|
void instrInfoEmitOperandEnum(
|
|
std::map<std::string, unsigned> const &Operands) const override;
|
|
void instrInfoEmitGetNamedOperandIdx(
|
|
std::map<std::string, unsigned> const &Operands,
|
|
OpNameMapTy const &OperandMap) const override;
|
|
void instrInfoEmitOpTypeEnumPartI() const override;
|
|
void instrInfoEmitOpTypeEnumPartII(StringRef const &OpName,
|
|
unsigned EnumVal) const override;
|
|
void instrInfoEmitOpTypeEnumPartIII() const override;
|
|
void instrInfoEmitOpTypeOffsetTable(std::vector<int> OperandOffsets,
|
|
unsigned OpRecSize,
|
|
ArrayRef<const CodeGenInstruction *> const
|
|
&NumberedInstructions) const override;
|
|
void instrInfoEmitOpcodeOpTypesTable(
|
|
unsigned EnumVal, std::vector<Record *> const &OperandRecords,
|
|
std::vector<int> OperandOffsets,
|
|
ArrayRef<const CodeGenInstruction *> const &NumberedInstructions)
|
|
const override;
|
|
void instrInfoEmitGetOpTypeHdr() const override;
|
|
void instrInfoEmitGetOpTypeReturn() const override;
|
|
void instrInfoEmitGetOpTypeUnreachable() const override;
|
|
void instrInfoEmitGetOpTypeEnd() const override;
|
|
void instrInfoEmitGetMemOpSizeHdr() const override;
|
|
void instrInfoEmitGetOpMemSizeTbl(std::map<int, SmallVector<StringRef, 0>>
|
|
&SizeToOperandName) const override;
|
|
std::string
|
|
instrInfoGetInstMapEntry(StringRef const &Namespace,
|
|
StringRef const &InstrName) const override;
|
|
void instrInfoEmitGetLogicalOpSizeHdr() const override;
|
|
void instrInfoEmitGetLogicalOpSizeTable(
|
|
size_t LogicalOpListSize,
|
|
std::vector<const std::vector<unsigned> *> const &LogicalOpSizeList)
|
|
const override;
|
|
void instrInfoEmitGetLogicalOpSizeSwitch(
|
|
std::map<unsigned, std::vector<std::string>> InstMap) const override;
|
|
void instrInfoEmitGetLogicalOpSizeReturn() const override;
|
|
void instrInfoEmitGetLogicalOpSizeEnd() const override;
|
|
void instrInfoEmitGetLogicalOpIdx() const override;
|
|
std::string
|
|
instrInfoGetOpTypeListEntry(StringRef const &Namespace,
|
|
StringRef const &OpName) const override;
|
|
void instrInfoEmitGetLogicalOpTypeHdr() const override;
|
|
void instrInfoEmitGetLogicalOpTypeTable(
|
|
size_t LogicalOpTypeListSize,
|
|
std::vector<const std::vector<std::string> *> const &LogicalOpTypeList)
|
|
const override;
|
|
void instrInfoEmitGetLogicalOpTypeSwitch(
|
|
std::map<unsigned, std::vector<std::string>> InstMap) const override;
|
|
void instrInfoEmitGetLogicalOpTypeReturn() const override;
|
|
void instrInfoEmitGetLogicalOpTypeEnd() const override;
|
|
void instrInfoEmitDeclareMCInstFeatureClasses() const override;
|
|
void instrInfoEmitPredFcnDecl(RecVec const &TIIPredicates) const override;
|
|
void instrInfoEmitPredFcnImpl(StringRef const &TargetName,
|
|
RecVec const &TIIPredicates) override;
|
|
void instrInfoEmitInstrPredVerifierIncludes() const override;
|
|
void instrInfoEmitMacroDefineCheck() const override;
|
|
void instrInfoEmitSubtargetFeatureBitEnumeration(
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
|
&SubtargetFeatures) const override;
|
|
void instrInfoEmitEmitSTFNameTable(
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
|
&SubtargetFeatures) const override;
|
|
void instrInfoEmitFeatureBitsEnum(
|
|
std::vector<std::vector<Record *>> const &FeatureBitsets) const override;
|
|
void instrInfoEmitFeatureBitsArray(
|
|
std::vector<std::vector<Record *>> const &FeatureBitsets,
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> const
|
|
&SubtargetFeatures) const override;
|
|
void instrInfoEmitRequiredFeatureRefs(
|
|
std::vector<std::vector<Record *>> const &FeatureBitsets,
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> const
|
|
&SubtargetFeatures,
|
|
CodeGenTarget const &Target) const override;
|
|
void instrInfoEmitOpcodeChecker() const override;
|
|
void
|
|
instrInfoEmitPredicateVerifier(StringRef const &TargetName) const override;
|
|
void instrInfoEmitEnums(CodeGenTarget const &Target,
|
|
StringRef const &Namespace,
|
|
CodeGenSchedModels const &SchedModels) const override;
|
|
void instrInfoEmitTIIPredicates(StringRef const &TargetName,
|
|
RecVec const &TIIPredicates,
|
|
bool ExpandDefinition) override;
|
|
void instrInfoEmitComputeAssemblerAvailableFeatures(
|
|
StringRef const &TargetName,
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
|
&SubtargetFeatures) const override;
|
|
|
|
//--------------------------
|
|
// Backend: AsmMatcher
|
|
//--------------------------
|
|
|
|
void asmMatcherEmitSourceFileHeader(std::string const &Desc) const override;
|
|
void asmMatcherEmitDeclarations(bool HasOptionalOperands,
|
|
bool ReportMultipleNearMisses,
|
|
bool HasOperandInfos) const override;
|
|
void asmMatcherEmitOperandDiagTypes(
|
|
std::set<StringRef> const Types) const override;
|
|
|
|
void asmMatcherEmitGetSubtargetFeatureName(
|
|
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> const
|
|
SubtargetFeatures) const override;
|
|
void asmMatcherEmitConversionFunctionI(StringRef const &TargetName,
|
|
StringRef const &ClassName,
|
|
std::string const &TargetOperandClass,
|
|
bool HasOptionalOperands,
|
|
size_t MaxNumOperands) const override;
|
|
void asmMatcherEmitConversionFunctionII(
|
|
std::string const &EnumName,
|
|
StringRef const &AsmMatchConverter) const override;
|
|
void asmMatcherEmitConversionFunctionIII(
|
|
std::string const &EnumName, std::string const TargetOperandClass,
|
|
bool HasOptionalOperands, MatchableInfo::AsmOperand const &Op,
|
|
MatchableInfo::ResOperand const &OpInfo) const override;
|
|
void asmMatcherEmitConversionFunctionIV(std::string const &EnumName,
|
|
int64_t Val) const override;
|
|
void asmMatcherEmitConversionFunctionV(std::string const &EnumName,
|
|
std::string const &Reg) const override;
|
|
void asmMatcherEmitConversionFunctionVI() const override;
|
|
void asmMatcherWriteCvtOSToOS() const override;
|
|
void
|
|
asmMatcherEmitOperandFunctionI(StringRef const &TargetName,
|
|
StringRef const &ClassName) const override;
|
|
void asmMatcherEmitOperandFunctionII(
|
|
std::string const &EnumName, MatchableInfo::AsmOperand const &Op,
|
|
MatchableInfo::ResOperand const &OpInfo) const override;
|
|
void
|
|
asmMatcherEmitOperandFunctionIII(std::string const &EnumName) const override;
|
|
void
|
|
asmMatcherEmitOperandFunctionIV(std::string const &EnumName) const override;
|
|
void asmMatcherEmitOperandFunctionV() const override;
|
|
void asmMatcherEmitTiedOperandEnum(
|
|
std::map<std::tuple<uint8_t, uint8_t, uint8_t>, std::string>
|
|
TiedOperandsEnumMap) const override;
|
|
void asmMatcherWriteOpOSToOS() const override;
|
|
void asmMatcherEmitTiedOpTable(
|
|
std::map<std::tuple<uint8_t, uint8_t, uint8_t>, std::string>
|
|
TiedOperandsEnumMap) const override;
|
|
void asmMatcherEmitTiedOpEmptyTable() const override;
|
|
void asmMatcherEmitOperandConvKindEnum(
|
|
SmallSetVector<CachedHashString, 16> OperandConversionKinds)
|
|
const override;
|
|
void asmMatcherEmitInstrConvKindEnum(
|
|
SmallSetVector<CachedHashString, 16> InstructionConversionKinds)
|
|
const override;
|
|
void asmMatcherEmitConversionTable(
|
|
size_t MaxRowLength,
|
|
std::vector<std::vector<uint8_t>> const ConversionTable,
|
|
SmallSetVector<CachedHashString, 16> InstructionConversionKinds,
|
|
SmallSetVector<CachedHashString, 16> OperandConversionKinds,
|
|
std::map<std::tuple<uint8_t, uint8_t, uint8_t>, std::string>
|
|
TiedOperandsEnumMap) const override;
|
|
void asmMatcherEmitMatchClassKindEnum(
|
|
std::forward_list<ClassInfo> const &Infos) const override;
|
|
void asmMatcherEmitMatchClassDiagStrings(
|
|
AsmMatcherInfo const &Info) const override;
|
|
void
|
|
asmMatcherEmitRegisterMatchErrorFunc(AsmMatcherInfo &Info) const override;
|
|
void asmMatcherEmitIsSubclassI() const override;
|
|
bool asmMatcherEmitIsSubclassII(bool EmittedSwitch,
|
|
std::string const &Name) const override;
|
|
void asmMatcherEmitIsSubclassIII(StringRef const &Name) const override;
|
|
void asmMatcherEmitIsSubclassIV(
|
|
std::vector<StringRef> const &SuperClasses) const override;
|
|
void asmMatcherEmitIsSubclassV(bool EmittedSwitch) const override;
|
|
void asmMatcherEmitValidateOperandClass(AsmMatcherInfo &Info) const override;
|
|
void asmMatcherEmitMatchClassKindNames(
|
|
std::forward_list<ClassInfo> &Infos) const override;
|
|
void
|
|
asmMatcherEmitAsmTiedOperandConstraints(CodeGenTarget &Target,
|
|
AsmMatcherInfo &Info) const override;
|
|
std::string getNameForFeatureBitset(
|
|
const std::vector<Record *> &FeatureBitset) const override;
|
|
void asmMatcherEmitFeatureBitsetEnum(
|
|
std::vector<std::vector<Record *>> const FeatureBitsets) const override;
|
|
void asmMatcherEmitFeatureBitsets(
|
|
std::vector<std::vector<Record *>> const FeatureBitsets,
|
|
AsmMatcherInfo const &Info) const override;
|
|
void asmMatcherEmitMatchEntryStruct(
|
|
unsigned MaxMnemonicIndex, unsigned NumConverters, size_t MaxNumOperands,
|
|
std::vector<std::vector<Record *>> const FeatureBitsets,
|
|
AsmMatcherInfo const &Info) const override;
|
|
void asmMatcherEmitMatchFunction(
|
|
CodeGenTarget const &Target, Record const *AsmParser,
|
|
StringRef const &ClassName, bool HasMnemonicFirst,
|
|
bool HasOptionalOperands, bool ReportMultipleNearMisses,
|
|
bool HasMnemonicAliases, size_t MaxNumOperands, bool HasDeprecation,
|
|
unsigned int VariantCount) const override;
|
|
void asmMatcherEmitMnemonicSpellChecker(CodeGenTarget const &Target,
|
|
unsigned VariantCount) const override;
|
|
void asmMatcherEmitMnemonicChecker(CodeGenTarget const &Target,
|
|
unsigned VariantCount,
|
|
bool HasMnemonicFirst,
|
|
bool HasMnemonicAliases) const override;
|
|
void asmMatcherEmitCustomOperandParsing(
|
|
unsigned MaxMask, CodeGenTarget &Target, AsmMatcherInfo const &Info,
|
|
StringRef ClassName, StringToOffsetTable &StringTable,
|
|
unsigned MaxMnemonicIndex, unsigned MaxFeaturesIndex,
|
|
bool HasMnemonicFirst, Record const &AsmParser) const override;
|
|
void asmMatcherEmitIncludes() const override;
|
|
void
|
|
asmMatcherEmitMnemonicTable(StringToOffsetTable &StringTable) const override;
|
|
void asmMatcherEmitMatchTable(CodeGenTarget const &Target,
|
|
AsmMatcherInfo &Info,
|
|
StringToOffsetTable &StringTable,
|
|
unsigned VariantCount) const override;
|
|
void asmMatcherEmitMatchRegisterName(
|
|
Record const *AsmParser,
|
|
std::vector<StringMatcher::StringPair> const Matches) const override;
|
|
void asmMatcherEmitMatchTokenString(
|
|
std::vector<StringMatcher::StringPair> const Matches) const override;
|
|
void asmMatcherEmitMatchRegisterAltName(
|
|
Record const *AsmParser,
|
|
std::vector<StringMatcher::StringPair> const Matches) const override;
|
|
void asmMatcherEmitMnemonicAliasVariant(
|
|
std::vector<StringMatcher::StringPair> const &Cases,
|
|
unsigned Indent) const override;
|
|
void asmMatcherAppendMnemonicAlias(Record const *R,
|
|
std::string const &FeatureMask,
|
|
std::string &MatchCode) const override;
|
|
void asmMatcherAppendMnemonic(Record const *R,
|
|
std::string &MatchCode) const override;
|
|
void asmMatcherAppendMnemonicAliasEnd(std::string &MatchCode) const override;
|
|
void asmMatcherEmitApplyMnemonicAliasesI() const override;
|
|
void
|
|
asmMatcherEmitApplyMnemonicAliasesII(int AsmParserVariantNo) const override;
|
|
void asmMatcherEmitApplyMnemonicAliasesIII() const override;
|
|
void asmMatcherEmitApplyMnemonicAliasesIV() const override;
|
|
void asmMatcherEmitApplyMnemonicAliasesV() const override;
|
|
void
|
|
subtargetEmitGetMacroFusions(CodeGenTarget &TGT, std::string Target,
|
|
const std::string &ClassName) const override;
|
|
void asmMatcherEmitSTFBitEnum(AsmMatcherInfo &Info) const override;
|
|
void asmMatcherEmitComputeAssemblerAvailableFeatures(
|
|
AsmMatcherInfo &Info, StringRef const &ClassName) const override;
|
|
|
|
//---------------------------
|
|
// Backend: SearchableTables
|
|
//---------------------------
|
|
|
|
raw_string_ostream &searchableTablesGetOS(StreamType G) const;
|
|
void searchableTablesWriteFiles() const override;
|
|
void searchableTablesEmitGenericEnum(const GenericEnum &Enum) const override;
|
|
void
|
|
searchableTablesEmitGenericTable(const GenericTable &Enum) const override;
|
|
void searchableTablesEmitIfdef(const std::string Guard,
|
|
StreamType ST = ST_NONE) override;
|
|
void searchableTablesEmitEndif(StreamType ST = ST_NONE) const override;
|
|
void searchableTablesEmitUndef() const override;
|
|
void searchableTablesEmitLookupDeclaration(const GenericTable &Table,
|
|
const SearchIndex &Index,
|
|
StreamType ST) override;
|
|
std::string searchableTablesPrimaryRepresentation(
|
|
SMLoc Loc, const GenericField &Field, Init *I,
|
|
StringRef const &InstrinsicEnumName) const override;
|
|
std::string searchableTablesSearchableFieldType(
|
|
const GenericTable &Table, const SearchIndex &Index,
|
|
const GenericField &Field, TypeContext Ctx) const override;
|
|
void
|
|
searchableTablesEmitKeyTypeStruct(const GenericTable &Table,
|
|
const SearchIndex &Index) const override;
|
|
|
|
void
|
|
searchableTablesEmitIfFieldCase(const GenericField &Field,
|
|
std::string const &FirstRepr,
|
|
std::string const &LastRepr) const override;
|
|
void searchableTablesEmitIsContiguousCase(StringRef const &IndexName,
|
|
const GenericTable &Table,
|
|
const SearchIndex &Index,
|
|
bool IsPrimary) override;
|
|
void searchableTablesEmitIndexArrayV() const override;
|
|
void searchableTablesEmitIndexArrayIV(
|
|
std::pair<Record *, unsigned> const &Entry) const override;
|
|
void searchableTablesEmitIndexArrayIII(ListSeparator &LS,
|
|
std::string Repr) const override;
|
|
void searchableTablesEmitIndexArrayII() const override;
|
|
void searchableTablesEmitIndexArrayI() const override;
|
|
void searchableTablesEmitIndexTypeStruct(const GenericTable &Table,
|
|
const SearchIndex &Index) override;
|
|
void searchableTablesEmitReturns(const GenericTable &Table,
|
|
const SearchIndex &Index,
|
|
bool IsPrimary) override;
|
|
void
|
|
searchableTablesEmitIndexLamda(const SearchIndex &Index,
|
|
StringRef const &IndexName,
|
|
StringRef const &IndexTypeName) const override;
|
|
void searchableTablesEmitKeyArray(const GenericTable &Table,
|
|
const SearchIndex &Index,
|
|
bool IsPrimary) const override;
|
|
void searchableTablesEmitMapI(const GenericTable &Table) const override;
|
|
void searchableTablesEmitMapII() const override;
|
|
void searchableTablesEmitMapIII(const GenericTable &Table, ListSeparator &LS,
|
|
GenericField const &Field,
|
|
StringRef &Intrinsic,
|
|
Record *Entry) const override;
|
|
void searchableTablesEmitMapIV(unsigned i) const override;
|
|
void searchableTablesEmitMapV() override;
|
|
};
|
|
|
|
} // end namespace llvm
|
|
|
|
#endif // LLVM_UTILS_TABLEGEN_PRINTER_H
|