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https://github.com/capstone-engine/llvm-capstone.git
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7fc792cba7
GPU Dialect lowering to SYCL runtime is driven by spirv.target_env attached to gpu.module. As a result of this, spirv.target_env remains as an input to LLVMIR Translation. A SPIRVToLLVMIRTranslation without any actual translation is added to avoid an unregistered error in mlir-cpu-runner. SelectObjectAttr.cpp is updated to 1) Pass binary size argument to getModuleLoadFn 2) Pass parameter count to getKernelLaunchFn This change does not impact CUDA and ROCM usage since both mlir_cuda_runtime and mlir_rocm_runtime are already updated to accept and ignore the extra arguments.
71 lines
3.3 KiB
Python
71 lines
3.3 KiB
Python
@LIT_SITE_CFG_IN_HEADER@
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import sys
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config.target_triple = "@LLVM_TARGET_TRIPLE@"
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config.llvm_tools_dir = lit_config.substitute("@LLVM_TOOLS_DIR@")
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config.llvm_shlib_ext = "@SHLIBEXT@"
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config.llvm_shlib_dir = lit_config.substitute(path(r"@SHLIBDIR@"))
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config.python_executable = "@Python3_EXECUTABLE@"
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config.enable_assertions = @ENABLE_ASSERTIONS@
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config.native_target = "@LLVM_NATIVE_ARCH@"
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config.host_os = "@HOST_OS@"
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config.host_cc = "@HOST_CC@"
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config.host_cxx = "@HOST_CXX@"
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config.enable_libcxx = "@LLVM_ENABLE_LIBCXX@"
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config.host_cmake = "@CMAKE_COMMAND@"
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config.host_cmake_generator = "@CMAKE_GENERATOR@"
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config.llvm_use_linker = "@LLVM_USE_LINKER@"
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config.llvm_use_sanitizer = "@LLVM_USE_SANITIZER@"
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config.host_arch = "@HOST_ARCH@"
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config.mlir_src_root = "@MLIR_SOURCE_DIR@"
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config.mlir_obj_root = "@MLIR_BINARY_DIR@"
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config.mlir_tools_dir = "@MLIR_TOOLS_DIR@"
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config.mlir_cmake_dir = "@MLIR_CMAKE_DIR@"
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config.mlir_lib_dir = "@MLIR_LIB_DIR@"
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config.build_examples = @LLVM_BUILD_EXAMPLES@
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config.run_cuda_tests = @MLIR_ENABLE_CUDA_CONVERSIONS@
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config.enable_cuda_runner = @MLIR_ENABLE_CUDA_RUNNER@
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config.run_rocm_tests = @MLIR_ENABLE_ROCM_CONVERSIONS@
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config.enable_rocm_runner = @MLIR_ENABLE_ROCM_RUNNER@
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config.gpu_compilation_format = "@MLIR_GPU_COMPILATION_TEST_FORMAT@"
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config.rocm_test_chipset = "@ROCM_TEST_CHIPSET@"
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config.enable_sycl_runner = @MLIR_ENABLE_SYCL_RUNNER@
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config.enable_spirv_cpu_runner = @MLIR_ENABLE_SPIRV_CPU_RUNNER@
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config.enable_vulkan_runner = @MLIR_ENABLE_VULKAN_RUNNER@
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config.enable_bindings_python = @MLIR_ENABLE_BINDINGS_PYTHON@
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config.intel_sde_executable = "@INTEL_SDE_EXECUTABLE@"
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config.mlir_run_amx_tests = @MLIR_RUN_AMX_TESTS@
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config.mlir_run_arm_sve_tests = @MLIR_RUN_ARM_SVE_TESTS@
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# This is a workaround for the fact that LIT's:
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# %if <cond>
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# requires <cond> to be in the set of available features.
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# TODO: Update LIT's TestRunner so that this is not required.
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if config.mlir_run_arm_sve_tests:
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config.available_features.add("mlir_arm_sve_tests")
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config.mlir_run_arm_sme_tests = @MLIR_RUN_ARM_SME_TESTS@
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config.mlir_run_x86vector_tests = @MLIR_RUN_X86VECTOR_TESTS@
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config.mlir_run_riscv_vector_tests = "@MLIR_RUN_RISCV_VECTOR_TESTS@"
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config.mlir_run_cuda_tensor_core_tests = @MLIR_RUN_CUDA_TENSOR_CORE_TESTS@
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config.mlir_run_cuda_sm80_tests = @MLIR_RUN_CUDA_SM80_TESTS@
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config.mlir_run_cuda_sm80_lt_tests = @MLIR_RUN_CUDA_SM80_LT_TESTS@
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config.mlir_run_cuda_sm90_tests = @MLIR_RUN_CUDA_SM90_TESTS@
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config.mlir_include_integration_tests = @MLIR_INCLUDE_INTEGRATION_TESTS@
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config.arm_emulator_executable = "@ARM_EMULATOR_EXECUTABLE@"
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config.arm_emulator_options = "@ARM_EMULATOR_OPTIONS@"
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config.arm_emulator_mlir_cpu_runner_executable = "@ARM_EMULATOR_MLIR_CPU_RUNNER_EXECUTABLE@"
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config.arm_emulator_lli_executable = "@ARM_EMULATOR_LLI_EXECUTABLE@"
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config.arm_emulator_utils_lib_dir = "@ARM_EMULATOR_UTILS_LIB_DIR@"
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config.arm_sme_abi_routines_shlib = "@ARM_SME_ABI_ROUTINES_SHLIB@"
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config.riscv_vector_emulator_executable = "@RISCV_VECTOR_EMULATOR_EXECUTABLE@"
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config.riscv_vector_emulator_options = "@RISCV_VECTOR_EMULATOR_OPTIONS@"
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config.riscv_emulator_lli_executable = "@RISCV_EMULATOR_LLI_EXECUTABLE@"
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config.riscv_emulator_utils_lib_dir = "@RISCV_EMULATOR_UTILS_LIB_DIR@"
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import lit.llvm
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lit.llvm.initialize(lit_config, config)
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# Let the main config do the real work.
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lit_config.load_config(config, "@MLIR_SOURCE_DIR@/test/lit.cfg.py")
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