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097d2f1417
llvm-capstone/mlir
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Peiming Liu 097d2f1417
[mlir][sparse] optimize memory load to SSA value when generating spar… (#74750) 
…se conv kernel.
2023-12-07 12:00:25 -08:00
..
benchmark/python [mlir][benchmark] Fix broken benchmark script (#68841) 2023-12-06 12:17:53 +05:30
cmake/modules [llvm][CMake][TableGen] Add all TableGen files to tablegen_compile_commands.yml (#71686) 2023-11-16 09:26:26 +00:00
docs [mlir][ArmSME] Update docs (#74527) 2023-12-06 21:35:23 +00:00
examples [mlir] Expose type and attribute names in the MLIRContext and abstract type/attr classes (#72189) 2023-12-01 00:39:34 +01:00
include Reland "[MLIR][Transform] Add attribute in MatchOp to filter by operand type (#67994)" 2023-12-07 11:57:02 +00:00
lib [mlir][sparse] optimize memory load to SSA value when generating spar… (#74750) 2023-12-07 12:00:25 -08:00
python [mlir][python] fix up affine for (#74495) 2023-12-07 10:55:55 -06:00
test [mlir][sparse] optimize memory load to SSA value when generating spar… (#74750) 2023-12-07 12:00:25 -08:00
tools [mlir] Expose type and attribute names in the MLIRContext and abstract type/attr classes (#72189) 2023-12-01 00:39:34 +01:00
unittests [mlir][ArmSME] Remove ArmSMETypeConverter (and configure LLVM one instead) (#73639) 2023-12-04 17:02:48 +00:00
utils [mlir][arith] Rename operations: maxf → maximumf, minf → minimumf (#65800) 2023-09-11 22:02:19 -07:00
.clang-format
.clang-tidy
CMakeLists.txt [MLIR] Add SyclRuntimeWrapper (#69648) 2023-10-26 19:41:09 +02:00
LICENSE.TXT
README.md

README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.