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https://github.com/capstone-engine/llvm-capstone.git
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416efb5f90
This commit makes two changes: - Remove the push and pop instructions that were saving and restoring %ebx before and after cpuid in 32-bit pic mode. We were doing this to ensure we don't lose the GOT address in pic register %ebx, but this isn't necessary because the GOT address is kept in a virtual register. - In 64-bit mode, preserve base register %rbx around cpuid. This fixes PR20311 and rdar://problem/17686779. llvm-svn: 218173
19 lines
1.1 KiB
C
19 lines
1.1 KiB
C
// RUN: %clang_cc1 %s -ffreestanding -triple x86_64-apple-darwin -emit-llvm -o - | FileCheck %s --check-prefix=CHECK-64
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// RUN: %clang_cc1 %s -ffreestanding -triple i386 -emit-llvm -o - | FileCheck %s --check-prefix=CHECK-32
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#include <cpuid.h>
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// CHECK-64: {{.*}} call { i32, i32, i32, i32 } asm " xchgq %rbx,${1:q}\0A cpuid\0A xchgq %rbx,${1:q}", "={ax},=r,={cx},={dx},0,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}})
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// CHECK-64: {{.*}} call { i32, i32, i32, i32 } asm " xchgq %rbx,${1:q}\0A cpuid\0A xchgq %rbx,${1:q}", "={ax},=r,={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}}, i32 %{{[a-z0-9]+}})
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// CHECK-32: {{.*}} call { i32, i32, i32, i32 } asm "cpuid", "={ax},={bx},={cx},={dx},0,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}})
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// CHECK-32: {{.*}} call { i32, i32, i32, i32 } asm "cpuid", "={ax},={bx},={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 %{{[a-z0-9]+}}, i32 %{{[a-z0-9]+}})
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unsigned eax0, ebx0, ecx0, edx0;
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unsigned eax1, ebx1, ecx1, edx1;
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void test_cpuid(unsigned level, unsigned count) {
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__cpuid(level, eax1, ebx1, ecx1, edx1);
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__cpuid_count(level, count, eax0, ebx0, ecx0, edx0);
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}
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