Craig Topper 86173600ec [InstCombine] Support folding and/or/xor with a constant vector RHS into selects and phis ...

Currently we only fold with ConstantInt RHS. This generalizes to any Constant RHS.

Differential Revision: https://reviews.llvm.org/D31610

llvm-svn: 299466

2017-04-04 20:26:25 +00:00

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Analysis

[ScalarEvolution] Re-enable Predicate implication from operations

2017-03-31 12:05:30 +00:00

Assembler

[IR] Add AllowContract to FastMathFlags

2017-03-28 20:11:52 +00:00

Bindings

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Bitcode

[IR] Add AllowContract to FastMathFlags

2017-03-28 20:11:52 +00:00

BugPoint

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CodeGen

[AArch64][Fuchsia] Allow -mcmodel=kernel for --target=aarch64-fuchsia

2017-04-04 19:51:53 +00:00

DebugInfo

Improve DebugInfo/strip-loop-metadata.ll test

2017-03-31 17:51:12 +00:00

Examples

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ExecutionEngine

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Feature

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FileCheck

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Instrumentation

Revert "[asan] Delay creation of asan ctor."

2017-03-27 23:11:50 +00:00

Integer

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JitListener

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LibDriver

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Linker

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LTO

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MC

[X86][MS-compatability]Allow named synonymous for MS-assembly operators

2017-04-04 14:43:23 +00:00

Object

Reland r298901 with modifications (reverted in r298932)

2017-04-03 21:50:04 +00:00

ObjectYAML

Align all scalar numbers to LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR

2017-04-04 06:02:32 +00:00

Other

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SymbolRewriter

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TableGen

[tablegen][globalisel] Add support for nested instruction matching.

2017-04-04 13:25:23 +00:00

ThinLTO/X86

Add support for -fno-builtin to LTO and ThinLTO to libLTO

2017-03-28 18:55:44 +00:00

tools

[codeview] Cope with unsorted streams in type merging

2017-04-03 23:58:15 +00:00

Transforms

[InstCombine] Support folding and/or/xor with a constant vector RHS into selects and phis

2017-04-04 20:26:25 +00:00

Unit

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Verifier

Verifier: Check some amdgpu calling convention restrictions

2017-04-04 18:43:11 +00:00

YAMLParser

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.clang-format

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CMakeLists.txt

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lit.cfg

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lit.site.cfg.in

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TestRunner.sh

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