llvm with tablegen backend for capstone disassembler
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Duncan Sands 723849a17f Initial soft-float support for LegalizeTypes. I rewrote
the fcopysign expansion from LegalizeDAG to get rid of
what seems to be a bug: the use of sign extension means
that when copying the sign bit from an f32 to an f64,
the upper 32 bits of the f64 (now an i64) are set, not
just the top bit...  I also generalized it to work for
any sized floating point types, and removed the bogosity:
  SDOperand Mask1 = (SrcVT == MVT::f64)
    ? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT)
    : DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT);
  Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1);
(here SrcNVT is an integer with the same size as SrcVT).
As far as I can see this takes a 1 << 63, converts to
a double, converts that to a floating point constant
then converts that to an integer constant, ending up
with... 1 << 63 as an integer constant!  So I just
generate this integer constant directly.

llvm-svn: 48305
2008-03-12 21:27:04 +00:00
clang Minor aesthetic improvement (after I reviewed my last commit). 2008-03-12 21:22:52 +00:00
llvm Initial soft-float support for LegalizeTypes. I rewrote 2008-03-12 21:27:04 +00:00