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750e90e440
Many machine-learning applications (and most software written at AMD) expect the operation that truncates floats to 8-bit floats to be saturatinng. That is, they expect `truncf 256.0 : f32 to f8E4M3FNUZ` to yield `240.0`, not `NaN`, and similarly for negative numbers. However, the underlying hardware instruction that can be used for this truncation implements overflow-to-NaN semantics. To enable handling this usecase, we add the saturate-fp8-truncf option to ArithToAMDGPU (off by default), which causes the requisite clamping code to be emitted. Said clamping code ensures that Inf and NaN are passed through exactly (and thus trancate to NaN). Per review feedback, this commit efactors createScalarOrSplatConstant() to the Arith dialect utilities and uses it in this code. It also fixes naming of existing patterns and switches from vector.extractelement/insertelement to vector.extract/insert. |
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.. | ||
Analysis | ||
Bytecode | ||
CAPI | ||
Conversion | ||
Dialect | ||
Examples | ||
Integration | ||
Interfaces | ||
IR | ||
lib | ||
mlir-cpu-runner | ||
mlir-linalg-ods-gen | ||
mlir-lsp-server | ||
mlir-opt | ||
mlir-pdll | ||
mlir-pdll-lsp-server | ||
mlir-query | ||
mlir-reduce | ||
mlir-spirv-cpu-runner | ||
mlir-tblgen | ||
mlir-translate | ||
mlir-vulkan-runner | ||
Pass | ||
python | ||
Rewrite | ||
Target | ||
tblgen-lsp-server | ||
tblgen-to-irdl | ||
Transforms | ||
Unit | ||
APITest.h | ||
CMakeLists.txt | ||
lit.cfg.py | ||
lit.site.cfg.py.in |