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Simon Cook
7deaeee753
[RISCV] Add support for floating point registers in inlineasm
This adds support for parsing/emitting in IR the floating-point RISC-V registers in inline assembly clobber lists. Differential Revision: https://reviews.llvm.org/D64737 llvm-svn: 367399
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The LLVM Compiler Infrastructure
This directory and its subdirectories contain source code for LLVM, a toolkit for the construction of highly optimized compilers, optimizers, and runtime environments.
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